1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
6 * deal of code from the sparc and intel versions.
8 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
10 * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and
11 * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
16 #include <linux/kernel.h>
17 #include <linux/export.h>
18 #include <linux/sched/mm.h>
19 #include <linux/sched/task_stack.h>
20 #include <linux/sched/topology.h>
21 #include <linux/smp.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/init.h>
25 #include <linux/spinlock.h>
26 #include <linux/cache.h>
27 #include <linux/err.h>
28 #include <linux/device.h>
29 #include <linux/cpu.h>
30 #include <linux/notifier.h>
31 #include <linux/topology.h>
32 #include <linux/profile.h>
33 #include <linux/processor.h>
34 #include <linux/random.h>
35 #include <linux/stackprotector.h>
36 #include <linux/pgtable.h>
38 #include <asm/ptrace.h>
39 #include <linux/atomic.h>
41 #include <asm/hw_irq.h>
42 #include <asm/kvm_ppc.h>
43 #include <asm/dbell.h>
48 #include <asm/machdep.h>
49 #include <asm/cputhreads.h>
50 #include <asm/cputable.h>
52 #include <asm/vdso_datapage.h>
57 #include <asm/debug.h>
58 #include <asm/kexec.h>
59 #include <asm/asm-prototypes.h>
60 #include <asm/cpu_has_feature.h>
61 #include <asm/ftrace.h>
63 #include <asm/fadump.h>
67 #define DBG(fmt...) udbg_printf(fmt)
72 #ifdef CONFIG_HOTPLUG_CPU
73 /* State of each CPU during hotplug phases */
74 static DEFINE_PER_CPU(int, cpu_state) = { 0 };
77 struct task_struct *secondary_current;
79 bool coregroup_enabled;
81 DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
82 DEFINE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
83 DEFINE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
84 DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
85 DEFINE_PER_CPU(cpumask_var_t, cpu_coregroup_map);
87 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
88 EXPORT_PER_CPU_SYMBOL(cpu_l2_cache_map);
89 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
90 EXPORT_SYMBOL_GPL(has_big_cores);
93 #ifdef CONFIG_SCHED_SMT
101 #define MAX_THREAD_LIST_SIZE 8
102 #define THREAD_GROUP_SHARE_L1 1
103 struct thread_groups {
104 unsigned int property;
105 unsigned int nr_groups;
106 unsigned int threads_per_group;
107 unsigned int thread_list[MAX_THREAD_LIST_SIZE];
111 * On big-cores system, cpu_l1_cache_map for each CPU corresponds to
112 * the set its siblings that share the L1-cache.
114 DEFINE_PER_CPU(cpumask_var_t, cpu_l1_cache_map);
116 /* SMP operations for this machine */
117 struct smp_ops_t *smp_ops;
119 /* Can't be static due to PowerMac hackery */
120 volatile unsigned int cpu_callin_map[NR_CPUS];
122 int smt_enabled_at_boot = 1;
125 * Returns 1 if the specified cpu should be brought up during boot.
126 * Used to inhibit booting threads if they've been disabled or
127 * limited on the command line
129 int smp_generic_cpu_bootable(unsigned int nr)
131 /* Special case - we inhibit secondary thread startup
132 * during boot if the user requests it.
134 if (system_state < SYSTEM_RUNNING && cpu_has_feature(CPU_FTR_SMT)) {
135 if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
137 if (smt_enabled_at_boot
138 && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
147 int smp_generic_kick_cpu(int nr)
149 if (nr < 0 || nr >= nr_cpu_ids)
153 * The processor is currently spinning, waiting for the
154 * cpu_start field to become non-zero After we set cpu_start,
155 * the processor will continue on to secondary_start
157 if (!paca_ptrs[nr]->cpu_start) {
158 paca_ptrs[nr]->cpu_start = 1;
163 #ifdef CONFIG_HOTPLUG_CPU
165 * Ok it's not there, so it might be soft-unplugged, let's
166 * try to bring it back
168 generic_set_cpu_up(nr);
170 smp_send_reschedule(nr);
171 #endif /* CONFIG_HOTPLUG_CPU */
175 #endif /* CONFIG_PPC64 */
177 static irqreturn_t call_function_action(int irq, void *data)
179 generic_smp_call_function_interrupt();
183 static irqreturn_t reschedule_action(int irq, void *data)
189 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
190 static irqreturn_t tick_broadcast_ipi_action(int irq, void *data)
192 timer_broadcast_interrupt();
197 #ifdef CONFIG_NMI_IPI
198 static irqreturn_t nmi_ipi_action(int irq, void *data)
200 smp_handle_nmi_ipi(get_irq_regs());
205 static irq_handler_t smp_ipi_action[] = {
206 [PPC_MSG_CALL_FUNCTION] = call_function_action,
207 [PPC_MSG_RESCHEDULE] = reschedule_action,
208 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
209 [PPC_MSG_TICK_BROADCAST] = tick_broadcast_ipi_action,
211 #ifdef CONFIG_NMI_IPI
212 [PPC_MSG_NMI_IPI] = nmi_ipi_action,
217 * The NMI IPI is a fallback and not truly non-maskable. It is simpler
218 * than going through the call function infrastructure, and strongly
219 * serialized, so it is more appropriate for debugging.
221 const char *smp_ipi_name[] = {
222 [PPC_MSG_CALL_FUNCTION] = "ipi call function",
223 [PPC_MSG_RESCHEDULE] = "ipi reschedule",
224 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
225 [PPC_MSG_TICK_BROADCAST] = "ipi tick-broadcast",
227 #ifdef CONFIG_NMI_IPI
228 [PPC_MSG_NMI_IPI] = "nmi ipi",
232 /* optional function to request ipi, for controllers with >= 4 ipis */
233 int smp_request_message_ipi(int virq, int msg)
237 if (msg < 0 || msg > PPC_MSG_NMI_IPI)
239 #ifndef CONFIG_NMI_IPI
240 if (msg == PPC_MSG_NMI_IPI)
244 err = request_irq(virq, smp_ipi_action[msg],
245 IRQF_PERCPU | IRQF_NO_THREAD | IRQF_NO_SUSPEND,
246 smp_ipi_name[msg], NULL);
247 WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
248 virq, smp_ipi_name[msg], err);
253 #ifdef CONFIG_PPC_SMP_MUXED_IPI
254 struct cpu_messages {
255 long messages; /* current messages */
257 static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message);
259 void smp_muxed_ipi_set_message(int cpu, int msg)
261 struct cpu_messages *info = &per_cpu(ipi_message, cpu);
262 char *message = (char *)&info->messages;
265 * Order previous accesses before accesses in the IPI handler.
271 void smp_muxed_ipi_message_pass(int cpu, int msg)
273 smp_muxed_ipi_set_message(cpu, msg);
276 * cause_ipi functions are required to include a full barrier
277 * before doing whatever causes the IPI.
279 smp_ops->cause_ipi(cpu);
282 #ifdef __BIG_ENDIAN__
283 #define IPI_MESSAGE(A) (1uL << ((BITS_PER_LONG - 8) - 8 * (A)))
285 #define IPI_MESSAGE(A) (1uL << (8 * (A)))
288 irqreturn_t smp_ipi_demux(void)
290 mb(); /* order any irq clear */
292 return smp_ipi_demux_relaxed();
295 /* sync-free variant. Callers should ensure synchronization */
296 irqreturn_t smp_ipi_demux_relaxed(void)
298 struct cpu_messages *info;
301 info = this_cpu_ptr(&ipi_message);
303 all = xchg(&info->messages, 0);
304 #if defined(CONFIG_KVM_XICS) && defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE)
306 * Must check for PPC_MSG_RM_HOST_ACTION messages
307 * before PPC_MSG_CALL_FUNCTION messages because when
308 * a VM is destroyed, we call kick_all_cpus_sync()
309 * to ensure that any pending PPC_MSG_RM_HOST_ACTION
310 * messages have completed before we free any VCPUs.
312 if (all & IPI_MESSAGE(PPC_MSG_RM_HOST_ACTION))
313 kvmppc_xics_ipi_action();
315 if (all & IPI_MESSAGE(PPC_MSG_CALL_FUNCTION))
316 generic_smp_call_function_interrupt();
317 if (all & IPI_MESSAGE(PPC_MSG_RESCHEDULE))
319 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
320 if (all & IPI_MESSAGE(PPC_MSG_TICK_BROADCAST))
321 timer_broadcast_interrupt();
323 #ifdef CONFIG_NMI_IPI
324 if (all & IPI_MESSAGE(PPC_MSG_NMI_IPI))
325 nmi_ipi_action(0, NULL);
327 } while (info->messages);
331 #endif /* CONFIG_PPC_SMP_MUXED_IPI */
333 static inline void do_message_pass(int cpu, int msg)
335 if (smp_ops->message_pass)
336 smp_ops->message_pass(cpu, msg);
337 #ifdef CONFIG_PPC_SMP_MUXED_IPI
339 smp_muxed_ipi_message_pass(cpu, msg);
343 void smp_send_reschedule(int cpu)
346 do_message_pass(cpu, PPC_MSG_RESCHEDULE);
348 EXPORT_SYMBOL_GPL(smp_send_reschedule);
350 void arch_send_call_function_single_ipi(int cpu)
352 do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
355 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
359 for_each_cpu(cpu, mask)
360 do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
363 #ifdef CONFIG_NMI_IPI
368 * NMI IPIs may not be recoverable, so should not be used as ongoing part of
369 * a running system. They can be used for crash, debug, halt/reboot, etc.
371 * The IPI call waits with interrupts disabled until all targets enter the
372 * NMI handler, then returns. Subsequent IPIs can be issued before targets
373 * have returned from their handlers, so there is no guarantee about
374 * concurrency or re-entrancy.
376 * A new NMI can be issued before all targets exit the handler.
378 * The IPI call may time out without all targets entering the NMI handler.
379 * In that case, there is some logic to recover (and ignore subsequent
380 * NMI interrupts that may eventually be raised), but the platform interrupt
381 * handler may not be able to distinguish this from other exception causes,
382 * which may cause a crash.
385 static atomic_t __nmi_ipi_lock = ATOMIC_INIT(0);
386 static struct cpumask nmi_ipi_pending_mask;
387 static bool nmi_ipi_busy = false;
388 static void (*nmi_ipi_function)(struct pt_regs *) = NULL;
390 static void nmi_ipi_lock_start(unsigned long *flags)
392 raw_local_irq_save(*flags);
394 while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1) {
395 raw_local_irq_restore(*flags);
396 spin_until_cond(atomic_read(&__nmi_ipi_lock) == 0);
397 raw_local_irq_save(*flags);
402 static void nmi_ipi_lock(void)
404 while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1)
405 spin_until_cond(atomic_read(&__nmi_ipi_lock) == 0);
408 static void nmi_ipi_unlock(void)
411 WARN_ON(atomic_read(&__nmi_ipi_lock) != 1);
412 atomic_set(&__nmi_ipi_lock, 0);
415 static void nmi_ipi_unlock_end(unsigned long *flags)
418 raw_local_irq_restore(*flags);
422 * Platform NMI handler calls this to ack
424 int smp_handle_nmi_ipi(struct pt_regs *regs)
426 void (*fn)(struct pt_regs *) = NULL;
428 int me = raw_smp_processor_id();
432 * Unexpected NMIs are possible here because the interrupt may not
433 * be able to distinguish NMI IPIs from other types of NMIs, or
434 * because the caller may have timed out.
436 nmi_ipi_lock_start(&flags);
437 if (cpumask_test_cpu(me, &nmi_ipi_pending_mask)) {
438 cpumask_clear_cpu(me, &nmi_ipi_pending_mask);
439 fn = READ_ONCE(nmi_ipi_function);
443 nmi_ipi_unlock_end(&flags);
451 static void do_smp_send_nmi_ipi(int cpu, bool safe)
453 if (!safe && smp_ops->cause_nmi_ipi && smp_ops->cause_nmi_ipi(cpu))
457 do_message_pass(cpu, PPC_MSG_NMI_IPI);
461 for_each_online_cpu(c) {
462 if (c == raw_smp_processor_id())
464 do_message_pass(c, PPC_MSG_NMI_IPI);
470 * - cpu is the target CPU (must not be this CPU), or NMI_IPI_ALL_OTHERS.
471 * - fn is the target callback function.
472 * - delay_us > 0 is the delay before giving up waiting for targets to
473 * begin executing the handler, == 0 specifies indefinite delay.
475 static int __smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *),
476 u64 delay_us, bool safe)
479 int me = raw_smp_processor_id();
483 BUG_ON(cpu < 0 && cpu != NMI_IPI_ALL_OTHERS);
485 if (unlikely(!smp_ops))
488 nmi_ipi_lock_start(&flags);
489 while (nmi_ipi_busy) {
490 nmi_ipi_unlock_end(&flags);
491 spin_until_cond(!nmi_ipi_busy);
492 nmi_ipi_lock_start(&flags);
495 nmi_ipi_function = fn;
497 WARN_ON_ONCE(!cpumask_empty(&nmi_ipi_pending_mask));
501 cpumask_copy(&nmi_ipi_pending_mask, cpu_online_mask);
502 cpumask_clear_cpu(me, &nmi_ipi_pending_mask);
504 cpumask_set_cpu(cpu, &nmi_ipi_pending_mask);
509 /* Interrupts remain hard disabled */
511 do_smp_send_nmi_ipi(cpu, safe);
514 /* nmi_ipi_busy is set here, so unlock/lock is okay */
515 while (!cpumask_empty(&nmi_ipi_pending_mask)) {
526 if (!cpumask_empty(&nmi_ipi_pending_mask)) {
527 /* Timeout waiting for CPUs to call smp_handle_nmi_ipi */
529 cpumask_clear(&nmi_ipi_pending_mask);
532 nmi_ipi_function = NULL;
533 nmi_ipi_busy = false;
535 nmi_ipi_unlock_end(&flags);
540 int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us)
542 return __smp_send_nmi_ipi(cpu, fn, delay_us, false);
545 int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us)
547 return __smp_send_nmi_ipi(cpu, fn, delay_us, true);
549 #endif /* CONFIG_NMI_IPI */
551 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
552 void tick_broadcast(const struct cpumask *mask)
556 for_each_cpu(cpu, mask)
557 do_message_pass(cpu, PPC_MSG_TICK_BROADCAST);
561 #ifdef CONFIG_DEBUGGER
562 void debugger_ipi_callback(struct pt_regs *regs)
567 void smp_send_debugger_break(void)
569 smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, debugger_ipi_callback, 1000000);
573 #ifdef CONFIG_KEXEC_CORE
574 void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *))
578 smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, crash_ipi_callback, 1000000);
579 if (kdump_in_progress() && crash_wake_offline) {
580 for_each_present_cpu(cpu) {
584 * crash_ipi_callback will wait for
585 * all cpus, including offline CPUs.
586 * We don't care about nmi_ipi_function.
587 * Offline cpus will jump straight into
588 * crash_ipi_callback, we can skip the
589 * entire NMI dance and waiting for
590 * cpus to clear pending mask, etc.
592 do_smp_send_nmi_ipi(cpu, false);
598 #ifdef CONFIG_NMI_IPI
599 static void crash_stop_this_cpu(struct pt_regs *regs)
601 static void crash_stop_this_cpu(void *dummy)
605 * Just busy wait here and avoid marking CPU as offline to ensure
606 * register data is captured appropriately.
612 void crash_smp_send_stop(void)
614 static bool stopped = false;
617 * In case of fadump, register data for all CPUs is captured by f/w
618 * on ibm,os-term rtas call. Skip IPI callbacks to other CPUs before
619 * this rtas call to avoid tricky post processing of those CPUs'
622 if (should_fadump_crash())
630 #ifdef CONFIG_NMI_IPI
631 smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, crash_stop_this_cpu, 1000000);
633 smp_call_function(crash_stop_this_cpu, NULL, 0);
634 #endif /* CONFIG_NMI_IPI */
637 #ifdef CONFIG_NMI_IPI
638 static void nmi_stop_this_cpu(struct pt_regs *regs)
641 * IRQs are already hard disabled by the smp_handle_nmi_ipi.
643 set_cpu_online(smp_processor_id(), false);
650 void smp_send_stop(void)
652 smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, nmi_stop_this_cpu, 1000000);
655 #else /* CONFIG_NMI_IPI */
657 static void stop_this_cpu(void *dummy)
662 * Offlining CPUs in stop_this_cpu can result in scheduler warnings,
663 * (see commit de6e5d38417e), but printk_safe_flush_on_panic() wants
664 * to know other CPUs are offline before it breaks locks to flush
665 * printk buffers, in case we panic()ed while holding the lock.
667 set_cpu_online(smp_processor_id(), false);
674 void smp_send_stop(void)
676 static bool stopped = false;
679 * Prevent waiting on csd lock from a previous smp_send_stop.
680 * This is racy, but in general callers try to do the right
681 * thing and only fire off one smp_send_stop (e.g., see
689 smp_call_function(stop_this_cpu, NULL, 0);
691 #endif /* CONFIG_NMI_IPI */
693 struct task_struct *current_set[NR_CPUS];
695 static void smp_store_cpu_info(int id)
697 per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR);
698 #ifdef CONFIG_PPC_FSL_BOOK3E
699 per_cpu(next_tlbcam_idx, id)
700 = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1;
705 * Relationships between CPUs are maintained in a set of per-cpu cpumasks so
706 * rather than just passing around the cpumask we pass around a function that
707 * returns the that cpumask for the given CPU.
709 static void set_cpus_related(int i, int j, struct cpumask *(*get_cpumask)(int))
711 cpumask_set_cpu(i, get_cpumask(j));
712 cpumask_set_cpu(j, get_cpumask(i));
715 #ifdef CONFIG_HOTPLUG_CPU
716 static void set_cpus_unrelated(int i, int j,
717 struct cpumask *(*get_cpumask)(int))
719 cpumask_clear_cpu(i, get_cpumask(j));
720 cpumask_clear_cpu(j, get_cpumask(i));
725 * Extends set_cpus_related. Instead of setting one CPU at a time in
726 * dstmask, set srcmask at oneshot. dstmask should be super set of srcmask.
728 static void or_cpumasks_related(int i, int j, struct cpumask *(*srcmask)(int),
729 struct cpumask *(*dstmask)(int))
731 struct cpumask *mask;
735 for_each_cpu(k, srcmask(i))
736 cpumask_or(dstmask(k), dstmask(k), mask);
742 for_each_cpu(k, srcmask(j))
743 cpumask_or(dstmask(k), dstmask(k), mask);
747 * parse_thread_groups: Parses the "ibm,thread-groups" device tree
748 * property for the CPU device node @dn and stores
749 * the parsed output in the thread_groups
750 * structure @tg if the ibm,thread-groups[0]
753 * @dn: The device node of the CPU device.
754 * @tg: Pointer to a thread group structure into which the parsed
755 * output of "ibm,thread-groups" is stored.
756 * @property: The property of the thread-group that the caller is
759 * ibm,thread-groups[0..N-1] array defines which group of threads in
760 * the CPU-device node can be grouped together based on the property.
762 * ibm,thread-groups[0] tells us the property based on which the
763 * threads are being grouped together. If this value is 1, it implies
764 * that the threads in the same group share L1, translation cache.
766 * ibm,thread-groups[1] tells us how many such thread groups exist.
768 * ibm,thread-groups[2] tells us the number of threads in each such
771 * ibm,thread-groups[3..N-1] is the list of threads identified by
772 * "ibm,ppc-interrupt-server#s" arranged as per their membership in
775 * Example: If ibm,thread-groups = [1,2,4,5,6,7,8,9,10,11,12] it
776 * implies that there are 2 groups of 4 threads each, where each group
777 * of threads share L1, translation cache.
779 * The "ibm,ppc-interrupt-server#s" of the first group is {5,6,7,8}
780 * and the "ibm,ppc-interrupt-server#s" of the second group is {9, 10,
783 * Returns 0 on success, -EINVAL if the property does not exist,
784 * -ENODATA if property does not have a value, and -EOVERFLOW if the
785 * property data isn't large enough.
787 static int parse_thread_groups(struct device_node *dn,
788 struct thread_groups *tg,
789 unsigned int property)
792 u32 thread_group_array[3 + MAX_THREAD_LIST_SIZE];
794 size_t total_threads;
797 ret = of_property_read_u32_array(dn, "ibm,thread-groups",
798 thread_group_array, 3);
802 tg->property = thread_group_array[0];
803 tg->nr_groups = thread_group_array[1];
804 tg->threads_per_group = thread_group_array[2];
805 if (tg->property != property ||
807 tg->threads_per_group < 1)
810 total_threads = tg->nr_groups * tg->threads_per_group;
812 ret = of_property_read_u32_array(dn, "ibm,thread-groups",
818 thread_list = &thread_group_array[3];
820 for (i = 0 ; i < total_threads; i++)
821 tg->thread_list[i] = thread_list[i];
827 * get_cpu_thread_group_start : Searches the thread group in tg->thread_list
828 * that @cpu belongs to.
830 * @cpu : The logical CPU whose thread group is being searched.
831 * @tg : The thread-group structure of the CPU node which @cpu belongs
834 * Returns the index to tg->thread_list that points to the the start
835 * of the thread_group that @cpu belongs to.
837 * Returns -1 if cpu doesn't belong to any of the groups pointed to by
840 static int get_cpu_thread_group_start(int cpu, struct thread_groups *tg)
842 int hw_cpu_id = get_hard_smp_processor_id(cpu);
845 for (i = 0; i < tg->nr_groups; i++) {
846 int group_start = i * tg->threads_per_group;
848 for (j = 0; j < tg->threads_per_group; j++) {
849 int idx = group_start + j;
851 if (tg->thread_list[idx] == hw_cpu_id)
859 static int init_cpu_l1_cache_map(int cpu)
862 struct device_node *dn = of_get_cpu_node(cpu, NULL);
863 struct thread_groups tg = {.property = 0,
865 .threads_per_group = 0};
866 int first_thread = cpu_first_thread_sibling(cpu);
867 int i, cpu_group_start = -1, err = 0;
872 err = parse_thread_groups(dn, &tg, THREAD_GROUP_SHARE_L1);
876 cpu_group_start = get_cpu_thread_group_start(cpu, &tg);
878 if (unlikely(cpu_group_start == -1)) {
884 zalloc_cpumask_var_node(&per_cpu(cpu_l1_cache_map, cpu),
885 GFP_KERNEL, cpu_to_node(cpu));
887 for (i = first_thread; i < first_thread + threads_per_core; i++) {
888 int i_group_start = get_cpu_thread_group_start(i, &tg);
890 if (unlikely(i_group_start == -1)) {
896 if (i_group_start == cpu_group_start)
897 cpumask_set_cpu(i, per_cpu(cpu_l1_cache_map, cpu));
905 static bool shared_caches;
907 #ifdef CONFIG_SCHED_SMT
908 /* cpumask of CPUs with asymmetric SMT dependency */
909 static int powerpc_smt_flags(void)
911 int flags = SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES;
913 if (cpu_has_feature(CPU_FTR_ASYM_SMT)) {
914 printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n");
915 flags |= SD_ASYM_PACKING;
922 * P9 has a slightly odd architecture where pairs of cores share an L2 cache.
923 * This topology makes it *much* cheaper to migrate tasks between adjacent cores
924 * since the migrated task remains cache hot. We want to take advantage of this
925 * at the scheduler level so an extra topology level is required.
927 static int powerpc_shared_cache_flags(void)
929 return SD_SHARE_PKG_RESOURCES;
933 * We can't just pass cpu_l2_cache_mask() directly because
934 * returns a non-const pointer and the compiler barfs on that.
936 static const struct cpumask *shared_cache_mask(int cpu)
938 return per_cpu(cpu_l2_cache_map, cpu);
941 #ifdef CONFIG_SCHED_SMT
942 static const struct cpumask *smallcore_smt_mask(int cpu)
944 return cpu_smallcore_mask(cpu);
948 static struct cpumask *cpu_coregroup_mask(int cpu)
950 return per_cpu(cpu_coregroup_map, cpu);
953 static bool has_coregroup_support(void)
955 return coregroup_enabled;
958 static const struct cpumask *cpu_mc_mask(int cpu)
960 return cpu_coregroup_mask(cpu);
963 static struct sched_domain_topology_level powerpc_topology[] = {
964 #ifdef CONFIG_SCHED_SMT
965 { cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) },
967 { shared_cache_mask, powerpc_shared_cache_flags, SD_INIT_NAME(CACHE) },
968 { cpu_mc_mask, SD_INIT_NAME(MC) },
969 { cpu_cpu_mask, SD_INIT_NAME(DIE) },
973 static int __init init_big_cores(void)
977 for_each_possible_cpu(cpu) {
978 int err = init_cpu_l1_cache_map(cpu);
983 zalloc_cpumask_var_node(&per_cpu(cpu_smallcore_map, cpu),
988 has_big_cores = true;
992 void __init smp_prepare_cpus(unsigned int max_cpus)
996 DBG("smp_prepare_cpus\n");
999 * setup_cpu may need to be called on the boot cpu. We havent
1000 * spun any cpus up but lets be paranoid.
1002 BUG_ON(boot_cpuid != smp_processor_id());
1004 /* Fixup boot cpu */
1005 smp_store_cpu_info(boot_cpuid);
1006 cpu_callin_map[boot_cpuid] = 1;
1008 for_each_possible_cpu(cpu) {
1009 zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu),
1010 GFP_KERNEL, cpu_to_node(cpu));
1011 zalloc_cpumask_var_node(&per_cpu(cpu_l2_cache_map, cpu),
1012 GFP_KERNEL, cpu_to_node(cpu));
1013 zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu),
1014 GFP_KERNEL, cpu_to_node(cpu));
1015 if (has_coregroup_support())
1016 zalloc_cpumask_var_node(&per_cpu(cpu_coregroup_map, cpu),
1017 GFP_KERNEL, cpu_to_node(cpu));
1019 #ifdef CONFIG_NEED_MULTIPLE_NODES
1021 * numa_node_id() works after this.
1023 if (cpu_present(cpu)) {
1024 set_cpu_numa_node(cpu, numa_cpu_lookup_table[cpu]);
1025 set_cpu_numa_mem(cpu,
1026 local_memory_node(numa_cpu_lookup_table[cpu]));
1031 /* Init the cpumasks so the boot CPU is related to itself */
1032 cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid));
1033 cpumask_set_cpu(boot_cpuid, cpu_l2_cache_mask(boot_cpuid));
1034 cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid));
1036 if (has_coregroup_support())
1037 cpumask_set_cpu(boot_cpuid, cpu_coregroup_mask(boot_cpuid));
1040 if (has_big_cores) {
1041 cpumask_set_cpu(boot_cpuid,
1042 cpu_smallcore_mask(boot_cpuid));
1045 if (smp_ops && smp_ops->probe)
1049 void smp_prepare_boot_cpu(void)
1051 BUG_ON(smp_processor_id() != boot_cpuid);
1053 paca_ptrs[boot_cpuid]->__current = current;
1055 set_numa_node(numa_cpu_lookup_table[boot_cpuid]);
1056 current_set[boot_cpuid] = current;
1059 #ifdef CONFIG_HOTPLUG_CPU
1061 int generic_cpu_disable(void)
1063 unsigned int cpu = smp_processor_id();
1065 if (cpu == boot_cpuid)
1068 set_cpu_online(cpu, false);
1070 vdso_data->processorCount--;
1072 /* Update affinity of all IRQs previously aimed at this CPU */
1073 irq_migrate_all_off_this_cpu();
1076 * Depending on the details of the interrupt controller, it's possible
1077 * that one of the interrupts we just migrated away from this CPU is
1078 * actually already pending on this CPU. If we leave it in that state
1079 * the interrupt will never be EOI'ed, and will never fire again. So
1080 * temporarily enable interrupts here, to allow any pending interrupt to
1081 * be received (and EOI'ed), before we take this CPU offline.
1085 local_irq_disable();
1090 void generic_cpu_die(unsigned int cpu)
1094 for (i = 0; i < 100; i++) {
1096 if (is_cpu_dead(cpu))
1100 printk(KERN_ERR "CPU%d didn't die...\n", cpu);
1103 void generic_set_cpu_dead(unsigned int cpu)
1105 per_cpu(cpu_state, cpu) = CPU_DEAD;
1109 * The cpu_state should be set to CPU_UP_PREPARE in kick_cpu(), otherwise
1110 * the cpu_state is always CPU_DEAD after calling generic_set_cpu_dead(),
1111 * which makes the delay in generic_cpu_die() not happen.
1113 void generic_set_cpu_up(unsigned int cpu)
1115 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
1118 int generic_check_cpu_restart(unsigned int cpu)
1120 return per_cpu(cpu_state, cpu) == CPU_UP_PREPARE;
1123 int is_cpu_dead(unsigned int cpu)
1125 return per_cpu(cpu_state, cpu) == CPU_DEAD;
1128 static bool secondaries_inhibited(void)
1130 return kvm_hv_mode_active();
1133 #else /* HOTPLUG_CPU */
1135 #define secondaries_inhibited() 0
1139 static void cpu_idle_thread_init(unsigned int cpu, struct task_struct *idle)
1142 paca_ptrs[cpu]->__current = idle;
1143 paca_ptrs[cpu]->kstack = (unsigned long)task_stack_page(idle) +
1144 THREAD_SIZE - STACK_FRAME_OVERHEAD;
1147 secondary_current = current_set[cpu] = idle;
1150 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
1155 * Don't allow secondary threads to come online if inhibited
1157 if (threads_per_core > 1 && secondaries_inhibited() &&
1158 cpu_thread_in_subcore(cpu))
1161 if (smp_ops == NULL ||
1162 (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu)))
1165 cpu_idle_thread_init(cpu, tidle);
1168 * The platform might need to allocate resources prior to bringing
1171 if (smp_ops->prepare_cpu) {
1172 rc = smp_ops->prepare_cpu(cpu);
1177 /* Make sure callin-map entry is 0 (can be leftover a CPU
1180 cpu_callin_map[cpu] = 0;
1182 /* The information for processor bringup must
1183 * be written out to main store before we release
1189 DBG("smp: kicking cpu %d\n", cpu);
1190 rc = smp_ops->kick_cpu(cpu);
1192 pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc);
1197 * wait to see if the cpu made a callin (is actually up).
1198 * use this value that I found through experimentation.
1201 if (system_state < SYSTEM_RUNNING)
1202 for (c = 50000; c && !cpu_callin_map[cpu]; c--)
1204 #ifdef CONFIG_HOTPLUG_CPU
1207 * CPUs can take much longer to come up in the
1208 * hotplug case. Wait five seconds.
1210 for (c = 5000; c && !cpu_callin_map[cpu]; c--)
1214 if (!cpu_callin_map[cpu]) {
1215 printk(KERN_ERR "Processor %u is stuck.\n", cpu);
1219 DBG("Processor %u found.\n", cpu);
1221 if (smp_ops->give_timebase)
1222 smp_ops->give_timebase();
1224 /* Wait until cpu puts itself in the online & active maps */
1225 spin_until_cond(cpu_online(cpu));
1230 /* Return the value of the reg property corresponding to the given
1233 int cpu_to_core_id(int cpu)
1235 struct device_node *np;
1239 np = of_get_cpu_node(cpu, NULL);
1243 reg = of_get_property(np, "reg", NULL);
1247 id = be32_to_cpup(reg);
1252 EXPORT_SYMBOL_GPL(cpu_to_core_id);
1254 /* Helper routines for cpu to core mapping */
1255 int cpu_core_index_of_thread(int cpu)
1257 return cpu >> threads_shift;
1259 EXPORT_SYMBOL_GPL(cpu_core_index_of_thread);
1261 int cpu_first_thread_of_core(int core)
1263 return core << threads_shift;
1265 EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
1267 /* Must be called when no change can occur to cpu_present_mask,
1268 * i.e. during cpu online or offline.
1270 static struct device_node *cpu_to_l2cache(int cpu)
1272 struct device_node *np;
1273 struct device_node *cache;
1275 if (!cpu_present(cpu))
1278 np = of_get_cpu_node(cpu, NULL);
1282 cache = of_find_next_cache_node(np);
1289 static bool update_mask_by_l2(int cpu, cpumask_var_t *mask)
1291 struct cpumask *(*submask_fn)(int) = cpu_sibling_mask;
1292 struct device_node *l2_cache, *np;
1296 submask_fn = cpu_smallcore_mask;
1298 l2_cache = cpu_to_l2cache(cpu);
1299 if (!l2_cache || !*mask) {
1300 /* Assume only core siblings share cache with this CPU */
1301 for_each_cpu(i, submask_fn(cpu))
1302 set_cpus_related(cpu, i, cpu_l2_cache_mask);
1307 cpumask_and(*mask, cpu_online_mask, cpu_cpu_mask(cpu));
1309 /* Update l2-cache mask with all the CPUs that are part of submask */
1310 or_cpumasks_related(cpu, cpu, submask_fn, cpu_l2_cache_mask);
1312 /* Skip all CPUs already part of current CPU l2-cache mask */
1313 cpumask_andnot(*mask, *mask, cpu_l2_cache_mask(cpu));
1315 for_each_cpu(i, *mask) {
1317 * when updating the marks the current CPU has not been marked
1318 * online, but we need to update the cache masks
1320 np = cpu_to_l2cache(i);
1322 /* Skip all CPUs already part of current CPU l2-cache */
1323 if (np == l2_cache) {
1324 or_cpumasks_related(cpu, i, submask_fn, cpu_l2_cache_mask);
1325 cpumask_andnot(*mask, *mask, submask_fn(i));
1327 cpumask_andnot(*mask, *mask, cpu_l2_cache_mask(i));
1332 of_node_put(l2_cache);
1337 #ifdef CONFIG_HOTPLUG_CPU
1338 static void remove_cpu_from_masks(int cpu)
1340 struct cpumask *(*mask_fn)(int) = cpu_sibling_mask;
1344 mask_fn = cpu_l2_cache_mask;
1346 for_each_cpu(i, mask_fn(cpu)) {
1347 set_cpus_unrelated(cpu, i, cpu_l2_cache_mask);
1348 set_cpus_unrelated(cpu, i, cpu_sibling_mask);
1350 set_cpus_unrelated(cpu, i, cpu_smallcore_mask);
1353 for_each_cpu(i, cpu_core_mask(cpu))
1354 set_cpus_unrelated(cpu, i, cpu_core_mask);
1356 if (has_coregroup_support()) {
1357 for_each_cpu(i, cpu_coregroup_mask(cpu))
1358 set_cpus_unrelated(cpu, i, cpu_coregroup_mask);
1363 static inline void add_cpu_to_smallcore_masks(int cpu)
1370 cpumask_set_cpu(cpu, cpu_smallcore_mask(cpu));
1372 for_each_cpu(i, per_cpu(cpu_l1_cache_map, cpu)) {
1374 set_cpus_related(i, cpu, cpu_smallcore_mask);
1378 static void update_coregroup_mask(int cpu, cpumask_var_t *mask)
1380 struct cpumask *(*submask_fn)(int) = cpu_sibling_mask;
1381 int coregroup_id = cpu_to_coregroup_id(cpu);
1385 submask_fn = cpu_l2_cache_mask;
1388 /* Assume only siblings are part of this CPU's coregroup */
1389 for_each_cpu(i, submask_fn(cpu))
1390 set_cpus_related(cpu, i, cpu_coregroup_mask);
1395 cpumask_and(*mask, cpu_online_mask, cpu_cpu_mask(cpu));
1397 /* Update coregroup mask with all the CPUs that are part of submask */
1398 or_cpumasks_related(cpu, cpu, submask_fn, cpu_coregroup_mask);
1400 /* Skip all CPUs already part of coregroup mask */
1401 cpumask_andnot(*mask, *mask, cpu_coregroup_mask(cpu));
1403 for_each_cpu(i, *mask) {
1404 /* Skip all CPUs not part of this coregroup */
1405 if (coregroup_id == cpu_to_coregroup_id(i)) {
1406 or_cpumasks_related(cpu, i, submask_fn, cpu_coregroup_mask);
1407 cpumask_andnot(*mask, *mask, submask_fn(i));
1409 cpumask_andnot(*mask, *mask, cpu_coregroup_mask(i));
1414 static void add_cpu_to_masks(int cpu)
1416 struct cpumask *(*submask_fn)(int) = cpu_sibling_mask;
1417 int first_thread = cpu_first_thread_sibling(cpu);
1418 int chip_id = cpu_to_chip_id(cpu);
1424 * This CPU will not be in the online mask yet so we need to manually
1425 * add it to it's own thread sibling mask.
1427 cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));
1428 cpumask_set_cpu(cpu, cpu_core_mask(cpu));
1430 for (i = first_thread; i < first_thread + threads_per_core; i++)
1432 set_cpus_related(i, cpu, cpu_sibling_mask);
1434 add_cpu_to_smallcore_masks(cpu);
1436 /* In CPU-hotplug path, hence use GFP_ATOMIC */
1437 ret = alloc_cpumask_var_node(&mask, GFP_ATOMIC, cpu_to_node(cpu));
1438 update_mask_by_l2(cpu, &mask);
1440 if (has_coregroup_support())
1441 update_coregroup_mask(cpu, &mask);
1444 submask_fn = cpu_l2_cache_mask;
1446 /* Update core_mask with all the CPUs that are part of submask */
1447 or_cpumasks_related(cpu, cpu, submask_fn, cpu_core_mask);
1449 /* Skip all CPUs already part of current CPU core mask */
1450 cpumask_andnot(mask, cpu_online_mask, cpu_core_mask(cpu));
1452 /* If chip_id is -1; limit the cpu_core_mask to within DIE*/
1454 cpumask_and(mask, mask, cpu_cpu_mask(cpu));
1456 for_each_cpu(i, mask) {
1457 if (chip_id == cpu_to_chip_id(i)) {
1458 or_cpumasks_related(cpu, i, submask_fn, cpu_core_mask);
1459 cpumask_andnot(mask, mask, submask_fn(i));
1461 cpumask_andnot(mask, mask, cpu_core_mask(i));
1465 free_cpumask_var(mask);
1468 /* Activate a secondary processor. */
1469 void start_secondary(void *unused)
1471 unsigned int cpu = raw_smp_processor_id();
1474 current->active_mm = &init_mm;
1476 smp_store_cpu_info(cpu);
1477 set_dec(tb_ticks_per_jiffy);
1478 rcu_cpu_starting(cpu);
1479 cpu_callin_map[cpu] = 1;
1481 if (smp_ops->setup_cpu)
1482 smp_ops->setup_cpu(cpu);
1483 if (smp_ops->take_timebase)
1484 smp_ops->take_timebase();
1486 secondary_cpu_time_init();
1489 if (system_state == SYSTEM_RUNNING)
1490 vdso_data->processorCount++;
1494 set_numa_node(numa_cpu_lookup_table[cpu]);
1495 set_numa_mem(local_memory_node(numa_cpu_lookup_table[cpu]));
1497 /* Update topology CPU masks */
1498 add_cpu_to_masks(cpu);
1501 * Check for any shared caches. Note that this must be done on a
1502 * per-core basis because one core in the pair might be disabled.
1504 if (!shared_caches) {
1505 struct cpumask *(*sibling_mask)(int) = cpu_sibling_mask;
1506 struct cpumask *mask = cpu_l2_cache_mask(cpu);
1509 sibling_mask = cpu_smallcore_mask;
1511 if (cpumask_weight(mask) > cpumask_weight(sibling_mask(cpu)))
1512 shared_caches = true;
1516 notify_cpu_starting(cpu);
1517 set_cpu_online(cpu, true);
1519 boot_init_stack_canary();
1523 /* We can enable ftrace for secondary cpus now */
1524 this_cpu_enable_ftrace();
1526 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
1531 #ifdef CONFIG_PROFILING
1532 int setup_profiling_timer(unsigned int multiplier)
1538 static void fixup_topology(void)
1542 #ifdef CONFIG_SCHED_SMT
1543 if (has_big_cores) {
1544 pr_info("Big cores detected but using small core scheduling\n");
1545 powerpc_topology[smt_idx].mask = smallcore_smt_mask;
1549 if (!has_coregroup_support())
1550 powerpc_topology[mc_idx].mask = powerpc_topology[cache_idx].mask;
1553 * Try to consolidate topology levels here instead of
1554 * allowing scheduler to degenerate.
1555 * - Dont consolidate if masks are different.
1556 * - Dont consolidate if sd_flags exists and are different.
1558 for (i = 1; i <= die_idx; i++) {
1559 if (powerpc_topology[i].mask != powerpc_topology[i - 1].mask)
1562 if (powerpc_topology[i].sd_flags && powerpc_topology[i - 1].sd_flags &&
1563 powerpc_topology[i].sd_flags != powerpc_topology[i - 1].sd_flags)
1566 if (!powerpc_topology[i - 1].sd_flags)
1567 powerpc_topology[i - 1].sd_flags = powerpc_topology[i].sd_flags;
1569 powerpc_topology[i].mask = powerpc_topology[i + 1].mask;
1570 powerpc_topology[i].sd_flags = powerpc_topology[i + 1].sd_flags;
1571 #ifdef CONFIG_SCHED_DEBUG
1572 powerpc_topology[i].name = powerpc_topology[i + 1].name;
1577 void __init smp_cpus_done(unsigned int max_cpus)
1580 * We are running pinned to the boot CPU, see rest_init().
1582 if (smp_ops && smp_ops->setup_cpu)
1583 smp_ops->setup_cpu(boot_cpuid);
1585 if (smp_ops && smp_ops->bringup_done)
1586 smp_ops->bringup_done();
1588 dump_numa_cpu_topology();
1591 set_sched_topology(powerpc_topology);
1594 #ifdef CONFIG_HOTPLUG_CPU
1595 int __cpu_disable(void)
1597 int cpu = smp_processor_id();
1600 if (!smp_ops->cpu_disable)
1603 this_cpu_disable_ftrace();
1605 err = smp_ops->cpu_disable();
1609 /* Update sibling maps */
1610 remove_cpu_from_masks(cpu);
1615 void __cpu_die(unsigned int cpu)
1617 if (smp_ops->cpu_die)
1618 smp_ops->cpu_die(cpu);
1621 void arch_cpu_idle_dead(void)
1624 * Disable on the down path. This will be re-enabled by
1625 * start_secondary() via start_secondary_resume() below
1627 this_cpu_disable_ftrace();
1629 if (smp_ops->cpu_offline_self)
1630 smp_ops->cpu_offline_self();
1632 /* If we return, we re-enter start_secondary */
1633 start_secondary_resume();