1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
6 * deal of code from the sparc and intel versions.
8 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
10 * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and
11 * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
16 #include <linux/kernel.h>
17 #include <linux/export.h>
18 #include <linux/sched/mm.h>
19 #include <linux/sched/task_stack.h>
20 #include <linux/sched/topology.h>
21 #include <linux/smp.h>
22 #include <linux/interrupt.h>
23 #include <linux/delay.h>
24 #include <linux/init.h>
25 #include <linux/spinlock.h>
26 #include <linux/cache.h>
27 #include <linux/err.h>
28 #include <linux/device.h>
29 #include <linux/cpu.h>
30 #include <linux/notifier.h>
31 #include <linux/topology.h>
32 #include <linux/profile.h>
33 #include <linux/processor.h>
34 #include <linux/random.h>
35 #include <linux/stackprotector.h>
37 #include <asm/ptrace.h>
38 #include <linux/atomic.h>
40 #include <asm/hw_irq.h>
41 #include <asm/kvm_ppc.h>
42 #include <asm/dbell.h>
44 #include <asm/pgtable.h>
48 #include <asm/machdep.h>
49 #include <asm/cputhreads.h>
50 #include <asm/cputable.h>
52 #include <asm/vdso_datapage.h>
57 #include <asm/debug.h>
58 #include <asm/kexec.h>
59 #include <asm/asm-prototypes.h>
60 #include <asm/cpu_has_feature.h>
61 #include <asm/ftrace.h>
65 #define DBG(fmt...) udbg_printf(fmt)
70 #ifdef CONFIG_HOTPLUG_CPU
71 /* State of each CPU during hotplug phases */
72 static DEFINE_PER_CPU(int, cpu_state) = { 0 };
75 struct task_struct *secondary_current;
78 DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
79 DEFINE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
80 DEFINE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
81 DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
83 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
84 EXPORT_PER_CPU_SYMBOL(cpu_l2_cache_map);
85 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
86 EXPORT_SYMBOL_GPL(has_big_cores);
88 #define MAX_THREAD_LIST_SIZE 8
89 #define THREAD_GROUP_SHARE_L1 1
90 struct thread_groups {
91 unsigned int property;
92 unsigned int nr_groups;
93 unsigned int threads_per_group;
94 unsigned int thread_list[MAX_THREAD_LIST_SIZE];
98 * On big-cores system, cpu_l1_cache_map for each CPU corresponds to
99 * the set its siblings that share the L1-cache.
101 DEFINE_PER_CPU(cpumask_var_t, cpu_l1_cache_map);
103 /* SMP operations for this machine */
104 struct smp_ops_t *smp_ops;
106 /* Can't be static due to PowerMac hackery */
107 volatile unsigned int cpu_callin_map[NR_CPUS];
109 int smt_enabled_at_boot = 1;
112 * Returns 1 if the specified cpu should be brought up during boot.
113 * Used to inhibit booting threads if they've been disabled or
114 * limited on the command line
116 int smp_generic_cpu_bootable(unsigned int nr)
118 /* Special case - we inhibit secondary thread startup
119 * during boot if the user requests it.
121 if (system_state < SYSTEM_RUNNING && cpu_has_feature(CPU_FTR_SMT)) {
122 if (!smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
124 if (smt_enabled_at_boot
125 && cpu_thread_in_core(nr) >= smt_enabled_at_boot)
134 int smp_generic_kick_cpu(int nr)
136 if (nr < 0 || nr >= nr_cpu_ids)
140 * The processor is currently spinning, waiting for the
141 * cpu_start field to become non-zero After we set cpu_start,
142 * the processor will continue on to secondary_start
144 if (!paca_ptrs[nr]->cpu_start) {
145 paca_ptrs[nr]->cpu_start = 1;
150 #ifdef CONFIG_HOTPLUG_CPU
152 * Ok it's not there, so it might be soft-unplugged, let's
153 * try to bring it back
155 generic_set_cpu_up(nr);
157 smp_send_reschedule(nr);
158 #endif /* CONFIG_HOTPLUG_CPU */
162 #endif /* CONFIG_PPC64 */
164 static irqreturn_t call_function_action(int irq, void *data)
166 generic_smp_call_function_interrupt();
170 static irqreturn_t reschedule_action(int irq, void *data)
176 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
177 static irqreturn_t tick_broadcast_ipi_action(int irq, void *data)
179 timer_broadcast_interrupt();
184 #ifdef CONFIG_NMI_IPI
185 static irqreturn_t nmi_ipi_action(int irq, void *data)
187 smp_handle_nmi_ipi(get_irq_regs());
192 static irq_handler_t smp_ipi_action[] = {
193 [PPC_MSG_CALL_FUNCTION] = call_function_action,
194 [PPC_MSG_RESCHEDULE] = reschedule_action,
195 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
196 [PPC_MSG_TICK_BROADCAST] = tick_broadcast_ipi_action,
198 #ifdef CONFIG_NMI_IPI
199 [PPC_MSG_NMI_IPI] = nmi_ipi_action,
204 * The NMI IPI is a fallback and not truly non-maskable. It is simpler
205 * than going through the call function infrastructure, and strongly
206 * serialized, so it is more appropriate for debugging.
208 const char *smp_ipi_name[] = {
209 [PPC_MSG_CALL_FUNCTION] = "ipi call function",
210 [PPC_MSG_RESCHEDULE] = "ipi reschedule",
211 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
212 [PPC_MSG_TICK_BROADCAST] = "ipi tick-broadcast",
214 #ifdef CONFIG_NMI_IPI
215 [PPC_MSG_NMI_IPI] = "nmi ipi",
219 /* optional function to request ipi, for controllers with >= 4 ipis */
220 int smp_request_message_ipi(int virq, int msg)
224 if (msg < 0 || msg > PPC_MSG_NMI_IPI)
226 #ifndef CONFIG_NMI_IPI
227 if (msg == PPC_MSG_NMI_IPI)
231 err = request_irq(virq, smp_ipi_action[msg],
232 IRQF_PERCPU | IRQF_NO_THREAD | IRQF_NO_SUSPEND,
233 smp_ipi_name[msg], NULL);
234 WARN(err < 0, "unable to request_irq %d for %s (rc %d)\n",
235 virq, smp_ipi_name[msg], err);
240 #ifdef CONFIG_PPC_SMP_MUXED_IPI
241 struct cpu_messages {
242 long messages; /* current messages */
244 static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message);
246 void smp_muxed_ipi_set_message(int cpu, int msg)
248 struct cpu_messages *info = &per_cpu(ipi_message, cpu);
249 char *message = (char *)&info->messages;
252 * Order previous accesses before accesses in the IPI handler.
258 void smp_muxed_ipi_message_pass(int cpu, int msg)
260 smp_muxed_ipi_set_message(cpu, msg);
263 * cause_ipi functions are required to include a full barrier
264 * before doing whatever causes the IPI.
266 smp_ops->cause_ipi(cpu);
269 #ifdef __BIG_ENDIAN__
270 #define IPI_MESSAGE(A) (1uL << ((BITS_PER_LONG - 8) - 8 * (A)))
272 #define IPI_MESSAGE(A) (1uL << (8 * (A)))
275 irqreturn_t smp_ipi_demux(void)
277 mb(); /* order any irq clear */
279 return smp_ipi_demux_relaxed();
282 /* sync-free variant. Callers should ensure synchronization */
283 irqreturn_t smp_ipi_demux_relaxed(void)
285 struct cpu_messages *info;
288 info = this_cpu_ptr(&ipi_message);
290 all = xchg(&info->messages, 0);
291 #if defined(CONFIG_KVM_XICS) && defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE)
293 * Must check for PPC_MSG_RM_HOST_ACTION messages
294 * before PPC_MSG_CALL_FUNCTION messages because when
295 * a VM is destroyed, we call kick_all_cpus_sync()
296 * to ensure that any pending PPC_MSG_RM_HOST_ACTION
297 * messages have completed before we free any VCPUs.
299 if (all & IPI_MESSAGE(PPC_MSG_RM_HOST_ACTION))
300 kvmppc_xics_ipi_action();
302 if (all & IPI_MESSAGE(PPC_MSG_CALL_FUNCTION))
303 generic_smp_call_function_interrupt();
304 if (all & IPI_MESSAGE(PPC_MSG_RESCHEDULE))
306 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
307 if (all & IPI_MESSAGE(PPC_MSG_TICK_BROADCAST))
308 timer_broadcast_interrupt();
310 #ifdef CONFIG_NMI_IPI
311 if (all & IPI_MESSAGE(PPC_MSG_NMI_IPI))
312 nmi_ipi_action(0, NULL);
314 } while (info->messages);
318 #endif /* CONFIG_PPC_SMP_MUXED_IPI */
320 static inline void do_message_pass(int cpu, int msg)
322 if (smp_ops->message_pass)
323 smp_ops->message_pass(cpu, msg);
324 #ifdef CONFIG_PPC_SMP_MUXED_IPI
326 smp_muxed_ipi_message_pass(cpu, msg);
330 void smp_send_reschedule(int cpu)
333 do_message_pass(cpu, PPC_MSG_RESCHEDULE);
335 EXPORT_SYMBOL_GPL(smp_send_reschedule);
337 void arch_send_call_function_single_ipi(int cpu)
339 do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
342 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
346 for_each_cpu(cpu, mask)
347 do_message_pass(cpu, PPC_MSG_CALL_FUNCTION);
350 #ifdef CONFIG_NMI_IPI
355 * NMI IPIs may not be recoverable, so should not be used as ongoing part of
356 * a running system. They can be used for crash, debug, halt/reboot, etc.
358 * The IPI call waits with interrupts disabled until all targets enter the
359 * NMI handler, then returns. Subsequent IPIs can be issued before targets
360 * have returned from their handlers, so there is no guarantee about
361 * concurrency or re-entrancy.
363 * A new NMI can be issued before all targets exit the handler.
365 * The IPI call may time out without all targets entering the NMI handler.
366 * In that case, there is some logic to recover (and ignore subsequent
367 * NMI interrupts that may eventually be raised), but the platform interrupt
368 * handler may not be able to distinguish this from other exception causes,
369 * which may cause a crash.
372 static atomic_t __nmi_ipi_lock = ATOMIC_INIT(0);
373 static struct cpumask nmi_ipi_pending_mask;
374 static bool nmi_ipi_busy = false;
375 static void (*nmi_ipi_function)(struct pt_regs *) = NULL;
377 static void nmi_ipi_lock_start(unsigned long *flags)
379 raw_local_irq_save(*flags);
381 while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1) {
382 raw_local_irq_restore(*flags);
383 spin_until_cond(atomic_read(&__nmi_ipi_lock) == 0);
384 raw_local_irq_save(*flags);
389 static void nmi_ipi_lock(void)
391 while (atomic_cmpxchg(&__nmi_ipi_lock, 0, 1) == 1)
392 spin_until_cond(atomic_read(&__nmi_ipi_lock) == 0);
395 static void nmi_ipi_unlock(void)
398 WARN_ON(atomic_read(&__nmi_ipi_lock) != 1);
399 atomic_set(&__nmi_ipi_lock, 0);
402 static void nmi_ipi_unlock_end(unsigned long *flags)
405 raw_local_irq_restore(*flags);
409 * Platform NMI handler calls this to ack
411 int smp_handle_nmi_ipi(struct pt_regs *regs)
413 void (*fn)(struct pt_regs *) = NULL;
415 int me = raw_smp_processor_id();
419 * Unexpected NMIs are possible here because the interrupt may not
420 * be able to distinguish NMI IPIs from other types of NMIs, or
421 * because the caller may have timed out.
423 nmi_ipi_lock_start(&flags);
424 if (cpumask_test_cpu(me, &nmi_ipi_pending_mask)) {
425 cpumask_clear_cpu(me, &nmi_ipi_pending_mask);
426 fn = READ_ONCE(nmi_ipi_function);
430 nmi_ipi_unlock_end(&flags);
438 static void do_smp_send_nmi_ipi(int cpu, bool safe)
440 if (!safe && smp_ops->cause_nmi_ipi && smp_ops->cause_nmi_ipi(cpu))
444 do_message_pass(cpu, PPC_MSG_NMI_IPI);
448 for_each_online_cpu(c) {
449 if (c == raw_smp_processor_id())
451 do_message_pass(c, PPC_MSG_NMI_IPI);
457 * - cpu is the target CPU (must not be this CPU), or NMI_IPI_ALL_OTHERS.
458 * - fn is the target callback function.
459 * - delay_us > 0 is the delay before giving up waiting for targets to
460 * begin executing the handler, == 0 specifies indefinite delay.
462 static int __smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *),
463 u64 delay_us, bool safe)
466 int me = raw_smp_processor_id();
470 BUG_ON(cpu < 0 && cpu != NMI_IPI_ALL_OTHERS);
472 if (unlikely(!smp_ops))
475 nmi_ipi_lock_start(&flags);
476 while (nmi_ipi_busy) {
477 nmi_ipi_unlock_end(&flags);
478 spin_until_cond(!nmi_ipi_busy);
479 nmi_ipi_lock_start(&flags);
482 nmi_ipi_function = fn;
484 WARN_ON_ONCE(!cpumask_empty(&nmi_ipi_pending_mask));
488 cpumask_copy(&nmi_ipi_pending_mask, cpu_online_mask);
489 cpumask_clear_cpu(me, &nmi_ipi_pending_mask);
491 cpumask_set_cpu(cpu, &nmi_ipi_pending_mask);
496 /* Interrupts remain hard disabled */
498 do_smp_send_nmi_ipi(cpu, safe);
501 /* nmi_ipi_busy is set here, so unlock/lock is okay */
502 while (!cpumask_empty(&nmi_ipi_pending_mask)) {
513 if (!cpumask_empty(&nmi_ipi_pending_mask)) {
514 /* Timeout waiting for CPUs to call smp_handle_nmi_ipi */
516 cpumask_clear(&nmi_ipi_pending_mask);
519 nmi_ipi_function = NULL;
520 nmi_ipi_busy = false;
522 nmi_ipi_unlock_end(&flags);
527 int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us)
529 return __smp_send_nmi_ipi(cpu, fn, delay_us, false);
532 int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us)
534 return __smp_send_nmi_ipi(cpu, fn, delay_us, true);
536 #endif /* CONFIG_NMI_IPI */
538 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
539 void tick_broadcast(const struct cpumask *mask)
543 for_each_cpu(cpu, mask)
544 do_message_pass(cpu, PPC_MSG_TICK_BROADCAST);
548 #ifdef CONFIG_DEBUGGER
549 void debugger_ipi_callback(struct pt_regs *regs)
554 void smp_send_debugger_break(void)
556 smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, debugger_ipi_callback, 1000000);
560 #ifdef CONFIG_KEXEC_CORE
561 void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *))
565 smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, crash_ipi_callback, 1000000);
566 if (kdump_in_progress() && crash_wake_offline) {
567 for_each_present_cpu(cpu) {
571 * crash_ipi_callback will wait for
572 * all cpus, including offline CPUs.
573 * We don't care about nmi_ipi_function.
574 * Offline cpus will jump straight into
575 * crash_ipi_callback, we can skip the
576 * entire NMI dance and waiting for
577 * cpus to clear pending mask, etc.
579 do_smp_send_nmi_ipi(cpu, false);
585 #ifdef CONFIG_NMI_IPI
586 static void crash_stop_this_cpu(struct pt_regs *regs)
588 static void crash_stop_this_cpu(void *dummy)
592 * Just busy wait here and avoid marking CPU as offline to ensure
593 * register data is captured appropriately.
599 void crash_smp_send_stop(void)
601 static bool stopped = false;
608 #ifdef CONFIG_NMI_IPI
609 smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, crash_stop_this_cpu, 1000000);
611 smp_call_function(crash_stop_this_cpu, NULL, 0);
612 #endif /* CONFIG_NMI_IPI */
615 #ifdef CONFIG_NMI_IPI
616 static void nmi_stop_this_cpu(struct pt_regs *regs)
619 * IRQs are already hard disabled by the smp_handle_nmi_ipi.
621 set_cpu_online(smp_processor_id(), false);
628 void smp_send_stop(void)
630 smp_send_nmi_ipi(NMI_IPI_ALL_OTHERS, nmi_stop_this_cpu, 1000000);
633 #else /* CONFIG_NMI_IPI */
635 static void stop_this_cpu(void *dummy)
640 * Offlining CPUs in stop_this_cpu can result in scheduler warnings,
641 * (see commit de6e5d38417e), but printk_safe_flush_on_panic() wants
642 * to know other CPUs are offline before it breaks locks to flush
643 * printk buffers, in case we panic()ed while holding the lock.
645 set_cpu_online(smp_processor_id(), false);
652 void smp_send_stop(void)
654 static bool stopped = false;
657 * Prevent waiting on csd lock from a previous smp_send_stop.
658 * This is racy, but in general callers try to do the right
659 * thing and only fire off one smp_send_stop (e.g., see
667 smp_call_function(stop_this_cpu, NULL, 0);
669 #endif /* CONFIG_NMI_IPI */
671 struct task_struct *current_set[NR_CPUS];
673 static void smp_store_cpu_info(int id)
675 per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR);
676 #ifdef CONFIG_PPC_FSL_BOOK3E
677 per_cpu(next_tlbcam_idx, id)
678 = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1;
683 * Relationships between CPUs are maintained in a set of per-cpu cpumasks so
684 * rather than just passing around the cpumask we pass around a function that
685 * returns the that cpumask for the given CPU.
687 static void set_cpus_related(int i, int j, struct cpumask *(*get_cpumask)(int))
689 cpumask_set_cpu(i, get_cpumask(j));
690 cpumask_set_cpu(j, get_cpumask(i));
693 #ifdef CONFIG_HOTPLUG_CPU
694 static void set_cpus_unrelated(int i, int j,
695 struct cpumask *(*get_cpumask)(int))
697 cpumask_clear_cpu(i, get_cpumask(j));
698 cpumask_clear_cpu(j, get_cpumask(i));
703 * parse_thread_groups: Parses the "ibm,thread-groups" device tree
704 * property for the CPU device node @dn and stores
705 * the parsed output in the thread_groups
706 * structure @tg if the ibm,thread-groups[0]
709 * @dn: The device node of the CPU device.
710 * @tg: Pointer to a thread group structure into which the parsed
711 * output of "ibm,thread-groups" is stored.
712 * @property: The property of the thread-group that the caller is
715 * ibm,thread-groups[0..N-1] array defines which group of threads in
716 * the CPU-device node can be grouped together based on the property.
718 * ibm,thread-groups[0] tells us the property based on which the
719 * threads are being grouped together. If this value is 1, it implies
720 * that the threads in the same group share L1, translation cache.
722 * ibm,thread-groups[1] tells us how many such thread groups exist.
724 * ibm,thread-groups[2] tells us the number of threads in each such
727 * ibm,thread-groups[3..N-1] is the list of threads identified by
728 * "ibm,ppc-interrupt-server#s" arranged as per their membership in
731 * Example: If ibm,thread-groups = [1,2,4,5,6,7,8,9,10,11,12] it
732 * implies that there are 2 groups of 4 threads each, where each group
733 * of threads share L1, translation cache.
735 * The "ibm,ppc-interrupt-server#s" of the first group is {5,6,7,8}
736 * and the "ibm,ppc-interrupt-server#s" of the second group is {9, 10,
739 * Returns 0 on success, -EINVAL if the property does not exist,
740 * -ENODATA if property does not have a value, and -EOVERFLOW if the
741 * property data isn't large enough.
743 static int parse_thread_groups(struct device_node *dn,
744 struct thread_groups *tg,
745 unsigned int property)
748 u32 thread_group_array[3 + MAX_THREAD_LIST_SIZE];
750 size_t total_threads;
753 ret = of_property_read_u32_array(dn, "ibm,thread-groups",
754 thread_group_array, 3);
758 tg->property = thread_group_array[0];
759 tg->nr_groups = thread_group_array[1];
760 tg->threads_per_group = thread_group_array[2];
761 if (tg->property != property ||
763 tg->threads_per_group < 1)
766 total_threads = tg->nr_groups * tg->threads_per_group;
768 ret = of_property_read_u32_array(dn, "ibm,thread-groups",
774 thread_list = &thread_group_array[3];
776 for (i = 0 ; i < total_threads; i++)
777 tg->thread_list[i] = thread_list[i];
783 * get_cpu_thread_group_start : Searches the thread group in tg->thread_list
784 * that @cpu belongs to.
786 * @cpu : The logical CPU whose thread group is being searched.
787 * @tg : The thread-group structure of the CPU node which @cpu belongs
790 * Returns the index to tg->thread_list that points to the the start
791 * of the thread_group that @cpu belongs to.
793 * Returns -1 if cpu doesn't belong to any of the groups pointed to by
796 static int get_cpu_thread_group_start(int cpu, struct thread_groups *tg)
798 int hw_cpu_id = get_hard_smp_processor_id(cpu);
801 for (i = 0; i < tg->nr_groups; i++) {
802 int group_start = i * tg->threads_per_group;
804 for (j = 0; j < tg->threads_per_group; j++) {
805 int idx = group_start + j;
807 if (tg->thread_list[idx] == hw_cpu_id)
815 static int init_cpu_l1_cache_map(int cpu)
818 struct device_node *dn = of_get_cpu_node(cpu, NULL);
819 struct thread_groups tg = {.property = 0,
821 .threads_per_group = 0};
822 int first_thread = cpu_first_thread_sibling(cpu);
823 int i, cpu_group_start = -1, err = 0;
828 err = parse_thread_groups(dn, &tg, THREAD_GROUP_SHARE_L1);
832 zalloc_cpumask_var_node(&per_cpu(cpu_l1_cache_map, cpu),
836 cpu_group_start = get_cpu_thread_group_start(cpu, &tg);
838 if (unlikely(cpu_group_start == -1)) {
844 for (i = first_thread; i < first_thread + threads_per_core; i++) {
845 int i_group_start = get_cpu_thread_group_start(i, &tg);
847 if (unlikely(i_group_start == -1)) {
853 if (i_group_start == cpu_group_start)
854 cpumask_set_cpu(i, per_cpu(cpu_l1_cache_map, cpu));
862 static int init_big_cores(void)
866 for_each_possible_cpu(cpu) {
867 int err = init_cpu_l1_cache_map(cpu);
872 zalloc_cpumask_var_node(&per_cpu(cpu_smallcore_map, cpu),
877 has_big_cores = true;
881 void __init smp_prepare_cpus(unsigned int max_cpus)
885 DBG("smp_prepare_cpus\n");
888 * setup_cpu may need to be called on the boot cpu. We havent
889 * spun any cpus up but lets be paranoid.
891 BUG_ON(boot_cpuid != smp_processor_id());
894 smp_store_cpu_info(boot_cpuid);
895 cpu_callin_map[boot_cpuid] = 1;
897 for_each_possible_cpu(cpu) {
898 zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu),
899 GFP_KERNEL, cpu_to_node(cpu));
900 zalloc_cpumask_var_node(&per_cpu(cpu_l2_cache_map, cpu),
901 GFP_KERNEL, cpu_to_node(cpu));
902 zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu),
903 GFP_KERNEL, cpu_to_node(cpu));
905 * numa_node_id() works after this.
907 if (cpu_present(cpu)) {
908 set_cpu_numa_node(cpu, numa_cpu_lookup_table[cpu]);
909 set_cpu_numa_mem(cpu,
910 local_memory_node(numa_cpu_lookup_table[cpu]));
914 /* Init the cpumasks so the boot CPU is related to itself */
915 cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid));
916 cpumask_set_cpu(boot_cpuid, cpu_l2_cache_mask(boot_cpuid));
917 cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid));
921 cpumask_set_cpu(boot_cpuid,
922 cpu_smallcore_mask(boot_cpuid));
925 if (smp_ops && smp_ops->probe)
929 void smp_prepare_boot_cpu(void)
931 BUG_ON(smp_processor_id() != boot_cpuid);
933 paca_ptrs[boot_cpuid]->__current = current;
935 set_numa_node(numa_cpu_lookup_table[boot_cpuid]);
936 current_set[boot_cpuid] = current;
939 #ifdef CONFIG_HOTPLUG_CPU
941 int generic_cpu_disable(void)
943 unsigned int cpu = smp_processor_id();
945 if (cpu == boot_cpuid)
948 set_cpu_online(cpu, false);
950 vdso_data->processorCount--;
952 /* Update affinity of all IRQs previously aimed at this CPU */
953 irq_migrate_all_off_this_cpu();
956 * Depending on the details of the interrupt controller, it's possible
957 * that one of the interrupts we just migrated away from this CPU is
958 * actually already pending on this CPU. If we leave it in that state
959 * the interrupt will never be EOI'ed, and will never fire again. So
960 * temporarily enable interrupts here, to allow any pending interrupt to
961 * be received (and EOI'ed), before we take this CPU offline.
970 void generic_cpu_die(unsigned int cpu)
974 for (i = 0; i < 100; i++) {
976 if (is_cpu_dead(cpu))
980 printk(KERN_ERR "CPU%d didn't die...\n", cpu);
983 void generic_set_cpu_dead(unsigned int cpu)
985 per_cpu(cpu_state, cpu) = CPU_DEAD;
989 * The cpu_state should be set to CPU_UP_PREPARE in kick_cpu(), otherwise
990 * the cpu_state is always CPU_DEAD after calling generic_set_cpu_dead(),
991 * which makes the delay in generic_cpu_die() not happen.
993 void generic_set_cpu_up(unsigned int cpu)
995 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
998 int generic_check_cpu_restart(unsigned int cpu)
1000 return per_cpu(cpu_state, cpu) == CPU_UP_PREPARE;
1003 int is_cpu_dead(unsigned int cpu)
1005 return per_cpu(cpu_state, cpu) == CPU_DEAD;
1008 static bool secondaries_inhibited(void)
1010 return kvm_hv_mode_active();
1013 #else /* HOTPLUG_CPU */
1015 #define secondaries_inhibited() 0
1019 static void cpu_idle_thread_init(unsigned int cpu, struct task_struct *idle)
1022 paca_ptrs[cpu]->__current = idle;
1023 paca_ptrs[cpu]->kstack = (unsigned long)task_stack_page(idle) +
1024 THREAD_SIZE - STACK_FRAME_OVERHEAD;
1027 secondary_current = current_set[cpu] = idle;
1030 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
1035 * Don't allow secondary threads to come online if inhibited
1037 if (threads_per_core > 1 && secondaries_inhibited() &&
1038 cpu_thread_in_subcore(cpu))
1041 if (smp_ops == NULL ||
1042 (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu)))
1045 cpu_idle_thread_init(cpu, tidle);
1048 * The platform might need to allocate resources prior to bringing
1051 if (smp_ops->prepare_cpu) {
1052 rc = smp_ops->prepare_cpu(cpu);
1057 /* Make sure callin-map entry is 0 (can be leftover a CPU
1060 cpu_callin_map[cpu] = 0;
1062 /* The information for processor bringup must
1063 * be written out to main store before we release
1069 DBG("smp: kicking cpu %d\n", cpu);
1070 rc = smp_ops->kick_cpu(cpu);
1072 pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc);
1077 * wait to see if the cpu made a callin (is actually up).
1078 * use this value that I found through experimentation.
1081 if (system_state < SYSTEM_RUNNING)
1082 for (c = 50000; c && !cpu_callin_map[cpu]; c--)
1084 #ifdef CONFIG_HOTPLUG_CPU
1087 * CPUs can take much longer to come up in the
1088 * hotplug case. Wait five seconds.
1090 for (c = 5000; c && !cpu_callin_map[cpu]; c--)
1094 if (!cpu_callin_map[cpu]) {
1095 printk(KERN_ERR "Processor %u is stuck.\n", cpu);
1099 DBG("Processor %u found.\n", cpu);
1101 if (smp_ops->give_timebase)
1102 smp_ops->give_timebase();
1104 /* Wait until cpu puts itself in the online & active maps */
1105 spin_until_cond(cpu_online(cpu));
1110 /* Return the value of the reg property corresponding to the given
1113 int cpu_to_core_id(int cpu)
1115 struct device_node *np;
1119 np = of_get_cpu_node(cpu, NULL);
1123 reg = of_get_property(np, "reg", NULL);
1127 id = be32_to_cpup(reg);
1132 EXPORT_SYMBOL_GPL(cpu_to_core_id);
1134 /* Helper routines for cpu to core mapping */
1135 int cpu_core_index_of_thread(int cpu)
1137 return cpu >> threads_shift;
1139 EXPORT_SYMBOL_GPL(cpu_core_index_of_thread);
1141 int cpu_first_thread_of_core(int core)
1143 return core << threads_shift;
1145 EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
1147 /* Must be called when no change can occur to cpu_present_mask,
1148 * i.e. during cpu online or offline.
1150 static struct device_node *cpu_to_l2cache(int cpu)
1152 struct device_node *np;
1153 struct device_node *cache;
1155 if (!cpu_present(cpu))
1158 np = of_get_cpu_node(cpu, NULL);
1162 cache = of_find_next_cache_node(np);
1169 static bool update_mask_by_l2(int cpu, struct cpumask *(*mask_fn)(int))
1171 struct device_node *l2_cache, *np;
1174 l2_cache = cpu_to_l2cache(cpu);
1178 for_each_cpu(i, cpu_online_mask) {
1180 * when updating the marks the current CPU has not been marked
1181 * online, but we need to update the cache masks
1183 np = cpu_to_l2cache(i);
1188 set_cpus_related(cpu, i, mask_fn);
1192 of_node_put(l2_cache);
1197 #ifdef CONFIG_HOTPLUG_CPU
1198 static void remove_cpu_from_masks(int cpu)
1202 /* NB: cpu_core_mask is a superset of the others */
1203 for_each_cpu(i, cpu_core_mask(cpu)) {
1204 set_cpus_unrelated(cpu, i, cpu_core_mask);
1205 set_cpus_unrelated(cpu, i, cpu_l2_cache_mask);
1206 set_cpus_unrelated(cpu, i, cpu_sibling_mask);
1208 set_cpus_unrelated(cpu, i, cpu_smallcore_mask);
1213 static inline void add_cpu_to_smallcore_masks(int cpu)
1215 struct cpumask *this_l1_cache_map = per_cpu(cpu_l1_cache_map, cpu);
1216 int i, first_thread = cpu_first_thread_sibling(cpu);
1221 cpumask_set_cpu(cpu, cpu_smallcore_mask(cpu));
1223 for (i = first_thread; i < first_thread + threads_per_core; i++) {
1224 if (cpu_online(i) && cpumask_test_cpu(i, this_l1_cache_map))
1225 set_cpus_related(i, cpu, cpu_smallcore_mask);
1229 static void add_cpu_to_masks(int cpu)
1231 int first_thread = cpu_first_thread_sibling(cpu);
1232 int chipid = cpu_to_chip_id(cpu);
1236 * This CPU will not be in the online mask yet so we need to manually
1237 * add it to it's own thread sibling mask.
1239 cpumask_set_cpu(cpu, cpu_sibling_mask(cpu));
1241 for (i = first_thread; i < first_thread + threads_per_core; i++)
1243 set_cpus_related(i, cpu, cpu_sibling_mask);
1245 add_cpu_to_smallcore_masks(cpu);
1247 * Copy the thread sibling mask into the cache sibling mask
1248 * and mark any CPUs that share an L2 with this CPU.
1250 for_each_cpu(i, cpu_sibling_mask(cpu))
1251 set_cpus_related(cpu, i, cpu_l2_cache_mask);
1252 update_mask_by_l2(cpu, cpu_l2_cache_mask);
1255 * Copy the cache sibling mask into core sibling mask and mark
1256 * any CPUs on the same chip as this CPU.
1258 for_each_cpu(i, cpu_l2_cache_mask(cpu))
1259 set_cpus_related(cpu, i, cpu_core_mask);
1264 for_each_cpu(i, cpu_online_mask)
1265 if (cpu_to_chip_id(i) == chipid)
1266 set_cpus_related(cpu, i, cpu_core_mask);
1269 static bool shared_caches;
1271 /* Activate a secondary processor. */
1272 void start_secondary(void *unused)
1274 unsigned int cpu = smp_processor_id();
1275 struct cpumask *(*sibling_mask)(int) = cpu_sibling_mask;
1278 current->active_mm = &init_mm;
1280 smp_store_cpu_info(cpu);
1281 set_dec(tb_ticks_per_jiffy);
1283 cpu_callin_map[cpu] = 1;
1285 if (smp_ops->setup_cpu)
1286 smp_ops->setup_cpu(cpu);
1287 if (smp_ops->take_timebase)
1288 smp_ops->take_timebase();
1290 secondary_cpu_time_init();
1293 if (system_state == SYSTEM_RUNNING)
1294 vdso_data->processorCount++;
1298 set_numa_node(numa_cpu_lookup_table[cpu]);
1299 set_numa_mem(local_memory_node(numa_cpu_lookup_table[cpu]));
1301 /* Update topology CPU masks */
1302 add_cpu_to_masks(cpu);
1305 sibling_mask = cpu_smallcore_mask;
1307 * Check for any shared caches. Note that this must be done on a
1308 * per-core basis because one core in the pair might be disabled.
1310 if (!cpumask_equal(cpu_l2_cache_mask(cpu), sibling_mask(cpu)))
1311 shared_caches = true;
1314 notify_cpu_starting(cpu);
1315 set_cpu_online(cpu, true);
1317 boot_init_stack_canary();
1321 /* We can enable ftrace for secondary cpus now */
1322 this_cpu_enable_ftrace();
1324 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
1329 #ifdef CONFIG_PROFILING
1330 int setup_profiling_timer(unsigned int multiplier)
1336 #ifdef CONFIG_SCHED_SMT
1337 /* cpumask of CPUs with asymetric SMT dependancy */
1338 static int powerpc_smt_flags(void)
1340 int flags = SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES;
1342 if (cpu_has_feature(CPU_FTR_ASYM_SMT)) {
1343 printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n");
1344 flags |= SD_ASYM_PACKING;
1350 static struct sched_domain_topology_level powerpc_topology[] = {
1351 #ifdef CONFIG_SCHED_SMT
1352 { cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) },
1354 { cpu_cpu_mask, SD_INIT_NAME(DIE) },
1359 * P9 has a slightly odd architecture where pairs of cores share an L2 cache.
1360 * This topology makes it *much* cheaper to migrate tasks between adjacent cores
1361 * since the migrated task remains cache hot. We want to take advantage of this
1362 * at the scheduler level so an extra topology level is required.
1364 static int powerpc_shared_cache_flags(void)
1366 return SD_SHARE_PKG_RESOURCES;
1370 * We can't just pass cpu_l2_cache_mask() directly because
1371 * returns a non-const pointer and the compiler barfs on that.
1373 static const struct cpumask *shared_cache_mask(int cpu)
1375 return cpu_l2_cache_mask(cpu);
1378 #ifdef CONFIG_SCHED_SMT
1379 static const struct cpumask *smallcore_smt_mask(int cpu)
1381 return cpu_smallcore_mask(cpu);
1385 static struct sched_domain_topology_level power9_topology[] = {
1386 #ifdef CONFIG_SCHED_SMT
1387 { cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) },
1389 { shared_cache_mask, powerpc_shared_cache_flags, SD_INIT_NAME(CACHE) },
1390 { cpu_cpu_mask, SD_INIT_NAME(DIE) },
1394 void __init smp_cpus_done(unsigned int max_cpus)
1397 * We are running pinned to the boot CPU, see rest_init().
1399 if (smp_ops && smp_ops->setup_cpu)
1400 smp_ops->setup_cpu(boot_cpuid);
1402 if (smp_ops && smp_ops->bringup_done)
1403 smp_ops->bringup_done();
1406 * On a shared LPAR, associativity needs to be requested.
1407 * Hence, get numa topology before dumping cpu topology
1409 shared_proc_topology_init();
1410 dump_numa_cpu_topology();
1412 #ifdef CONFIG_SCHED_SMT
1413 if (has_big_cores) {
1414 pr_info("Using small cores at SMT level\n");
1415 power9_topology[0].mask = smallcore_smt_mask;
1416 powerpc_topology[0].mask = smallcore_smt_mask;
1420 * If any CPU detects that it's sharing a cache with another CPU then
1421 * use the deeper topology that is aware of this sharing.
1423 if (shared_caches) {
1424 pr_info("Using shared cache scheduler topology\n");
1425 set_sched_topology(power9_topology);
1427 pr_info("Using standard scheduler topology\n");
1428 set_sched_topology(powerpc_topology);
1432 #ifdef CONFIG_HOTPLUG_CPU
1433 int __cpu_disable(void)
1435 int cpu = smp_processor_id();
1438 if (!smp_ops->cpu_disable)
1441 this_cpu_disable_ftrace();
1443 err = smp_ops->cpu_disable();
1447 /* Update sibling maps */
1448 remove_cpu_from_masks(cpu);
1453 void __cpu_die(unsigned int cpu)
1455 if (smp_ops->cpu_die)
1456 smp_ops->cpu_die(cpu);
1462 * Disable on the down path. This will be re-enabled by
1463 * start_secondary() via start_secondary_resume() below
1465 this_cpu_disable_ftrace();
1470 /* If we return, we re-enter start_secondary */
1471 start_secondary_resume();