1 // SPDX-License-Identifier: GPL-2.0+
3 // Security related flags and so on.
5 // Copyright 2018, Michael Ellerman, IBM Corporation.
8 #include <linux/kernel.h>
9 #include <linux/debugfs.h>
10 #include <linux/device.h>
11 #include <linux/seq_buf.h>
13 #include <asm/asm-prototypes.h>
14 #include <asm/code-patching.h>
15 #include <asm/debug.h>
16 #include <asm/security_features.h>
17 #include <asm/setup.h>
20 unsigned long powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
22 enum count_cache_flush_type {
23 COUNT_CACHE_FLUSH_NONE = 0x1,
24 COUNT_CACHE_FLUSH_SW = 0x2,
25 COUNT_CACHE_FLUSH_HW = 0x4,
27 static enum count_cache_flush_type count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
28 static bool link_stack_flush_enabled;
30 bool barrier_nospec_enabled;
31 static bool no_nospec;
32 static bool btb_flush_enabled;
33 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
34 static bool no_spectrev2;
37 static void enable_barrier_nospec(bool enable)
39 barrier_nospec_enabled = enable;
40 do_barrier_nospec_fixups(enable);
43 void setup_barrier_nospec(void)
48 * It would make sense to check SEC_FTR_SPEC_BAR_ORI31 below as well.
49 * But there's a good reason not to. The two flags we check below are
50 * both are enabled by default in the kernel, so if the hcall is not
51 * functional they will be enabled.
52 * On a system where the host firmware has been updated (so the ori
53 * functions as a barrier), but on which the hypervisor (KVM/Qemu) has
54 * not been updated, we would like to enable the barrier. Dropping the
55 * check for SEC_FTR_SPEC_BAR_ORI31 achieves that. The only downside is
56 * we potentially enable the barrier on systems where the host firmware
57 * is not updated, but that's harmless as it's a no-op.
59 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
60 security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR);
63 enable_barrier_nospec(enable);
66 static int __init handle_nospectre_v1(char *p)
72 early_param("nospectre_v1", handle_nospectre_v1);
74 #ifdef CONFIG_DEBUG_FS
75 static int barrier_nospec_set(void *data, u64 val)
85 if (!!val == !!barrier_nospec_enabled)
88 enable_barrier_nospec(!!val);
93 static int barrier_nospec_get(void *data, u64 *val)
95 *val = barrier_nospec_enabled ? 1 : 0;
99 DEFINE_SIMPLE_ATTRIBUTE(fops_barrier_nospec,
100 barrier_nospec_get, barrier_nospec_set, "%llu\n");
102 static __init int barrier_nospec_debugfs_init(void)
104 debugfs_create_file("barrier_nospec", 0600, powerpc_debugfs_root, NULL,
105 &fops_barrier_nospec);
108 device_initcall(barrier_nospec_debugfs_init);
109 #endif /* CONFIG_DEBUG_FS */
111 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
112 static int __init handle_nospectre_v2(char *p)
118 early_param("nospectre_v2", handle_nospectre_v2);
119 #endif /* CONFIG_PPC_FSL_BOOK3E || CONFIG_PPC_BOOK3S_64 */
121 #ifdef CONFIG_PPC_FSL_BOOK3E
122 void setup_spectre_v2(void)
125 do_btb_flush_fixups();
127 btb_flush_enabled = true;
129 #endif /* CONFIG_PPC_FSL_BOOK3E */
131 #ifdef CONFIG_PPC_BOOK3S_64
132 ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
136 thread_priv = security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV);
140 seq_buf_init(&s, buf, PAGE_SIZE - 1);
142 seq_buf_printf(&s, "Mitigation: RFI Flush");
144 seq_buf_printf(&s, ", L1D private per thread");
146 seq_buf_printf(&s, "\n");
152 return sprintf(buf, "Vulnerable: L1D private per thread\n");
154 if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
155 !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
156 return sprintf(buf, "Not affected\n");
158 return sprintf(buf, "Vulnerable\n");
161 ssize_t cpu_show_l1tf(struct device *dev, struct device_attribute *attr, char *buf)
163 return cpu_show_meltdown(dev, attr, buf);
167 ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
171 seq_buf_init(&s, buf, PAGE_SIZE - 1);
173 if (security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR)) {
174 if (barrier_nospec_enabled)
175 seq_buf_printf(&s, "Mitigation: __user pointer sanitization");
177 seq_buf_printf(&s, "Vulnerable");
179 if (security_ftr_enabled(SEC_FTR_SPEC_BAR_ORI31))
180 seq_buf_printf(&s, ", ori31 speculation barrier enabled");
182 seq_buf_printf(&s, "\n");
184 seq_buf_printf(&s, "Not affected\n");
189 ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
194 seq_buf_init(&s, buf, PAGE_SIZE - 1);
196 bcs = security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED);
197 ccd = security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED);
200 seq_buf_printf(&s, "Mitigation: ");
203 seq_buf_printf(&s, "Indirect branch serialisation (kernel only)");
206 seq_buf_printf(&s, ", ");
209 seq_buf_printf(&s, "Indirect branch cache disabled");
211 if (link_stack_flush_enabled)
212 seq_buf_printf(&s, ", Software link stack flush");
214 } else if (count_cache_flush_type != COUNT_CACHE_FLUSH_NONE) {
215 seq_buf_printf(&s, "Mitigation: Software count cache flush");
217 if (count_cache_flush_type == COUNT_CACHE_FLUSH_HW)
218 seq_buf_printf(&s, " (hardware accelerated)");
220 if (link_stack_flush_enabled)
221 seq_buf_printf(&s, ", Software link stack flush");
223 } else if (btb_flush_enabled) {
224 seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
226 seq_buf_printf(&s, "Vulnerable");
229 seq_buf_printf(&s, "\n");
234 #ifdef CONFIG_PPC_BOOK3S_64
236 * Store-forwarding barrier support.
239 static enum stf_barrier_type stf_enabled_flush_types;
240 static bool no_stf_barrier;
243 static int __init handle_no_stf_barrier(char *p)
245 pr_info("stf-barrier: disabled on command line.");
246 no_stf_barrier = true;
250 early_param("no_stf_barrier", handle_no_stf_barrier);
252 /* This is the generic flag used by other architectures */
253 static int __init handle_ssbd(char *p)
255 if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) {
256 /* Until firmware tells us, we have the barrier with auto */
258 } else if (strncmp(p, "off", 3) == 0) {
259 handle_no_stf_barrier(NULL);
266 early_param("spec_store_bypass_disable", handle_ssbd);
268 /* This is the generic flag used by other architectures */
269 static int __init handle_no_ssbd(char *p)
271 handle_no_stf_barrier(NULL);
274 early_param("nospec_store_bypass_disable", handle_no_ssbd);
276 static void stf_barrier_enable(bool enable)
279 do_stf_barrier_fixups(stf_enabled_flush_types);
281 do_stf_barrier_fixups(STF_BARRIER_NONE);
283 stf_barrier = enable;
286 void setup_stf_barrier(void)
288 enum stf_barrier_type type;
291 hv = cpu_has_feature(CPU_FTR_HVMODE);
293 /* Default to fallback in case fw-features are not available */
294 if (cpu_has_feature(CPU_FTR_ARCH_300))
295 type = STF_BARRIER_EIEIO;
296 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
297 type = STF_BARRIER_SYNC_ORI;
298 else if (cpu_has_feature(CPU_FTR_ARCH_206))
299 type = STF_BARRIER_FALLBACK;
301 type = STF_BARRIER_NONE;
303 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
304 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) ||
305 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv));
307 if (type == STF_BARRIER_FALLBACK) {
308 pr_info("stf-barrier: fallback barrier available\n");
309 } else if (type == STF_BARRIER_SYNC_ORI) {
310 pr_info("stf-barrier: hwsync barrier available\n");
311 } else if (type == STF_BARRIER_EIEIO) {
312 pr_info("stf-barrier: eieio barrier available\n");
315 stf_enabled_flush_types = type;
318 stf_barrier_enable(enable);
321 ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
323 if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) {
325 switch (stf_enabled_flush_types) {
326 case STF_BARRIER_EIEIO:
329 case STF_BARRIER_SYNC_ORI:
332 case STF_BARRIER_FALLBACK:
338 return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type);
341 if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
342 !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
343 return sprintf(buf, "Not affected\n");
345 return sprintf(buf, "Vulnerable\n");
348 #ifdef CONFIG_DEBUG_FS
349 static int stf_barrier_set(void *data, u64 val)
360 /* Only do anything if we're changing state */
361 if (enable != stf_barrier)
362 stf_barrier_enable(enable);
367 static int stf_barrier_get(void *data, u64 *val)
369 *val = stf_barrier ? 1 : 0;
373 DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set, "%llu\n");
375 static __init int stf_barrier_debugfs_init(void)
377 debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root, NULL, &fops_stf_barrier);
380 device_initcall(stf_barrier_debugfs_init);
381 #endif /* CONFIG_DEBUG_FS */
383 static void no_count_cache_flush(void)
385 count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
386 pr_info("count-cache-flush: software flush disabled.\n");
389 static void toggle_count_cache_flush(bool enable)
391 if (!security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE) &&
392 !security_ftr_enabled(SEC_FTR_FLUSH_LINK_STACK))
396 patch_instruction_site(&patch__call_flush_count_cache, PPC_INST_NOP);
397 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
398 patch_instruction_site(&patch__call_kvm_flush_link_stack, PPC_INST_NOP);
400 pr_info("link-stack-flush: software flush disabled.\n");
401 link_stack_flush_enabled = false;
402 no_count_cache_flush();
406 // This enables the branch from _switch to flush_count_cache
407 patch_branch_site(&patch__call_flush_count_cache,
408 (u64)&flush_count_cache, BRANCH_SET_LINK);
410 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
411 // This enables the branch from guest_exit_cont to kvm_flush_link_stack
412 patch_branch_site(&patch__call_kvm_flush_link_stack,
413 (u64)&kvm_flush_link_stack, BRANCH_SET_LINK);
416 pr_info("link-stack-flush: software flush enabled.\n");
417 link_stack_flush_enabled = true;
419 // If we just need to flush the link stack, patch an early return
420 if (!security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE)) {
421 patch_instruction_site(&patch__flush_link_stack_return, PPC_INST_BLR);
422 no_count_cache_flush();
426 if (!security_ftr_enabled(SEC_FTR_BCCTR_FLUSH_ASSIST)) {
427 count_cache_flush_type = COUNT_CACHE_FLUSH_SW;
428 pr_info("count-cache-flush: full software flush sequence enabled.\n");
432 patch_instruction_site(&patch__flush_count_cache_return, PPC_INST_BLR);
433 count_cache_flush_type = COUNT_CACHE_FLUSH_HW;
434 pr_info("count-cache-flush: hardware assisted flush sequence enabled\n");
437 void setup_count_cache_flush(void)
441 if (no_spectrev2 || cpu_mitigations_off()) {
442 if (security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED) ||
443 security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED))
444 pr_warn("Spectre v2 mitigations not fully under software control, can't disable\n");
450 * There's no firmware feature flag/hypervisor bit to tell us we need to
451 * flush the link stack on context switch. So we set it here if we see
452 * either of the Spectre v2 mitigations that aim to protect userspace.
454 if (security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED) ||
455 security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE))
456 security_ftr_set(SEC_FTR_FLUSH_LINK_STACK);
458 toggle_count_cache_flush(enable);
461 #ifdef CONFIG_DEBUG_FS
462 static int count_cache_flush_set(void *data, u64 val)
473 toggle_count_cache_flush(enable);
478 static int count_cache_flush_get(void *data, u64 *val)
480 if (count_cache_flush_type == COUNT_CACHE_FLUSH_NONE)
488 DEFINE_SIMPLE_ATTRIBUTE(fops_count_cache_flush, count_cache_flush_get,
489 count_cache_flush_set, "%llu\n");
491 static __init int count_cache_flush_debugfs_init(void)
493 debugfs_create_file("count_cache_flush", 0600, powerpc_debugfs_root,
494 NULL, &fops_count_cache_flush);
497 device_initcall(count_cache_flush_debugfs_init);
498 #endif /* CONFIG_DEBUG_FS */
499 #endif /* CONFIG_PPC_BOOK3S_64 */