1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
6 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
7 * Adapted for Power Macintosh by Paul Mackerras.
8 * Low-level exception handlers and MMU support
9 * rewritten by Paul Mackerras.
10 * Copyright (C) 1996 Paul Mackerras.
11 * MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
13 * This file contains the 64-bit prom entry code.
15 #include <asm/asm-offsets.h>
16 #ifdef CONFIG_PPC_BOOK3S
17 #include <asm/exception-64s.h>
19 #include <asm/exception-64e.h>
21 #include <asm/ppc_asm.h>
23 .section ".text","ax",@progbits
28 stdu r1,-SWITCH_FRAME_SIZE(r1) /* Save SP and create stack space */
30 /* Because PROM is running in 32b mode, it clobbers the high order half
31 * of all registers that it saves. We therefore save those registers
32 * PROM might touch to the stack. (r0, r3-r13 are caller saved)
42 /* Put PROM address in SRR0 */
45 /* Setup our trampoline return addr in LR */
51 /* Prepare a 32-bit mode big endian MSR
53 #ifdef CONFIG_PPC_BOOK3E_64
57 #else /* CONFIG_PPC_BOOK3E_64 */
58 LOAD_REG_IMMEDIATE(r12, MSR_SF | MSR_LE)
62 #endif /* CONFIG_PPC_BOOK3E_64 */
64 1: /* Return from OF */
67 /* Just make sure that r1 top 32 bits didn't get
72 /* Restore the MSR (back to 64 bits) */
77 /* Restore other registers */
84 addi r1,r1,SWITCH_FRAME_SIZE