1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
5 * Rewrite, cleanup, new allocation schemes, virtual merging:
6 * Copyright (C) 2004 Olof Johansson, IBM Corporation
7 * and Ben. Herrenschmidt, IBM Corporation
9 * Dynamic DMA mapping support, bus-independent parts.
13 #include <linux/init.h>
14 #include <linux/types.h>
15 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/string.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/bitmap.h>
21 #include <linux/iommu-helper.h>
22 #include <linux/crash_dump.h>
23 #include <linux/hash.h>
24 #include <linux/fault-inject.h>
25 #include <linux/pci.h>
26 #include <linux/iommu.h>
27 #include <linux/sched.h>
30 #include <asm/iommu.h>
31 #include <asm/pci-bridge.h>
32 #include <asm/machdep.h>
33 #include <asm/kdump.h>
34 #include <asm/fadump.h>
37 #include <asm/mmu_context.h>
43 static void __iommu_free(struct iommu_table *, dma_addr_t, unsigned int);
45 static int __init setup_iommu(char *str)
47 if (!strcmp(str, "novmerge"))
49 else if (!strcmp(str, "vmerge"))
54 __setup("iommu=", setup_iommu);
56 static DEFINE_PER_CPU(unsigned int, iommu_pool_hash);
59 * We precalculate the hash to avoid doing it on every allocation.
61 * The hash is important to spread CPUs across all the pools. For example,
62 * on a POWER7 with 4 way SMT we want interrupts on the primary threads and
63 * with 4 pools all primary threads would map to the same pool.
65 static int __init setup_iommu_pool_hash(void)
69 for_each_possible_cpu(i)
70 per_cpu(iommu_pool_hash, i) = hash_32(i, IOMMU_POOL_HASHBITS);
74 subsys_initcall(setup_iommu_pool_hash);
76 #ifdef CONFIG_FAIL_IOMMU
78 static DECLARE_FAULT_ATTR(fail_iommu);
80 static int __init setup_fail_iommu(char *str)
82 return setup_fault_attr(&fail_iommu, str);
84 __setup("fail_iommu=", setup_fail_iommu);
86 static bool should_fail_iommu(struct device *dev)
88 return dev->archdata.fail_iommu && should_fail(&fail_iommu, 1);
91 static int __init fail_iommu_debugfs(void)
93 struct dentry *dir = fault_create_debugfs_attr("fail_iommu",
96 return PTR_ERR_OR_ZERO(dir);
98 late_initcall(fail_iommu_debugfs);
100 static ssize_t fail_iommu_show(struct device *dev,
101 struct device_attribute *attr, char *buf)
103 return sprintf(buf, "%d\n", dev->archdata.fail_iommu);
106 static ssize_t fail_iommu_store(struct device *dev,
107 struct device_attribute *attr, const char *buf,
112 if (count > 0 && sscanf(buf, "%d", &i) > 0)
113 dev->archdata.fail_iommu = (i == 0) ? 0 : 1;
118 static DEVICE_ATTR_RW(fail_iommu);
120 static int fail_iommu_bus_notify(struct notifier_block *nb,
121 unsigned long action, void *data)
123 struct device *dev = data;
125 if (action == BUS_NOTIFY_ADD_DEVICE) {
126 if (device_create_file(dev, &dev_attr_fail_iommu))
127 pr_warn("Unable to create IOMMU fault injection sysfs "
129 } else if (action == BUS_NOTIFY_DEL_DEVICE) {
130 device_remove_file(dev, &dev_attr_fail_iommu);
137 * PCI and VIO buses need separate notifier_block structs, since they're linked
138 * list nodes. Sharing a notifier_block would mean that any notifiers later
139 * registered for PCI buses would also get called by VIO buses and vice versa.
141 static struct notifier_block fail_iommu_pci_bus_notifier = {
142 .notifier_call = fail_iommu_bus_notify
146 static struct notifier_block fail_iommu_vio_bus_notifier = {
147 .notifier_call = fail_iommu_bus_notify
151 static int __init fail_iommu_setup(void)
154 bus_register_notifier(&pci_bus_type, &fail_iommu_pci_bus_notifier);
157 bus_register_notifier(&vio_bus_type, &fail_iommu_vio_bus_notifier);
163 * Must execute after PCI and VIO subsystem have initialised but before
164 * devices are probed.
166 arch_initcall(fail_iommu_setup);
168 static inline bool should_fail_iommu(struct device *dev)
174 static unsigned long iommu_range_alloc(struct device *dev,
175 struct iommu_table *tbl,
176 unsigned long npages,
177 unsigned long *handle,
179 unsigned int align_order)
181 unsigned long n, end, start;
183 int largealloc = npages > 15;
185 unsigned long align_mask;
186 unsigned long boundary_size;
188 unsigned int pool_nr;
189 struct iommu_pool *pool;
191 align_mask = (1ull << align_order) - 1;
193 /* This allocator was derived from x86_64's bit string search */
196 if (unlikely(npages == 0)) {
197 if (printk_ratelimit())
199 return DMA_MAPPING_ERROR;
202 if (should_fail_iommu(dev))
203 return DMA_MAPPING_ERROR;
206 * We don't need to disable preemption here because any CPU can
207 * safely use any IOMMU pool.
209 pool_nr = raw_cpu_read(iommu_pool_hash) & (tbl->nr_pools - 1);
212 pool = &(tbl->large_pool);
214 pool = &(tbl->pools[pool_nr]);
216 spin_lock_irqsave(&(pool->lock), flags);
219 if ((pass == 0) && handle && *handle &&
220 (*handle >= pool->start) && (*handle < pool->end))
227 /* The case below can happen if we have a small segment appended
228 * to a large, or when the previous alloc was at the very end of
229 * the available space. If so, go back to the initial start.
234 if (limit + tbl->it_offset > mask) {
235 limit = mask - tbl->it_offset + 1;
236 /* If we're constrained on address range, first try
237 * at the masked hint to avoid O(n) search complexity,
238 * but on second pass, start at 0 in pool 0.
240 if ((start & mask) >= limit || pass > 0) {
241 spin_unlock(&(pool->lock));
242 pool = &(tbl->pools[0]);
243 spin_lock(&(pool->lock));
251 boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1,
252 1 << tbl->it_page_shift);
254 boundary_size = ALIGN(1UL << 32, 1 << tbl->it_page_shift);
255 /* 4GB boundary for iseries_hv_alloc and iseries_hv_map */
257 n = iommu_area_alloc(tbl->it_map, limit, start, npages, tbl->it_offset,
258 boundary_size >> tbl->it_page_shift, align_mask);
260 if (likely(pass == 0)) {
261 /* First try the pool from the start */
262 pool->hint = pool->start;
266 } else if (pass <= tbl->nr_pools) {
267 /* Now try scanning all the other pools */
268 spin_unlock(&(pool->lock));
269 pool_nr = (pool_nr + 1) & (tbl->nr_pools - 1);
270 pool = &tbl->pools[pool_nr];
271 spin_lock(&(pool->lock));
272 pool->hint = pool->start;
278 spin_unlock_irqrestore(&(pool->lock), flags);
279 return DMA_MAPPING_ERROR;
285 /* Bump the hint to a new block for small allocs. */
287 /* Don't bump to new block to avoid fragmentation */
290 /* Overflow will be taken care of at the next allocation */
291 pool->hint = (end + tbl->it_blocksize - 1) &
292 ~(tbl->it_blocksize - 1);
295 /* Update handle for SG allocations */
299 spin_unlock_irqrestore(&(pool->lock), flags);
304 static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl,
305 void *page, unsigned int npages,
306 enum dma_data_direction direction,
307 unsigned long mask, unsigned int align_order,
311 dma_addr_t ret = DMA_MAPPING_ERROR;
314 entry = iommu_range_alloc(dev, tbl, npages, NULL, mask, align_order);
316 if (unlikely(entry == DMA_MAPPING_ERROR))
317 return DMA_MAPPING_ERROR;
319 entry += tbl->it_offset; /* Offset into real TCE table */
320 ret = entry << tbl->it_page_shift; /* Set the return dma address */
322 /* Put the TCEs in the HW table */
323 build_fail = tbl->it_ops->set(tbl, entry, npages,
324 (unsigned long)page &
325 IOMMU_PAGE_MASK(tbl), direction, attrs);
327 /* tbl->it_ops->set() only returns non-zero for transient errors.
328 * Clean up the table bitmap in this case and return
329 * DMA_MAPPING_ERROR. For all other errors the functionality is
332 if (unlikely(build_fail)) {
333 __iommu_free(tbl, ret, npages);
334 return DMA_MAPPING_ERROR;
337 /* Flush/invalidate TLB caches if necessary */
338 if (tbl->it_ops->flush)
339 tbl->it_ops->flush(tbl);
341 /* Make sure updates are seen by hardware */
347 static bool iommu_free_check(struct iommu_table *tbl, dma_addr_t dma_addr,
350 unsigned long entry, free_entry;
352 entry = dma_addr >> tbl->it_page_shift;
353 free_entry = entry - tbl->it_offset;
355 if (((free_entry + npages) > tbl->it_size) ||
356 (entry < tbl->it_offset)) {
357 if (printk_ratelimit()) {
358 printk(KERN_INFO "iommu_free: invalid entry\n");
359 printk(KERN_INFO "\tentry = 0x%lx\n", entry);
360 printk(KERN_INFO "\tdma_addr = 0x%llx\n", (u64)dma_addr);
361 printk(KERN_INFO "\tTable = 0x%llx\n", (u64)tbl);
362 printk(KERN_INFO "\tbus# = 0x%llx\n", (u64)tbl->it_busno);
363 printk(KERN_INFO "\tsize = 0x%llx\n", (u64)tbl->it_size);
364 printk(KERN_INFO "\tstartOff = 0x%llx\n", (u64)tbl->it_offset);
365 printk(KERN_INFO "\tindex = 0x%llx\n", (u64)tbl->it_index);
375 static struct iommu_pool *get_pool(struct iommu_table *tbl,
378 struct iommu_pool *p;
379 unsigned long largepool_start = tbl->large_pool.start;
381 /* The large pool is the last pool at the top of the table */
382 if (entry >= largepool_start) {
383 p = &tbl->large_pool;
385 unsigned int pool_nr = entry / tbl->poolsize;
387 BUG_ON(pool_nr > tbl->nr_pools);
388 p = &tbl->pools[pool_nr];
394 static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
397 unsigned long entry, free_entry;
399 struct iommu_pool *pool;
401 entry = dma_addr >> tbl->it_page_shift;
402 free_entry = entry - tbl->it_offset;
404 pool = get_pool(tbl, free_entry);
406 if (!iommu_free_check(tbl, dma_addr, npages))
409 tbl->it_ops->clear(tbl, entry, npages);
411 spin_lock_irqsave(&(pool->lock), flags);
412 bitmap_clear(tbl->it_map, free_entry, npages);
413 spin_unlock_irqrestore(&(pool->lock), flags);
416 static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
419 __iommu_free(tbl, dma_addr, npages);
421 /* Make sure TLB cache is flushed if the HW needs it. We do
422 * not do an mb() here on purpose, it is not needed on any of
423 * the current platforms.
425 if (tbl->it_ops->flush)
426 tbl->it_ops->flush(tbl);
429 int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl,
430 struct scatterlist *sglist, int nelems,
431 unsigned long mask, enum dma_data_direction direction,
434 dma_addr_t dma_next = 0, dma_addr;
435 struct scatterlist *s, *outs, *segstart;
436 int outcount, incount, i, build_fail = 0;
438 unsigned long handle;
439 unsigned int max_seg_size;
441 BUG_ON(direction == DMA_NONE);
443 if ((nelems == 0) || !tbl)
446 outs = s = segstart = &sglist[0];
451 /* Init first segment length for backout at failure */
452 outs->dma_length = 0;
454 DBG("sg mapping %d elements:\n", nelems);
456 max_seg_size = dma_get_max_seg_size(dev);
457 for_each_sg(sglist, s, nelems, i) {
458 unsigned long vaddr, npages, entry, slen;
466 /* Allocate iommu entries for that segment */
467 vaddr = (unsigned long) sg_virt(s);
468 npages = iommu_num_pages(vaddr, slen, IOMMU_PAGE_SIZE(tbl));
470 if (tbl->it_page_shift < PAGE_SHIFT && slen >= PAGE_SIZE &&
471 (vaddr & ~PAGE_MASK) == 0)
472 align = PAGE_SHIFT - tbl->it_page_shift;
473 entry = iommu_range_alloc(dev, tbl, npages, &handle,
474 mask >> tbl->it_page_shift, align);
476 DBG(" - vaddr: %lx, size: %lx\n", vaddr, slen);
479 if (unlikely(entry == DMA_MAPPING_ERROR)) {
480 if (!(attrs & DMA_ATTR_NO_WARN) &&
482 dev_info(dev, "iommu_alloc failed, tbl %p "
483 "vaddr %lx npages %lu\n", tbl, vaddr,
488 /* Convert entry to a dma_addr_t */
489 entry += tbl->it_offset;
490 dma_addr = entry << tbl->it_page_shift;
491 dma_addr |= (s->offset & ~IOMMU_PAGE_MASK(tbl));
493 DBG(" - %lu pages, entry: %lx, dma_addr: %lx\n",
494 npages, entry, dma_addr);
496 /* Insert into HW table */
497 build_fail = tbl->it_ops->set(tbl, entry, npages,
498 vaddr & IOMMU_PAGE_MASK(tbl),
500 if(unlikely(build_fail))
503 /* If we are in an open segment, try merging */
505 DBG(" - trying merge...\n");
506 /* We cannot merge if:
507 * - allocated dma_addr isn't contiguous to previous allocation
509 if (novmerge || (dma_addr != dma_next) ||
510 (outs->dma_length + s->length > max_seg_size)) {
511 /* Can't merge: create a new segment */
514 outs = sg_next(outs);
515 DBG(" can't merge, new segment.\n");
517 outs->dma_length += s->length;
518 DBG(" merged, new len: %ux\n", outs->dma_length);
523 /* This is a new segment, fill entries */
524 DBG(" - filling new segment.\n");
525 outs->dma_address = dma_addr;
526 outs->dma_length = slen;
529 /* Calculate next page pointer for contiguous check */
530 dma_next = dma_addr + slen;
532 DBG(" - dma next is: %lx\n", dma_next);
535 /* Flush/invalidate TLB caches if necessary */
536 if (tbl->it_ops->flush)
537 tbl->it_ops->flush(tbl);
539 DBG("mapped %d elements:\n", outcount);
541 /* For the sake of ppc_iommu_unmap_sg, we clear out the length in the
542 * next entry of the sglist if we didn't fill the list completely
544 if (outcount < incount) {
545 outs = sg_next(outs);
546 outs->dma_address = DMA_MAPPING_ERROR;
547 outs->dma_length = 0;
550 /* Make sure updates are seen by hardware */
556 for_each_sg(sglist, s, nelems, i) {
557 if (s->dma_length != 0) {
558 unsigned long vaddr, npages;
560 vaddr = s->dma_address & IOMMU_PAGE_MASK(tbl);
561 npages = iommu_num_pages(s->dma_address, s->dma_length,
562 IOMMU_PAGE_SIZE(tbl));
563 __iommu_free(tbl, vaddr, npages);
564 s->dma_address = DMA_MAPPING_ERROR;
574 void ppc_iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
575 int nelems, enum dma_data_direction direction,
578 struct scatterlist *sg;
580 BUG_ON(direction == DMA_NONE);
588 dma_addr_t dma_handle = sg->dma_address;
590 if (sg->dma_length == 0)
592 npages = iommu_num_pages(dma_handle, sg->dma_length,
593 IOMMU_PAGE_SIZE(tbl));
594 __iommu_free(tbl, dma_handle, npages);
598 /* Flush/invalidate TLBs if necessary. As for iommu_free(), we
599 * do not do an mb() here, the affected platforms do not need it
602 if (tbl->it_ops->flush)
603 tbl->it_ops->flush(tbl);
606 static void iommu_table_clear(struct iommu_table *tbl)
609 * In case of firmware assisted dump system goes through clean
610 * reboot process at the time of system crash. Hence it's safe to
611 * clear the TCE entries if firmware assisted dump is active.
613 if (!is_kdump_kernel() || is_fadump_active()) {
614 /* Clear the table in case firmware left allocations in it */
615 tbl->it_ops->clear(tbl, tbl->it_offset, tbl->it_size);
619 #ifdef CONFIG_CRASH_DUMP
620 if (tbl->it_ops->get) {
621 unsigned long index, tceval, tcecount = 0;
623 /* Reserve the existing mappings left by the first kernel. */
624 for (index = 0; index < tbl->it_size; index++) {
625 tceval = tbl->it_ops->get(tbl, index + tbl->it_offset);
627 * Freed TCE entry contains 0x7fffffffffffffff on JS20
629 if (tceval && (tceval != 0x7fffffffffffffffUL)) {
630 __set_bit(index, tbl->it_map);
635 if ((tbl->it_size - tcecount) < KDUMP_MIN_TCE_ENTRIES) {
636 printk(KERN_WARNING "TCE table is full; freeing ");
637 printk(KERN_WARNING "%d entries for the kdump boot\n",
638 KDUMP_MIN_TCE_ENTRIES);
639 for (index = tbl->it_size - KDUMP_MIN_TCE_ENTRIES;
640 index < tbl->it_size; index++)
641 __clear_bit(index, tbl->it_map);
647 static void iommu_table_reserve_pages(struct iommu_table *tbl,
648 unsigned long res_start, unsigned long res_end)
652 WARN_ON_ONCE(res_end < res_start);
654 * Reserve page 0 so it will not be used for any mappings.
655 * This avoids buggy drivers that consider page 0 to be invalid
656 * to crash the machine or even lose data.
658 if (tbl->it_offset == 0)
659 set_bit(0, tbl->it_map);
661 tbl->it_reserved_start = res_start;
662 tbl->it_reserved_end = res_end;
664 /* Check if res_start..res_end isn't empty and overlaps the table */
665 if (res_start && res_end &&
666 (tbl->it_offset + tbl->it_size < res_start ||
667 res_end < tbl->it_offset))
670 for (i = tbl->it_reserved_start; i < tbl->it_reserved_end; ++i)
671 set_bit(i - tbl->it_offset, tbl->it_map);
674 static void iommu_table_release_pages(struct iommu_table *tbl)
679 * In case we have reserved the first bit, we should not emit
682 if (tbl->it_offset == 0)
683 clear_bit(0, tbl->it_map);
685 for (i = tbl->it_reserved_start; i < tbl->it_reserved_end; ++i)
686 clear_bit(i - tbl->it_offset, tbl->it_map);
690 * Build a iommu_table structure. This contains a bit map which
691 * is used to manage allocation of the tce space.
693 struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid,
694 unsigned long res_start, unsigned long res_end)
697 static int welcomed = 0;
700 struct iommu_pool *p;
702 BUG_ON(!tbl->it_ops);
704 /* number of bytes needed for the bitmap */
705 sz = BITS_TO_LONGS(tbl->it_size) * sizeof(unsigned long);
707 page = alloc_pages_node(nid, GFP_KERNEL, get_order(sz));
709 panic("iommu_init_table: Can't allocate %ld bytes\n", sz);
710 tbl->it_map = page_address(page);
711 memset(tbl->it_map, 0, sz);
713 iommu_table_reserve_pages(tbl, res_start, res_end);
715 /* We only split the IOMMU table if we have 1GB or more of space */
716 if ((tbl->it_size << tbl->it_page_shift) >= (1UL * 1024 * 1024 * 1024))
717 tbl->nr_pools = IOMMU_NR_POOLS;
721 /* We reserve the top 1/4 of the table for large allocations */
722 tbl->poolsize = (tbl->it_size * 3 / 4) / tbl->nr_pools;
724 for (i = 0; i < tbl->nr_pools; i++) {
726 spin_lock_init(&(p->lock));
727 p->start = tbl->poolsize * i;
729 p->end = p->start + tbl->poolsize;
732 p = &tbl->large_pool;
733 spin_lock_init(&(p->lock));
734 p->start = tbl->poolsize * i;
736 p->end = tbl->it_size;
738 iommu_table_clear(tbl);
741 printk(KERN_INFO "IOMMU table initialized, virtual merging %s\n",
742 novmerge ? "disabled" : "enabled");
749 static void iommu_table_free(struct kref *kref)
751 unsigned long bitmap_sz;
753 struct iommu_table *tbl;
755 tbl = container_of(kref, struct iommu_table, it_kref);
757 if (tbl->it_ops->free)
758 tbl->it_ops->free(tbl);
765 iommu_table_release_pages(tbl);
767 /* verify that table contains no entries */
768 if (!bitmap_empty(tbl->it_map, tbl->it_size))
769 pr_warn("%s: Unexpected TCEs\n", __func__);
771 /* calculate bitmap size in bytes */
772 bitmap_sz = BITS_TO_LONGS(tbl->it_size) * sizeof(unsigned long);
775 order = get_order(bitmap_sz);
776 free_pages((unsigned long) tbl->it_map, order);
782 struct iommu_table *iommu_tce_table_get(struct iommu_table *tbl)
784 if (kref_get_unless_zero(&tbl->it_kref))
789 EXPORT_SYMBOL_GPL(iommu_tce_table_get);
791 int iommu_tce_table_put(struct iommu_table *tbl)
796 return kref_put(&tbl->it_kref, iommu_table_free);
798 EXPORT_SYMBOL_GPL(iommu_tce_table_put);
800 /* Creates TCEs for a user provided buffer. The user buffer must be
801 * contiguous real kernel storage (not vmalloc). The address passed here
802 * comprises a page address and offset into that page. The dma_addr_t
803 * returned will point to the same byte within the page as was passed in.
805 dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
806 struct page *page, unsigned long offset, size_t size,
807 unsigned long mask, enum dma_data_direction direction,
810 dma_addr_t dma_handle = DMA_MAPPING_ERROR;
813 unsigned int npages, align;
815 BUG_ON(direction == DMA_NONE);
817 vaddr = page_address(page) + offset;
818 uaddr = (unsigned long)vaddr;
821 npages = iommu_num_pages(uaddr, size, IOMMU_PAGE_SIZE(tbl));
823 if (tbl->it_page_shift < PAGE_SHIFT && size >= PAGE_SIZE &&
824 ((unsigned long)vaddr & ~PAGE_MASK) == 0)
825 align = PAGE_SHIFT - tbl->it_page_shift;
827 dma_handle = iommu_alloc(dev, tbl, vaddr, npages, direction,
828 mask >> tbl->it_page_shift, align,
830 if (dma_handle == DMA_MAPPING_ERROR) {
831 if (!(attrs & DMA_ATTR_NO_WARN) &&
832 printk_ratelimit()) {
833 dev_info(dev, "iommu_alloc failed, tbl %p "
834 "vaddr %p npages %d\n", tbl, vaddr,
838 dma_handle |= (uaddr & ~IOMMU_PAGE_MASK(tbl));
844 void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle,
845 size_t size, enum dma_data_direction direction,
850 BUG_ON(direction == DMA_NONE);
853 npages = iommu_num_pages(dma_handle, size,
854 IOMMU_PAGE_SIZE(tbl));
855 iommu_free(tbl, dma_handle, npages);
859 /* Allocates a contiguous real buffer and creates mappings over it.
860 * Returns the virtual address of the buffer and sets dma_handle
861 * to the dma address (mapping) of the first page.
863 void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
864 size_t size, dma_addr_t *dma_handle,
865 unsigned long mask, gfp_t flag, int node)
870 unsigned int nio_pages, io_order;
873 size = PAGE_ALIGN(size);
874 order = get_order(size);
877 * Client asked for way too much space. This is checked later
878 * anyway. It is easier to debug here for the drivers than in
881 if (order >= IOMAP_MAX_ORDER) {
882 dev_info(dev, "iommu_alloc_consistent size too large: 0x%lx\n",
890 /* Alloc enough pages (and possibly more) */
891 page = alloc_pages_node(node, flag, order);
894 ret = page_address(page);
895 memset(ret, 0, size);
897 /* Set up tces to cover the allocated range */
898 nio_pages = size >> tbl->it_page_shift;
899 io_order = get_iommu_order(size, tbl);
900 mapping = iommu_alloc(dev, tbl, ret, nio_pages, DMA_BIDIRECTIONAL,
901 mask >> tbl->it_page_shift, io_order, 0);
902 if (mapping == DMA_MAPPING_ERROR) {
903 free_pages((unsigned long)ret, order);
906 *dma_handle = mapping;
910 void iommu_free_coherent(struct iommu_table *tbl, size_t size,
911 void *vaddr, dma_addr_t dma_handle)
914 unsigned int nio_pages;
916 size = PAGE_ALIGN(size);
917 nio_pages = size >> tbl->it_page_shift;
918 iommu_free(tbl, dma_handle, nio_pages);
919 size = PAGE_ALIGN(size);
920 free_pages((unsigned long)vaddr, get_order(size));
924 unsigned long iommu_direction_to_tce_perm(enum dma_data_direction dir)
927 case DMA_BIDIRECTIONAL:
928 return TCE_PCI_READ | TCE_PCI_WRITE;
929 case DMA_FROM_DEVICE:
930 return TCE_PCI_WRITE;
937 EXPORT_SYMBOL_GPL(iommu_direction_to_tce_perm);
939 #ifdef CONFIG_IOMMU_API
943 static void group_release(void *iommu_data)
945 struct iommu_table_group *table_group = iommu_data;
947 table_group->group = NULL;
950 void iommu_register_group(struct iommu_table_group *table_group,
951 int pci_domain_number, unsigned long pe_num)
953 struct iommu_group *grp;
956 grp = iommu_group_alloc();
958 pr_warn("powerpc iommu api: cannot create new group, err=%ld\n",
962 table_group->group = grp;
963 iommu_group_set_iommudata(grp, table_group, group_release);
964 name = kasprintf(GFP_KERNEL, "domain%d-pe%lx",
965 pci_domain_number, pe_num);
968 iommu_group_set_name(grp, name);
972 enum dma_data_direction iommu_tce_direction(unsigned long tce)
974 if ((tce & TCE_PCI_READ) && (tce & TCE_PCI_WRITE))
975 return DMA_BIDIRECTIONAL;
976 else if (tce & TCE_PCI_READ)
977 return DMA_TO_DEVICE;
978 else if (tce & TCE_PCI_WRITE)
979 return DMA_FROM_DEVICE;
983 EXPORT_SYMBOL_GPL(iommu_tce_direction);
985 void iommu_flush_tce(struct iommu_table *tbl)
987 /* Flush/invalidate TLB caches if necessary */
988 if (tbl->it_ops->flush)
989 tbl->it_ops->flush(tbl);
991 /* Make sure updates are seen by hardware */
994 EXPORT_SYMBOL_GPL(iommu_flush_tce);
996 int iommu_tce_check_ioba(unsigned long page_shift,
997 unsigned long offset, unsigned long size,
998 unsigned long ioba, unsigned long npages)
1000 unsigned long mask = (1UL << page_shift) - 1;
1005 ioba >>= page_shift;
1009 if ((ioba + 1) > (offset + size))
1014 EXPORT_SYMBOL_GPL(iommu_tce_check_ioba);
1016 int iommu_tce_check_gpa(unsigned long page_shift, unsigned long gpa)
1018 unsigned long mask = (1UL << page_shift) - 1;
1025 EXPORT_SYMBOL_GPL(iommu_tce_check_gpa);
1027 extern long iommu_tce_xchg_no_kill(struct mm_struct *mm,
1028 struct iommu_table *tbl,
1029 unsigned long entry, unsigned long *hpa,
1030 enum dma_data_direction *direction)
1033 unsigned long size = 0;
1035 ret = tbl->it_ops->xchg_no_kill(tbl, entry, hpa, direction, false);
1036 if (!ret && ((*direction == DMA_FROM_DEVICE) ||
1037 (*direction == DMA_BIDIRECTIONAL)) &&
1038 !mm_iommu_is_devmem(mm, *hpa, tbl->it_page_shift,
1040 SetPageDirty(pfn_to_page(*hpa >> PAGE_SHIFT));
1044 EXPORT_SYMBOL_GPL(iommu_tce_xchg_no_kill);
1046 void iommu_tce_kill(struct iommu_table *tbl,
1047 unsigned long entry, unsigned long pages)
1049 if (tbl->it_ops->tce_kill)
1050 tbl->it_ops->tce_kill(tbl, entry, pages, false);
1052 EXPORT_SYMBOL_GPL(iommu_tce_kill);
1054 int iommu_take_ownership(struct iommu_table *tbl)
1056 unsigned long flags, i, sz = (tbl->it_size + 7) >> 3;
1060 * VFIO does not control TCE entries allocation and the guest
1061 * can write new TCEs on top of existing ones so iommu_tce_build()
1062 * must be able to release old pages. This functionality
1063 * requires exchange() callback defined so if it is not
1064 * implemented, we disallow taking ownership over the table.
1066 if (!tbl->it_ops->xchg_no_kill)
1069 spin_lock_irqsave(&tbl->large_pool.lock, flags);
1070 for (i = 0; i < tbl->nr_pools; i++)
1071 spin_lock_nest_lock(&tbl->pools[i].lock, &tbl->large_pool.lock);
1073 iommu_table_release_pages(tbl);
1075 if (!bitmap_empty(tbl->it_map, tbl->it_size)) {
1076 pr_err("iommu_tce: it_map is not empty");
1078 /* Undo iommu_table_release_pages, i.e. restore bit#0, etc */
1079 iommu_table_reserve_pages(tbl, tbl->it_reserved_start,
1080 tbl->it_reserved_end);
1082 memset(tbl->it_map, 0xff, sz);
1085 for (i = 0; i < tbl->nr_pools; i++)
1086 spin_unlock(&tbl->pools[i].lock);
1087 spin_unlock_irqrestore(&tbl->large_pool.lock, flags);
1091 EXPORT_SYMBOL_GPL(iommu_take_ownership);
1093 void iommu_release_ownership(struct iommu_table *tbl)
1095 unsigned long flags, i, sz = (tbl->it_size + 7) >> 3;
1097 spin_lock_irqsave(&tbl->large_pool.lock, flags);
1098 for (i = 0; i < tbl->nr_pools; i++)
1099 spin_lock_nest_lock(&tbl->pools[i].lock, &tbl->large_pool.lock);
1101 memset(tbl->it_map, 0, sz);
1103 iommu_table_reserve_pages(tbl, tbl->it_reserved_start,
1104 tbl->it_reserved_end);
1106 for (i = 0; i < tbl->nr_pools; i++)
1107 spin_unlock(&tbl->pools[i].lock);
1108 spin_unlock_irqrestore(&tbl->large_pool.lock, flags);
1110 EXPORT_SYMBOL_GPL(iommu_release_ownership);
1112 int iommu_add_device(struct iommu_table_group *table_group, struct device *dev)
1115 * The sysfs entries should be populated before
1116 * binding IOMMU group. If sysfs entries isn't
1117 * ready, we simply bail.
1119 if (!device_is_registered(dev))
1122 if (device_iommu_mapped(dev)) {
1123 pr_debug("%s: Skipping device %s with iommu group %d\n",
1124 __func__, dev_name(dev),
1125 iommu_group_id(dev->iommu_group));
1129 pr_debug("%s: Adding %s to iommu group %d\n",
1130 __func__, dev_name(dev), iommu_group_id(table_group->group));
1132 return iommu_group_add_device(table_group->group, dev);
1134 EXPORT_SYMBOL_GPL(iommu_add_device);
1136 void iommu_del_device(struct device *dev)
1139 * Some devices might not have IOMMU table and group
1140 * and we needn't detach them from the associated
1143 if (!device_iommu_mapped(dev)) {
1144 pr_debug("iommu_tce: skipping device %s with no tbl\n",
1149 iommu_group_remove_device(dev);
1151 EXPORT_SYMBOL_GPL(iommu_del_device);
1152 #endif /* CONFIG_IOMMU_API */