1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
5 * Rewrite, cleanup, new allocation schemes, virtual merging:
6 * Copyright (C) 2004 Olof Johansson, IBM Corporation
7 * and Ben. Herrenschmidt, IBM Corporation
9 * Dynamic DMA mapping support, bus-independent parts.
13 #include <linux/init.h>
14 #include <linux/types.h>
15 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/string.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/bitmap.h>
21 #include <linux/iommu-helper.h>
22 #include <linux/crash_dump.h>
23 #include <linux/hash.h>
24 #include <linux/fault-inject.h>
25 #include <linux/pci.h>
26 #include <linux/iommu.h>
27 #include <linux/sched.h>
30 #include <asm/iommu.h>
31 #include <asm/pci-bridge.h>
32 #include <asm/machdep.h>
33 #include <asm/kdump.h>
34 #include <asm/fadump.h>
37 #include <asm/mmu_context.h>
43 static void __iommu_free(struct iommu_table *, dma_addr_t, unsigned int);
45 static int __init setup_iommu(char *str)
47 if (!strcmp(str, "novmerge"))
49 else if (!strcmp(str, "vmerge"))
54 __setup("iommu=", setup_iommu);
56 static DEFINE_PER_CPU(unsigned int, iommu_pool_hash);
59 * We precalculate the hash to avoid doing it on every allocation.
61 * The hash is important to spread CPUs across all the pools. For example,
62 * on a POWER7 with 4 way SMT we want interrupts on the primary threads and
63 * with 4 pools all primary threads would map to the same pool.
65 static int __init setup_iommu_pool_hash(void)
69 for_each_possible_cpu(i)
70 per_cpu(iommu_pool_hash, i) = hash_32(i, IOMMU_POOL_HASHBITS);
74 subsys_initcall(setup_iommu_pool_hash);
76 #ifdef CONFIG_FAIL_IOMMU
78 static DECLARE_FAULT_ATTR(fail_iommu);
80 static int __init setup_fail_iommu(char *str)
82 return setup_fault_attr(&fail_iommu, str);
84 __setup("fail_iommu=", setup_fail_iommu);
86 static bool should_fail_iommu(struct device *dev)
88 return dev->archdata.fail_iommu && should_fail(&fail_iommu, 1);
91 static int __init fail_iommu_debugfs(void)
93 struct dentry *dir = fault_create_debugfs_attr("fail_iommu",
96 return PTR_ERR_OR_ZERO(dir);
98 late_initcall(fail_iommu_debugfs);
100 static ssize_t fail_iommu_show(struct device *dev,
101 struct device_attribute *attr, char *buf)
103 return sprintf(buf, "%d\n", dev->archdata.fail_iommu);
106 static ssize_t fail_iommu_store(struct device *dev,
107 struct device_attribute *attr, const char *buf,
112 if (count > 0 && sscanf(buf, "%d", &i) > 0)
113 dev->archdata.fail_iommu = (i == 0) ? 0 : 1;
118 static DEVICE_ATTR_RW(fail_iommu);
120 static int fail_iommu_bus_notify(struct notifier_block *nb,
121 unsigned long action, void *data)
123 struct device *dev = data;
125 if (action == BUS_NOTIFY_ADD_DEVICE) {
126 if (device_create_file(dev, &dev_attr_fail_iommu))
127 pr_warn("Unable to create IOMMU fault injection sysfs "
129 } else if (action == BUS_NOTIFY_DEL_DEVICE) {
130 device_remove_file(dev, &dev_attr_fail_iommu);
137 * PCI and VIO buses need separate notifier_block structs, since they're linked
138 * list nodes. Sharing a notifier_block would mean that any notifiers later
139 * registered for PCI buses would also get called by VIO buses and vice versa.
141 static struct notifier_block fail_iommu_pci_bus_notifier = {
142 .notifier_call = fail_iommu_bus_notify
146 static struct notifier_block fail_iommu_vio_bus_notifier = {
147 .notifier_call = fail_iommu_bus_notify
151 static int __init fail_iommu_setup(void)
154 bus_register_notifier(&pci_bus_type, &fail_iommu_pci_bus_notifier);
157 bus_register_notifier(&vio_bus_type, &fail_iommu_vio_bus_notifier);
163 * Must execute after PCI and VIO subsystem have initialised but before
164 * devices are probed.
166 arch_initcall(fail_iommu_setup);
168 static inline bool should_fail_iommu(struct device *dev)
174 static unsigned long iommu_range_alloc(struct device *dev,
175 struct iommu_table *tbl,
176 unsigned long npages,
177 unsigned long *handle,
179 unsigned int align_order)
181 unsigned long n, end, start;
183 int largealloc = npages > 15;
185 unsigned long align_mask;
187 unsigned int pool_nr;
188 struct iommu_pool *pool;
190 align_mask = (1ull << align_order) - 1;
192 /* This allocator was derived from x86_64's bit string search */
195 if (unlikely(npages == 0)) {
196 if (printk_ratelimit())
198 return DMA_MAPPING_ERROR;
201 if (should_fail_iommu(dev))
202 return DMA_MAPPING_ERROR;
205 * We don't need to disable preemption here because any CPU can
206 * safely use any IOMMU pool.
208 pool_nr = raw_cpu_read(iommu_pool_hash) & (tbl->nr_pools - 1);
211 pool = &(tbl->large_pool);
213 pool = &(tbl->pools[pool_nr]);
215 spin_lock_irqsave(&(pool->lock), flags);
218 if ((pass == 0) && handle && *handle &&
219 (*handle >= pool->start) && (*handle < pool->end))
226 /* The case below can happen if we have a small segment appended
227 * to a large, or when the previous alloc was at the very end of
228 * the available space. If so, go back to the initial start.
233 if (limit + tbl->it_offset > mask) {
234 limit = mask - tbl->it_offset + 1;
235 /* If we're constrained on address range, first try
236 * at the masked hint to avoid O(n) search complexity,
237 * but on second pass, start at 0 in pool 0.
239 if ((start & mask) >= limit || pass > 0) {
240 spin_unlock(&(pool->lock));
241 pool = &(tbl->pools[0]);
242 spin_lock(&(pool->lock));
249 n = iommu_area_alloc(tbl->it_map, limit, start, npages, tbl->it_offset,
250 dma_get_seg_boundary_nr_pages(dev, tbl->it_page_shift),
253 if (likely(pass == 0)) {
254 /* First try the pool from the start */
255 pool->hint = pool->start;
259 } else if (pass <= tbl->nr_pools) {
260 /* Now try scanning all the other pools */
261 spin_unlock(&(pool->lock));
262 pool_nr = (pool_nr + 1) & (tbl->nr_pools - 1);
263 pool = &tbl->pools[pool_nr];
264 spin_lock(&(pool->lock));
265 pool->hint = pool->start;
271 spin_unlock_irqrestore(&(pool->lock), flags);
272 return DMA_MAPPING_ERROR;
278 /* Bump the hint to a new block for small allocs. */
280 /* Don't bump to new block to avoid fragmentation */
283 /* Overflow will be taken care of at the next allocation */
284 pool->hint = (end + tbl->it_blocksize - 1) &
285 ~(tbl->it_blocksize - 1);
288 /* Update handle for SG allocations */
292 spin_unlock_irqrestore(&(pool->lock), flags);
297 static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl,
298 void *page, unsigned int npages,
299 enum dma_data_direction direction,
300 unsigned long mask, unsigned int align_order,
304 dma_addr_t ret = DMA_MAPPING_ERROR;
307 entry = iommu_range_alloc(dev, tbl, npages, NULL, mask, align_order);
309 if (unlikely(entry == DMA_MAPPING_ERROR))
310 return DMA_MAPPING_ERROR;
312 entry += tbl->it_offset; /* Offset into real TCE table */
313 ret = entry << tbl->it_page_shift; /* Set the return dma address */
315 /* Put the TCEs in the HW table */
316 build_fail = tbl->it_ops->set(tbl, entry, npages,
317 (unsigned long)page &
318 IOMMU_PAGE_MASK(tbl), direction, attrs);
320 /* tbl->it_ops->set() only returns non-zero for transient errors.
321 * Clean up the table bitmap in this case and return
322 * DMA_MAPPING_ERROR. For all other errors the functionality is
325 if (unlikely(build_fail)) {
326 __iommu_free(tbl, ret, npages);
327 return DMA_MAPPING_ERROR;
330 /* Flush/invalidate TLB caches if necessary */
331 if (tbl->it_ops->flush)
332 tbl->it_ops->flush(tbl);
334 /* Make sure updates are seen by hardware */
340 static bool iommu_free_check(struct iommu_table *tbl, dma_addr_t dma_addr,
343 unsigned long entry, free_entry;
345 entry = dma_addr >> tbl->it_page_shift;
346 free_entry = entry - tbl->it_offset;
348 if (((free_entry + npages) > tbl->it_size) ||
349 (entry < tbl->it_offset)) {
350 if (printk_ratelimit()) {
351 printk(KERN_INFO "iommu_free: invalid entry\n");
352 printk(KERN_INFO "\tentry = 0x%lx\n", entry);
353 printk(KERN_INFO "\tdma_addr = 0x%llx\n", (u64)dma_addr);
354 printk(KERN_INFO "\tTable = 0x%llx\n", (u64)tbl);
355 printk(KERN_INFO "\tbus# = 0x%llx\n", (u64)tbl->it_busno);
356 printk(KERN_INFO "\tsize = 0x%llx\n", (u64)tbl->it_size);
357 printk(KERN_INFO "\tstartOff = 0x%llx\n", (u64)tbl->it_offset);
358 printk(KERN_INFO "\tindex = 0x%llx\n", (u64)tbl->it_index);
368 static struct iommu_pool *get_pool(struct iommu_table *tbl,
371 struct iommu_pool *p;
372 unsigned long largepool_start = tbl->large_pool.start;
374 /* The large pool is the last pool at the top of the table */
375 if (entry >= largepool_start) {
376 p = &tbl->large_pool;
378 unsigned int pool_nr = entry / tbl->poolsize;
380 BUG_ON(pool_nr > tbl->nr_pools);
381 p = &tbl->pools[pool_nr];
387 static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
390 unsigned long entry, free_entry;
392 struct iommu_pool *pool;
394 entry = dma_addr >> tbl->it_page_shift;
395 free_entry = entry - tbl->it_offset;
397 pool = get_pool(tbl, free_entry);
399 if (!iommu_free_check(tbl, dma_addr, npages))
402 tbl->it_ops->clear(tbl, entry, npages);
404 spin_lock_irqsave(&(pool->lock), flags);
405 bitmap_clear(tbl->it_map, free_entry, npages);
406 spin_unlock_irqrestore(&(pool->lock), flags);
409 static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
412 __iommu_free(tbl, dma_addr, npages);
414 /* Make sure TLB cache is flushed if the HW needs it. We do
415 * not do an mb() here on purpose, it is not needed on any of
416 * the current platforms.
418 if (tbl->it_ops->flush)
419 tbl->it_ops->flush(tbl);
422 int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl,
423 struct scatterlist *sglist, int nelems,
424 unsigned long mask, enum dma_data_direction direction,
427 dma_addr_t dma_next = 0, dma_addr;
428 struct scatterlist *s, *outs, *segstart;
429 int outcount, incount, i, build_fail = 0;
431 unsigned long handle;
432 unsigned int max_seg_size;
434 BUG_ON(direction == DMA_NONE);
436 if ((nelems == 0) || !tbl)
439 outs = s = segstart = &sglist[0];
444 /* Init first segment length for backout at failure */
445 outs->dma_length = 0;
447 DBG("sg mapping %d elements:\n", nelems);
449 max_seg_size = dma_get_max_seg_size(dev);
450 for_each_sg(sglist, s, nelems, i) {
451 unsigned long vaddr, npages, entry, slen;
459 /* Allocate iommu entries for that segment */
460 vaddr = (unsigned long) sg_virt(s);
461 npages = iommu_num_pages(vaddr, slen, IOMMU_PAGE_SIZE(tbl));
463 if (tbl->it_page_shift < PAGE_SHIFT && slen >= PAGE_SIZE &&
464 (vaddr & ~PAGE_MASK) == 0)
465 align = PAGE_SHIFT - tbl->it_page_shift;
466 entry = iommu_range_alloc(dev, tbl, npages, &handle,
467 mask >> tbl->it_page_shift, align);
469 DBG(" - vaddr: %lx, size: %lx\n", vaddr, slen);
472 if (unlikely(entry == DMA_MAPPING_ERROR)) {
473 if (!(attrs & DMA_ATTR_NO_WARN) &&
475 dev_info(dev, "iommu_alloc failed, tbl %p "
476 "vaddr %lx npages %lu\n", tbl, vaddr,
481 /* Convert entry to a dma_addr_t */
482 entry += tbl->it_offset;
483 dma_addr = entry << tbl->it_page_shift;
484 dma_addr |= (s->offset & ~IOMMU_PAGE_MASK(tbl));
486 DBG(" - %lu pages, entry: %lx, dma_addr: %lx\n",
487 npages, entry, dma_addr);
489 /* Insert into HW table */
490 build_fail = tbl->it_ops->set(tbl, entry, npages,
491 vaddr & IOMMU_PAGE_MASK(tbl),
493 if(unlikely(build_fail))
496 /* If we are in an open segment, try merging */
498 DBG(" - trying merge...\n");
499 /* We cannot merge if:
500 * - allocated dma_addr isn't contiguous to previous allocation
502 if (novmerge || (dma_addr != dma_next) ||
503 (outs->dma_length + s->length > max_seg_size)) {
504 /* Can't merge: create a new segment */
507 outs = sg_next(outs);
508 DBG(" can't merge, new segment.\n");
510 outs->dma_length += s->length;
511 DBG(" merged, new len: %ux\n", outs->dma_length);
516 /* This is a new segment, fill entries */
517 DBG(" - filling new segment.\n");
518 outs->dma_address = dma_addr;
519 outs->dma_length = slen;
522 /* Calculate next page pointer for contiguous check */
523 dma_next = dma_addr + slen;
525 DBG(" - dma next is: %lx\n", dma_next);
528 /* Flush/invalidate TLB caches if necessary */
529 if (tbl->it_ops->flush)
530 tbl->it_ops->flush(tbl);
532 DBG("mapped %d elements:\n", outcount);
534 /* For the sake of ppc_iommu_unmap_sg, we clear out the length in the
535 * next entry of the sglist if we didn't fill the list completely
537 if (outcount < incount) {
538 outs = sg_next(outs);
539 outs->dma_address = DMA_MAPPING_ERROR;
540 outs->dma_length = 0;
543 /* Make sure updates are seen by hardware */
549 for_each_sg(sglist, s, nelems, i) {
550 if (s->dma_length != 0) {
551 unsigned long vaddr, npages;
553 vaddr = s->dma_address & IOMMU_PAGE_MASK(tbl);
554 npages = iommu_num_pages(s->dma_address, s->dma_length,
555 IOMMU_PAGE_SIZE(tbl));
556 __iommu_free(tbl, vaddr, npages);
557 s->dma_address = DMA_MAPPING_ERROR;
567 void ppc_iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
568 int nelems, enum dma_data_direction direction,
571 struct scatterlist *sg;
573 BUG_ON(direction == DMA_NONE);
581 dma_addr_t dma_handle = sg->dma_address;
583 if (sg->dma_length == 0)
585 npages = iommu_num_pages(dma_handle, sg->dma_length,
586 IOMMU_PAGE_SIZE(tbl));
587 __iommu_free(tbl, dma_handle, npages);
591 /* Flush/invalidate TLBs if necessary. As for iommu_free(), we
592 * do not do an mb() here, the affected platforms do not need it
595 if (tbl->it_ops->flush)
596 tbl->it_ops->flush(tbl);
599 static void iommu_table_clear(struct iommu_table *tbl)
602 * In case of firmware assisted dump system goes through clean
603 * reboot process at the time of system crash. Hence it's safe to
604 * clear the TCE entries if firmware assisted dump is active.
606 if (!is_kdump_kernel() || is_fadump_active()) {
607 /* Clear the table in case firmware left allocations in it */
608 tbl->it_ops->clear(tbl, tbl->it_offset, tbl->it_size);
612 #ifdef CONFIG_CRASH_DUMP
613 if (tbl->it_ops->get) {
614 unsigned long index, tceval, tcecount = 0;
616 /* Reserve the existing mappings left by the first kernel. */
617 for (index = 0; index < tbl->it_size; index++) {
618 tceval = tbl->it_ops->get(tbl, index + tbl->it_offset);
620 * Freed TCE entry contains 0x7fffffffffffffff on JS20
622 if (tceval && (tceval != 0x7fffffffffffffffUL)) {
623 __set_bit(index, tbl->it_map);
628 if ((tbl->it_size - tcecount) < KDUMP_MIN_TCE_ENTRIES) {
629 printk(KERN_WARNING "TCE table is full; freeing ");
630 printk(KERN_WARNING "%d entries for the kdump boot\n",
631 KDUMP_MIN_TCE_ENTRIES);
632 for (index = tbl->it_size - KDUMP_MIN_TCE_ENTRIES;
633 index < tbl->it_size; index++)
634 __clear_bit(index, tbl->it_map);
640 static void iommu_table_reserve_pages(struct iommu_table *tbl,
641 unsigned long res_start, unsigned long res_end)
645 WARN_ON_ONCE(res_end < res_start);
647 * Reserve page 0 so it will not be used for any mappings.
648 * This avoids buggy drivers that consider page 0 to be invalid
649 * to crash the machine or even lose data.
651 if (tbl->it_offset == 0)
652 set_bit(0, tbl->it_map);
654 tbl->it_reserved_start = res_start;
655 tbl->it_reserved_end = res_end;
657 /* Check if res_start..res_end isn't empty and overlaps the table */
658 if (res_start && res_end &&
659 (tbl->it_offset + tbl->it_size < res_start ||
660 res_end < tbl->it_offset))
663 for (i = tbl->it_reserved_start; i < tbl->it_reserved_end; ++i)
664 set_bit(i - tbl->it_offset, tbl->it_map);
667 static void iommu_table_release_pages(struct iommu_table *tbl)
672 * In case we have reserved the first bit, we should not emit
675 if (tbl->it_offset == 0)
676 clear_bit(0, tbl->it_map);
678 for (i = tbl->it_reserved_start; i < tbl->it_reserved_end; ++i)
679 clear_bit(i - tbl->it_offset, tbl->it_map);
683 * Build a iommu_table structure. This contains a bit map which
684 * is used to manage allocation of the tce space.
686 struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid,
687 unsigned long res_start, unsigned long res_end)
690 static int welcomed = 0;
693 struct iommu_pool *p;
695 BUG_ON(!tbl->it_ops);
697 /* number of bytes needed for the bitmap */
698 sz = BITS_TO_LONGS(tbl->it_size) * sizeof(unsigned long);
700 page = alloc_pages_node(nid, GFP_KERNEL, get_order(sz));
702 panic("iommu_init_table: Can't allocate %ld bytes\n", sz);
703 tbl->it_map = page_address(page);
704 memset(tbl->it_map, 0, sz);
706 iommu_table_reserve_pages(tbl, res_start, res_end);
708 /* We only split the IOMMU table if we have 1GB or more of space */
709 if ((tbl->it_size << tbl->it_page_shift) >= (1UL * 1024 * 1024 * 1024))
710 tbl->nr_pools = IOMMU_NR_POOLS;
714 /* We reserve the top 1/4 of the table for large allocations */
715 tbl->poolsize = (tbl->it_size * 3 / 4) / tbl->nr_pools;
717 for (i = 0; i < tbl->nr_pools; i++) {
719 spin_lock_init(&(p->lock));
720 p->start = tbl->poolsize * i;
722 p->end = p->start + tbl->poolsize;
725 p = &tbl->large_pool;
726 spin_lock_init(&(p->lock));
727 p->start = tbl->poolsize * i;
729 p->end = tbl->it_size;
731 iommu_table_clear(tbl);
734 printk(KERN_INFO "IOMMU table initialized, virtual merging %s\n",
735 novmerge ? "disabled" : "enabled");
742 static void iommu_table_free(struct kref *kref)
744 unsigned long bitmap_sz;
746 struct iommu_table *tbl;
748 tbl = container_of(kref, struct iommu_table, it_kref);
750 if (tbl->it_ops->free)
751 tbl->it_ops->free(tbl);
758 iommu_table_release_pages(tbl);
760 /* verify that table contains no entries */
761 if (!bitmap_empty(tbl->it_map, tbl->it_size))
762 pr_warn("%s: Unexpected TCEs\n", __func__);
764 /* calculate bitmap size in bytes */
765 bitmap_sz = BITS_TO_LONGS(tbl->it_size) * sizeof(unsigned long);
768 order = get_order(bitmap_sz);
769 free_pages((unsigned long) tbl->it_map, order);
775 struct iommu_table *iommu_tce_table_get(struct iommu_table *tbl)
777 if (kref_get_unless_zero(&tbl->it_kref))
782 EXPORT_SYMBOL_GPL(iommu_tce_table_get);
784 int iommu_tce_table_put(struct iommu_table *tbl)
789 return kref_put(&tbl->it_kref, iommu_table_free);
791 EXPORT_SYMBOL_GPL(iommu_tce_table_put);
793 /* Creates TCEs for a user provided buffer. The user buffer must be
794 * contiguous real kernel storage (not vmalloc). The address passed here
795 * comprises a page address and offset into that page. The dma_addr_t
796 * returned will point to the same byte within the page as was passed in.
798 dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
799 struct page *page, unsigned long offset, size_t size,
800 unsigned long mask, enum dma_data_direction direction,
803 dma_addr_t dma_handle = DMA_MAPPING_ERROR;
806 unsigned int npages, align;
808 BUG_ON(direction == DMA_NONE);
810 vaddr = page_address(page) + offset;
811 uaddr = (unsigned long)vaddr;
814 npages = iommu_num_pages(uaddr, size, IOMMU_PAGE_SIZE(tbl));
816 if (tbl->it_page_shift < PAGE_SHIFT && size >= PAGE_SIZE &&
817 ((unsigned long)vaddr & ~PAGE_MASK) == 0)
818 align = PAGE_SHIFT - tbl->it_page_shift;
820 dma_handle = iommu_alloc(dev, tbl, vaddr, npages, direction,
821 mask >> tbl->it_page_shift, align,
823 if (dma_handle == DMA_MAPPING_ERROR) {
824 if (!(attrs & DMA_ATTR_NO_WARN) &&
825 printk_ratelimit()) {
826 dev_info(dev, "iommu_alloc failed, tbl %p "
827 "vaddr %p npages %d\n", tbl, vaddr,
831 dma_handle |= (uaddr & ~IOMMU_PAGE_MASK(tbl));
837 void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle,
838 size_t size, enum dma_data_direction direction,
843 BUG_ON(direction == DMA_NONE);
846 npages = iommu_num_pages(dma_handle, size,
847 IOMMU_PAGE_SIZE(tbl));
848 iommu_free(tbl, dma_handle, npages);
852 /* Allocates a contiguous real buffer and creates mappings over it.
853 * Returns the virtual address of the buffer and sets dma_handle
854 * to the dma address (mapping) of the first page.
856 void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
857 size_t size, dma_addr_t *dma_handle,
858 unsigned long mask, gfp_t flag, int node)
863 unsigned int nio_pages, io_order;
866 size = PAGE_ALIGN(size);
867 order = get_order(size);
870 * Client asked for way too much space. This is checked later
871 * anyway. It is easier to debug here for the drivers than in
874 if (order >= IOMAP_MAX_ORDER) {
875 dev_info(dev, "iommu_alloc_consistent size too large: 0x%lx\n",
883 /* Alloc enough pages (and possibly more) */
884 page = alloc_pages_node(node, flag, order);
887 ret = page_address(page);
888 memset(ret, 0, size);
890 /* Set up tces to cover the allocated range */
891 nio_pages = size >> tbl->it_page_shift;
892 io_order = get_iommu_order(size, tbl);
893 mapping = iommu_alloc(dev, tbl, ret, nio_pages, DMA_BIDIRECTIONAL,
894 mask >> tbl->it_page_shift, io_order, 0);
895 if (mapping == DMA_MAPPING_ERROR) {
896 free_pages((unsigned long)ret, order);
899 *dma_handle = mapping;
903 void iommu_free_coherent(struct iommu_table *tbl, size_t size,
904 void *vaddr, dma_addr_t dma_handle)
907 unsigned int nio_pages;
909 size = PAGE_ALIGN(size);
910 nio_pages = size >> tbl->it_page_shift;
911 iommu_free(tbl, dma_handle, nio_pages);
912 size = PAGE_ALIGN(size);
913 free_pages((unsigned long)vaddr, get_order(size));
917 unsigned long iommu_direction_to_tce_perm(enum dma_data_direction dir)
920 case DMA_BIDIRECTIONAL:
921 return TCE_PCI_READ | TCE_PCI_WRITE;
922 case DMA_FROM_DEVICE:
923 return TCE_PCI_WRITE;
930 EXPORT_SYMBOL_GPL(iommu_direction_to_tce_perm);
932 #ifdef CONFIG_IOMMU_API
936 static void group_release(void *iommu_data)
938 struct iommu_table_group *table_group = iommu_data;
940 table_group->group = NULL;
943 void iommu_register_group(struct iommu_table_group *table_group,
944 int pci_domain_number, unsigned long pe_num)
946 struct iommu_group *grp;
949 grp = iommu_group_alloc();
951 pr_warn("powerpc iommu api: cannot create new group, err=%ld\n",
955 table_group->group = grp;
956 iommu_group_set_iommudata(grp, table_group, group_release);
957 name = kasprintf(GFP_KERNEL, "domain%d-pe%lx",
958 pci_domain_number, pe_num);
961 iommu_group_set_name(grp, name);
965 enum dma_data_direction iommu_tce_direction(unsigned long tce)
967 if ((tce & TCE_PCI_READ) && (tce & TCE_PCI_WRITE))
968 return DMA_BIDIRECTIONAL;
969 else if (tce & TCE_PCI_READ)
970 return DMA_TO_DEVICE;
971 else if (tce & TCE_PCI_WRITE)
972 return DMA_FROM_DEVICE;
976 EXPORT_SYMBOL_GPL(iommu_tce_direction);
978 void iommu_flush_tce(struct iommu_table *tbl)
980 /* Flush/invalidate TLB caches if necessary */
981 if (tbl->it_ops->flush)
982 tbl->it_ops->flush(tbl);
984 /* Make sure updates are seen by hardware */
987 EXPORT_SYMBOL_GPL(iommu_flush_tce);
989 int iommu_tce_check_ioba(unsigned long page_shift,
990 unsigned long offset, unsigned long size,
991 unsigned long ioba, unsigned long npages)
993 unsigned long mask = (1UL << page_shift) - 1;
1002 if ((ioba + 1) > (offset + size))
1007 EXPORT_SYMBOL_GPL(iommu_tce_check_ioba);
1009 int iommu_tce_check_gpa(unsigned long page_shift, unsigned long gpa)
1011 unsigned long mask = (1UL << page_shift) - 1;
1018 EXPORT_SYMBOL_GPL(iommu_tce_check_gpa);
1020 extern long iommu_tce_xchg_no_kill(struct mm_struct *mm,
1021 struct iommu_table *tbl,
1022 unsigned long entry, unsigned long *hpa,
1023 enum dma_data_direction *direction)
1026 unsigned long size = 0;
1028 ret = tbl->it_ops->xchg_no_kill(tbl, entry, hpa, direction, false);
1029 if (!ret && ((*direction == DMA_FROM_DEVICE) ||
1030 (*direction == DMA_BIDIRECTIONAL)) &&
1031 !mm_iommu_is_devmem(mm, *hpa, tbl->it_page_shift,
1033 SetPageDirty(pfn_to_page(*hpa >> PAGE_SHIFT));
1037 EXPORT_SYMBOL_GPL(iommu_tce_xchg_no_kill);
1039 void iommu_tce_kill(struct iommu_table *tbl,
1040 unsigned long entry, unsigned long pages)
1042 if (tbl->it_ops->tce_kill)
1043 tbl->it_ops->tce_kill(tbl, entry, pages, false);
1045 EXPORT_SYMBOL_GPL(iommu_tce_kill);
1047 int iommu_take_ownership(struct iommu_table *tbl)
1049 unsigned long flags, i, sz = (tbl->it_size + 7) >> 3;
1053 * VFIO does not control TCE entries allocation and the guest
1054 * can write new TCEs on top of existing ones so iommu_tce_build()
1055 * must be able to release old pages. This functionality
1056 * requires exchange() callback defined so if it is not
1057 * implemented, we disallow taking ownership over the table.
1059 if (!tbl->it_ops->xchg_no_kill)
1062 spin_lock_irqsave(&tbl->large_pool.lock, flags);
1063 for (i = 0; i < tbl->nr_pools; i++)
1064 spin_lock_nest_lock(&tbl->pools[i].lock, &tbl->large_pool.lock);
1066 iommu_table_release_pages(tbl);
1068 if (!bitmap_empty(tbl->it_map, tbl->it_size)) {
1069 pr_err("iommu_tce: it_map is not empty");
1071 /* Undo iommu_table_release_pages, i.e. restore bit#0, etc */
1072 iommu_table_reserve_pages(tbl, tbl->it_reserved_start,
1073 tbl->it_reserved_end);
1075 memset(tbl->it_map, 0xff, sz);
1078 for (i = 0; i < tbl->nr_pools; i++)
1079 spin_unlock(&tbl->pools[i].lock);
1080 spin_unlock_irqrestore(&tbl->large_pool.lock, flags);
1084 EXPORT_SYMBOL_GPL(iommu_take_ownership);
1086 void iommu_release_ownership(struct iommu_table *tbl)
1088 unsigned long flags, i, sz = (tbl->it_size + 7) >> 3;
1090 spin_lock_irqsave(&tbl->large_pool.lock, flags);
1091 for (i = 0; i < tbl->nr_pools; i++)
1092 spin_lock_nest_lock(&tbl->pools[i].lock, &tbl->large_pool.lock);
1094 memset(tbl->it_map, 0, sz);
1096 iommu_table_reserve_pages(tbl, tbl->it_reserved_start,
1097 tbl->it_reserved_end);
1099 for (i = 0; i < tbl->nr_pools; i++)
1100 spin_unlock(&tbl->pools[i].lock);
1101 spin_unlock_irqrestore(&tbl->large_pool.lock, flags);
1103 EXPORT_SYMBOL_GPL(iommu_release_ownership);
1105 int iommu_add_device(struct iommu_table_group *table_group, struct device *dev)
1108 * The sysfs entries should be populated before
1109 * binding IOMMU group. If sysfs entries isn't
1110 * ready, we simply bail.
1112 if (!device_is_registered(dev))
1115 if (device_iommu_mapped(dev)) {
1116 pr_debug("%s: Skipping device %s with iommu group %d\n",
1117 __func__, dev_name(dev),
1118 iommu_group_id(dev->iommu_group));
1122 pr_debug("%s: Adding %s to iommu group %d\n",
1123 __func__, dev_name(dev), iommu_group_id(table_group->group));
1125 return iommu_group_add_device(table_group->group, dev);
1127 EXPORT_SYMBOL_GPL(iommu_add_device);
1129 void iommu_del_device(struct device *dev)
1132 * Some devices might not have IOMMU table and group
1133 * and we needn't detach them from the associated
1136 if (!device_iommu_mapped(dev)) {
1137 pr_debug("iommu_tce: skipping device %s with no tbl\n",
1142 iommu_group_remove_device(dev);
1144 EXPORT_SYMBOL_GPL(iommu_del_device);
1145 #endif /* CONFIG_IOMMU_API */