1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 2018, IBM Corporation.
5 * This file contains general idle entry/exit functions to save
6 * and restore stack and NVGPRs which allows C code to call idle
7 * states that lose GPRs, and it will return transparently with
8 * SRR1 wakeup reason return value.
10 * The platform / CPU caller must ensure SPRs and any other non-GPR
11 * state is saved and restored correctly, handle KVM, interrupts, etc.
14 #include <asm/ppc_asm.h>
15 #include <asm/asm-offsets.h>
16 #include <asm/ppc-opcode.h>
17 #include <asm/cpuidle.h>
18 #include <asm/thread_info.h> /* TLF_NAPPING */
20 #ifdef CONFIG_PPC_P7_NAP
24 * No state will be lost regardless of wakeup mechanism (interrupt or NIA).
26 * An EC=0 type wakeup will return with a value of 0. SRESET wakeup (which can
27 * happen with xscom SRESET and possibly MCE) may clobber volatiles except LR,
28 * and must blr, to return to caller with r3 set according to caller's expected
29 * return code (for Book3S/64 that is SRR1).
31 _GLOBAL(isa300_idle_stop_noloss)
40 * GPRs may be lost, so they are saved here. Wakeup is by interrupt only.
41 * The SRESET wakeup returns to this function's caller by calling
42 * idle_return_gpr_loss with r3 set to desired return value.
44 * A wakeup without GPR loss may alteratively be handled as in
45 * isa300_idle_stop_noloss and blr directly, as an optimisation.
47 * The caller is responsible for saving/restoring SPRs, MSR, timebase,
50 _GLOBAL(isa300_idle_stop_mayloss)
56 * Use the stack red zone rather than a new frame for saving regs since
57 * in the case of no GPR loss the wakeup code branches directly back to
58 * the caller without deallocating the stack frame first.
86 * Desired return value in r3
88 * The idle wakeup SRESET interrupt can call this after calling
89 * to return to the idle sleep function caller with r3 as the return code.
91 * This must not be used if idle was entered via a _noloss function (use
92 * a simple blr instead).
94 _GLOBAL(idle_return_gpr_loss)
101 * KVM nap requires r2 to be saved, rather than just restoring it
102 * from PACATOC. This could be avoided for that less common case
103 * if KVM saved its r2.
127 * This is the sequence required to execute idle instructions, as
128 * specified in ISA v2.07 (and earlier). MSR[IR] and MSR[DR] must be 0.
129 * We have to store a GPR somewhere, ptesync, then reload it, and create
130 * a false dependency on the result of the load. It doesn't matter which
131 * GPR we store, or where we store it. We have already stored r2 to the
132 * stack at -8(r1) in isa206_idle_insn_mayloss, so use that.
134 #define IDLE_STATE_ENTER_SEQ_NORET(IDLE_INST) \
135 /* Magic NAP/SLEEP/WINKLE mode enter sequence */ \
139 236: cmpd cr0,r2,r2; \
145 * Desired instruction type in r3
147 * GPRs may be lost, so they are saved here. Wakeup is by interrupt only.
148 * The SRESET wakeup returns to this function's caller by calling
149 * idle_return_gpr_loss with r3 set to desired return value.
151 * A wakeup without GPR loss may alteratively be handled as in
152 * isa300_idle_stop_noloss and blr directly, as an optimisation.
154 * The caller is responsible for saving/restoring SPRs, MSR, timebase,
157 * This must be called in real-mode (MSR_IDLE).
159 _GLOBAL(isa206_idle_insn_mayloss)
164 * Use the stack red zone rather than a new frame for saving regs since
165 * in the case of no GPR loss the wakeup code branches directly back to
166 * the caller without deallocating the stack frame first.
189 cmpwi r3,PNV_THREAD_NAP
191 IDLE_STATE_ENTER_SEQ_NORET(PPC_NAP)
192 1: cmpwi r3,PNV_THREAD_SLEEP
194 IDLE_STATE_ENTER_SEQ_NORET(PPC_SLEEP)
195 2: IDLE_STATE_ENTER_SEQ_NORET(PPC_WINKLE)
198 #ifdef CONFIG_PPC_970_NAP
199 _GLOBAL(power4_idle_nap)
200 LOAD_REG_IMMEDIATE(r7, MSR_KERNEL|MSR_EE|MSR_POW)
201 ld r9,PACA_THREAD_INFO(r13)
202 ld r8,TI_LOCAL_FLAGS(r9)
203 ori r8,r8,_TLF_NAPPING
204 std r8,TI_LOCAL_FLAGS(r9)
206 * NAPPING bit is set, from this point onward power4_fixup_nap
207 * will cause exceptions to return to power4_idle_nap_return.