1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm/ptrace.h> /* for STACK_FRAME_REGS_MARKER */
8 * Exception entry code. This code runs with address translation
9 * turned off, i.e. using physical addresses.
10 * We assume sprg3 has the physical address of the current
11 * task's thread_struct.
13 .macro EXCEPTION_PROLOG trapno name handle_dar_dsisr=0
14 EXCEPTION_PROLOG_0 handle_dar_dsisr=\handle_dar_dsisr
16 EXCEPTION_PROLOG_2 \trapno \name handle_dar_dsisr=\handle_dar_dsisr
19 .macro EXCEPTION_PROLOG_0 handle_dar_dsisr=0
20 mtspr SPRN_SPRG_SCRATCH0,r10
21 mtspr SPRN_SPRG_SCRATCH1,r11
22 mfspr r10, SPRN_SPRG_THREAD
39 mfspr r11, SPRN_SRR1 /* check whether user or kernel */
42 andi. r11, r11, MSR_PR
45 .macro EXCEPTION_PROLOG_1
46 mtspr SPRN_SPRG_SCRATCH2,r1
47 subi r1, r1, INT_FRAME_SIZE /* use r1 if kernel */
49 mfspr r1,SPRN_SPRG_THREAD
50 lwz r1,TASK_STACK-THREAD(r1)
51 addi r1, r1, THREAD_SIZE - INT_FRAME_SIZE
53 #ifdef CONFIG_VMAP_STACK
55 bt 32 - THREAD_ALIGN_SHIFT, vmap_stack_overflow
59 .macro EXCEPTION_PROLOG_2 trapno name handle_dar_dsisr=0
63 mtspr SPRN_DAR, r11 /* Tag DAR, to be used in DTLB Error */
66 LOAD_REG_IMMEDIATE(r11, MSR_KERNEL & ~MSR_RI) /* re-enable MMU */
71 mfspr r11, SPRN_SPRG_SCRATCH2
80 stw r10,_CCR(r11) /* save registers */
83 mfspr r10,SPRN_SPRG_SCRATCH0
84 mfspr r12,SPRN_SPRG_SCRATCH1
89 mfspr r12, SPRN_SPRG_THREAD
100 rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
101 #elif defined(CONFIG_PPC_8xx)
102 mtspr SPRN_EID, r2 /* Set MSR_RI */
104 li r10, MSR_KERNEL /* can take exceptions */
105 mtmsr r10 /* (except for mach check in rtas) */
107 COMMON_EXCEPTION_PROLOG_END \trapno
108 _ASM_NOKPROBE_SYMBOL(\name\()_virt)
111 .macro COMMON_EXCEPTION_PROLOG_END trapno
113 lis r10,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
114 addi r10,r10,STACK_FRAME_REGS_MARKER@l
124 mfspr r2,SPRN_SPRG_THREAD
130 addi r3,r1,STACK_FRAME_OVERHEAD
133 .macro prepare_transfer_to_handler
134 #ifdef CONFIG_PPC_BOOK3S_32
137 bl prepare_transfer_to_handler
142 .macro SYSCALL_ENTRY trapno
145 LOAD_REG_IMMEDIATE(r11, MSR_KERNEL) /* can take exceptions */
150 mfspr r10,SPRN_SPRG_THREAD
152 lwz r1,TASK_STACK-THREAD(r10)
154 addi r1, r1, THREAD_SIZE - INT_FRAME_SIZE
159 rlwinm r12,r12,0,4,2 /* Clear SO bit in CR */
161 b transfer_to_syscall /* jump to handler */
165 * Note: code which follows this uses cr0.eq (set if from kernel),
166 * r11, r12 (SRR0), and r9 (SRR1).
168 * Note2: once we have set r1 we are in a position to take exceptions
169 * again, and we could thus set MSR:RI at that point.
175 #ifdef CONFIG_PPC_BOOK3S
176 #define START_EXCEPTION(n, label) \
183 #define START_EXCEPTION(n, label) \
190 #define EXCEPTION(n, label, hdlr) \
191 START_EXCEPTION(n, label) \
192 EXCEPTION_PROLOG n label; \
193 prepare_transfer_to_handler; \
197 .macro vmap_stack_overflow_exception
201 mfspr r1, SPRN_SPRG_THREAD
202 lwz r1, TASK_CPU - THREAD(r1)
204 addis r1, r1, emergency_ctx-PAGE_OFFSET@ha
206 lis r1, emergency_ctx-PAGE_OFFSET@ha
208 lwz r1, emergency_ctx-PAGE_OFFSET@l(r1)
209 addi r1, r1, THREAD_SIZE - INT_FRAME_SIZE
210 EXCEPTION_PROLOG_2 0 vmap_stack_overflow
211 prepare_transfer_to_handler
212 bl stack_overflow_exception
216 #endif /* __HEAD_32_H__ */