1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Rewritten by Cort Dougan (cort@fsmlabs.com) for PReP
6 * Copyright (C) 1996 Cort Dougan <cort@fsmlabs.com>
7 * Adapted for Power Macintosh by Paul Mackerras.
8 * Low-level exception handlers and MMU support
9 * rewritten by Paul Mackerras.
10 * Copyright (C) 1996 Paul Mackerras.
11 * MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
13 * This file contains the system call entry code, context switch
14 * code, and exception/interrupt return code for PowerPC.
17 #include <linux/errno.h>
18 #include <linux/err.h>
19 #include <linux/sys.h>
20 #include <linux/threads.h>
21 #include <linux/linkage.h>
26 #include <asm/cputable.h>
27 #include <asm/thread_info.h>
28 #include <asm/ppc_asm.h>
29 #include <asm/asm-offsets.h>
30 #include <asm/unistd.h>
31 #include <asm/ptrace.h>
32 #include <asm/export.h>
33 #include <asm/feature-fixups.h>
34 #include <asm/barrier.h>
37 #include <asm/interrupt.h>
42 * powerpc relies on return from interrupt/syscall being context synchronising
43 * (which rfi is) to support ARCH_HAS_MEMBARRIER_SYNC_CORE without additional
44 * synchronisation instructions.
48 * Align to 4k in order to ensure that all functions modyfing srr0/srr1
49 * fit into one page in order to not encounter a TLB miss between the
50 * modification of srr0/srr1 and the associated rfi.
54 #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_E500)
55 .globl prepare_transfer_to_handler
56 prepare_transfer_to_handler:
57 /* if from kernel, check interrupted DOZE/NAP mode */
58 lwz r12,TI_LOCAL_FLAGS(r2)
61 bt- 31-TLF_SLEEPING,7f
64 4: rlwinm r12,r12,0,~_TLF_NAPPING
65 stw r12,TI_LOCAL_FLAGS(r2)
66 b power_save_ppc32_restore
68 7: rlwinm r12,r12,0,~_TLF_SLEEPING
69 stw r12,TI_LOCAL_FLAGS(r2)
70 lwz r9,_MSR(r11) /* if sleeping, clear MSR.EE */
71 rlwinm r9,r9,0,~MSR_EE
72 lwz r12,_LINK(r11) /* and return to address in LR */
74 b fast_exception_return
75 _ASM_NOKPROBE_SYMBOL(prepare_transfer_to_handler)
76 #endif /* CONFIG_PPC_BOOK3S_32 || CONFIG_PPC_E500 */
78 #if defined(CONFIG_PPC_KUEP) && defined(CONFIG_PPC_BOOK3S_32)
79 SYM_FUNC_START(__kuep_lock)
80 lwz r9, THREAD+THSR0(r2)
81 update_user_segments_by_4 r9, r10, r11, r12
83 SYM_FUNC_END(__kuep_lock)
85 SYM_FUNC_START_LOCAL(__kuep_unlock)
86 lwz r9, THREAD+THSR0(r2)
88 update_user_segments_by_4 r9, r10, r11, r12
90 SYM_FUNC_END(__kuep_unlock)
105 .globl transfer_to_syscall
107 stw r3, ORIG_GPR3(r1)
112 #ifdef CONFIG_BOOKE_OR_40x
113 rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
115 lis r12,STACK_FRAME_REGS_MARKER@ha /* exception frame marker */
117 addi r12,r12,STACK_FRAME_REGS_MARKER@l
119 li r2, INTERRUPT_SYSCALL
120 stw r12,STACK_INT_FRAME_MARKER(r1)
128 /* Calling convention has r3 = regs, r4 = orig r0 */
129 addi r3,r1,STACK_INT_FRAME_REGS
131 bl system_call_exception
134 addi r4,r1,STACK_INT_FRAME_REGS
136 bl syscall_exit_prepare
137 #ifdef CONFIG_PPC_47x
138 lis r4,icache_44x_need_flush@ha
139 lwz r5,icache_44x_need_flush@l(r4)
141 bne- .L44x_icache_flush
142 #endif /* CONFIG_PPC_47x */
143 .L44x_icache_flush_return:
163 b . /* Prevent prefetch past rfi */
180 stw r7,icache_44x_need_flush@l(r4)
181 b .L44x_icache_flush_return
182 #endif /* CONFIG_44x */
188 li r3,0 /* fork() return value */
191 .globl ret_from_kernel_user_thread
192 ret_from_kernel_user_thread:
201 .globl start_kernel_thread
209 * This must not return. We actually want to BUG here, not WARN,
210 * because BUG will exit the process which is what the kernel thread
211 * should have done, which may give some hope of continuing.
214 EMIT_BUG_ENTRY 100b,__FILE__,__LINE__,0
216 .globl fast_exception_return
217 fast_exception_return:
218 #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
219 andi. r10,r9,MSR_RI /* check for recoverable interrupt */
220 beq 3f /* if not, we've got problems */
228 /* Clear the exception marker on the stack to avoid confusing stacktrace */
232 #if defined(CONFIG_PPC_8xx) && defined(CONFIG_PERF_EVENTS)
242 b . /* Prevent prefetch past rfi */
244 _ASM_NOKPROBE_SYMBOL(fast_exception_return)
246 /* aargh, a nonrecoverable interrupt, panic */
247 /* aargh, we don't know which trap this is */
251 prepare_transfer_to_handler
252 bl unrecoverable_exception
253 trap /* should not get here */
255 .globl interrupt_return
258 addi r3,r1,STACK_INT_FRAME_REGS
260 beq .Lkernel_interrupt_return
261 bl interrupt_exit_user_prepare
264 bne- .Lrestore_nvgprs
266 .Lfast_user_interrupt_return:
273 stwcx. r0,0,r1 /* to clear the reservation */
276 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
285 * Leaving a stale exception marker on the stack can confuse
286 * the reliable stack unwinder later on. Clear it.
301 b . /* Prevent prefetch past rfi */
306 b .Lfast_user_interrupt_return
308 .Lkernel_interrupt_return:
309 bl interrupt_exit_kernel_prepare
311 .Lfast_kernel_interrupt_return:
319 stwcx. r0,0,r1 /* to clear the reservation */
322 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
337 * Leaving a stale exception marker on the stack can confuse
338 * the reliable stack unwinder later on. Clear it.
344 bne- cr1,1f /* emulate stack store */
351 b . /* Prevent prefetch past rfi */
355 * Emulate stack store with update. New r1 value was already calculated
356 * and updated in our interrupt regs by emulate_loadstore, but we can't
357 * store the previous value of r1 to the stack before re-loading our
358 * registers from it, otherwise they could be clobbered. Use
359 * SPRG Scratch0 as temporary storage to hold the store
360 * data, as interrupts are disabled here so it won't be clobbered.
364 mtspr SPRN_SPRG_WSCRATCH0, r9
366 mtspr SPRN_SPRG_SCRATCH0, r9
368 addi r9,r1,INT_FRAME_SIZE /* get original r1 */
372 stw r9,0(r1) /* perform store component of stwu */
374 mfspr r9, SPRN_SPRG_RSCRATCH0
376 mfspr r9, SPRN_SPRG_SCRATCH0
380 b . /* Prevent prefetch past rfi */
382 _ASM_NOKPROBE_SYMBOL(interrupt_return)
384 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
387 * Returning from a critical interrupt in user mode doesn't need
388 * to be any different from a normal exception. For a critical
389 * interrupt in the kernel, we just return (without checking for
390 * preemption) since the interrupt may have happened at some crucial
391 * place (e.g. inside the TLB miss handler), and because we will be
392 * running with r1 pointing into critical_stack, not the current
393 * process's kernel stack (and therefore current_thread_info() will
394 * give the wrong answer).
395 * We have to restore various SPRs that may have been in use at the
396 * time of the critical interrupt.
400 #define PPC_40x_TURN_OFF_MSR_DR \
401 /* avoid any possible TLB misses here by turning off MSR.DR, we \
402 * assume the instructions here are mapped by a pinned TLB entry */ \
408 #define PPC_40x_TURN_OFF_MSR_DR
411 #define RET_FROM_EXC_LEVEL(exc_lvl_srr0, exc_lvl_srr1, exc_lvl_rfi) \
414 andi. r3,r3,MSR_PR; \
415 bne interrupt_return; \
417 REST_GPRS(2, 8, r1); \
420 mtspr SPRN_XER,r10; \
422 stwcx. r0,0,r1; /* to clear the reservation */ \
427 PPC_40x_TURN_OFF_MSR_DR; \
430 mtspr SPRN_DEAR,r9; \
431 mtspr SPRN_ESR,r10; \
434 mtspr exc_lvl_srr0,r11; \
435 mtspr exc_lvl_srr1,r12; \
436 REST_GPRS(9, 12, r1); \
439 b .; /* prevent prefetch past exc_lvl_rfi */
441 #define RESTORE_xSRR(exc_lvl_srr0, exc_lvl_srr1) \
442 lwz r9,_##exc_lvl_srr0(r1); \
443 lwz r10,_##exc_lvl_srr1(r1); \
444 mtspr SPRN_##exc_lvl_srr0,r9; \
445 mtspr SPRN_##exc_lvl_srr1,r10;
447 #if defined(CONFIG_PPC_E500)
448 #ifdef CONFIG_PHYS_64BIT
449 #define RESTORE_MAS7 \
454 #endif /* CONFIG_PHYS_64BIT */
455 #define RESTORE_MMU_REGS \
459 mtspr SPRN_MAS0,r9; \
461 mtspr SPRN_MAS1,r10; \
463 mtspr SPRN_MAS2,r11; \
464 mtspr SPRN_MAS3,r9; \
465 mtspr SPRN_MAS6,r10; \
467 #elif defined(CONFIG_44x)
468 #define RESTORE_MMU_REGS \
472 #define RESTORE_MMU_REGS
476 .globl ret_from_crit_exc
479 lwz r9,crit_srr0@l(r9);
480 lis r10,crit_srr1@ha;
481 lwz r10,crit_srr1@l(r10);
484 RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, PPC_RFCI)
485 _ASM_NOKPROBE_SYMBOL(ret_from_crit_exc)
486 #endif /* CONFIG_40x */
489 .globl ret_from_crit_exc
491 RESTORE_xSRR(SRR0,SRR1);
493 RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, PPC_RFCI)
494 _ASM_NOKPROBE_SYMBOL(ret_from_crit_exc)
496 .globl ret_from_debug_exc
498 RESTORE_xSRR(SRR0,SRR1);
499 RESTORE_xSRR(CSRR0,CSRR1);
501 RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, PPC_RFDI)
502 _ASM_NOKPROBE_SYMBOL(ret_from_debug_exc)
504 .globl ret_from_mcheck_exc
506 RESTORE_xSRR(SRR0,SRR1);
507 RESTORE_xSRR(CSRR0,CSRR1);
508 RESTORE_xSRR(DSRR0,DSRR1);
510 RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, PPC_RFMCI)
511 _ASM_NOKPROBE_SYMBOL(ret_from_mcheck_exc)
512 #endif /* CONFIG_BOOKE */
513 #endif /* !(CONFIG_4xx || CONFIG_BOOKE) */