arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / arch / powerpc / kernel / cpu_specs_e500mc.h
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4  *
5  *  Modifications for ppc64:
6  *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7  */
8
9 #ifdef CONFIG_PPC64
10 #define COMMON_USER_BOOKE       (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
11                                  PPC_FEATURE_HAS_FPU | PPC_FEATURE_64)
12 #else
13 #define COMMON_USER_BOOKE       (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
14                                  PPC_FEATURE_BOOKE)
15 #endif
16
17 static struct cpu_spec cpu_specs[] __initdata = {
18 #ifdef CONFIG_PPC32
19         {       /* e500mc */
20                 .pvr_mask               = 0xffff0000,
21                 .pvr_value              = 0x80230000,
22                 .cpu_name               = "e500mc",
23                 .cpu_features           = CPU_FTRS_E500MC,
24                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
25                 .cpu_user_features2     = PPC_FEATURE2_ISEL,
26                 .mmu_features           = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | MMU_FTR_USE_TLBILX,
27                 .icache_bsize           = 64,
28                 .dcache_bsize           = 64,
29                 .num_pmcs               = 4,
30                 .cpu_setup              = __setup_cpu_e500mc,
31                 .machine_check          = machine_check_e500mc,
32                 .platform               = "ppce500mc",
33                 .cpu_down_flush         = cpu_down_flush_e500mc,
34         },
35 #endif /* CONFIG_PPC32 */
36         {       /* e5500 */
37                 .pvr_mask               = 0xffff0000,
38                 .pvr_value              = 0x80240000,
39                 .cpu_name               = "e5500",
40                 .cpu_features           = CPU_FTRS_E5500,
41                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
42                 .cpu_user_features2     = PPC_FEATURE2_ISEL,
43                 .mmu_features           = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | MMU_FTR_USE_TLBILX,
44                 .icache_bsize           = 64,
45                 .dcache_bsize           = 64,
46                 .num_pmcs               = 4,
47                 .cpu_setup              = __setup_cpu_e5500,
48 #ifndef CONFIG_PPC32
49                 .cpu_restore            = __restore_cpu_e5500,
50 #endif
51                 .machine_check          = machine_check_e500mc,
52                 .platform               = "ppce5500",
53                 .cpu_down_flush         = cpu_down_flush_e5500,
54         },
55         {       /* e6500 */
56                 .pvr_mask               = 0xffff0000,
57                 .pvr_value              = 0x80400000,
58                 .cpu_name               = "e6500",
59                 .cpu_features           = CPU_FTRS_E6500,
60                 .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
61                                           PPC_FEATURE_HAS_ALTIVEC_COMP,
62                 .cpu_user_features2     = PPC_FEATURE2_ISEL,
63                 .mmu_features           = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | MMU_FTR_USE_TLBILX,
64                 .icache_bsize           = 64,
65                 .dcache_bsize           = 64,
66                 .num_pmcs               = 6,
67                 .cpu_setup              = __setup_cpu_e6500,
68 #ifndef CONFIG_PPC32
69                 .cpu_restore            = __restore_cpu_e6500,
70 #endif
71                 .machine_check          = machine_check_e500mc,
72                 .platform               = "ppce6500",
73                 .cpu_down_flush         = cpu_down_flush_e6500,
74         },
75 };