GNU Linux-libre 5.10.217-gnu1
[releases.git] / arch / powerpc / kernel / asm-offsets.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * This program is used to generate definitions needed by
4  * assembly language modules.
5  *
6  * We use the technique used in the OSF Mach kernel code:
7  * generate asm statements containing #defines,
8  * compile this file to assembler, and then extract the
9  * #defines from the assembly-language output.
10  */
11
12 #define GENERATING_ASM_OFFSETS  /* asm/smp.h */
13
14 #include <linux/compat.h>
15 #include <linux/signal.h>
16 #include <linux/sched.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/string.h>
20 #include <linux/types.h>
21 #include <linux/mman.h>
22 #include <linux/mm.h>
23 #include <linux/suspend.h>
24 #include <linux/hrtimer.h>
25 #ifdef CONFIG_PPC64
26 #include <linux/time.h>
27 #include <linux/hardirq.h>
28 #endif
29 #include <linux/kbuild.h>
30
31 #include <asm/io.h>
32 #include <asm/page.h>
33 #include <asm/processor.h>
34 #include <asm/cputable.h>
35 #include <asm/thread_info.h>
36 #include <asm/rtas.h>
37 #include <asm/vdso_datapage.h>
38 #include <asm/dbell.h>
39 #ifdef CONFIG_PPC64
40 #include <asm/paca.h>
41 #include <asm/lppaca.h>
42 #include <asm/cache.h>
43 #include <asm/mmu.h>
44 #include <asm/hvcall.h>
45 #include <asm/xics.h>
46 #endif
47 #ifdef CONFIG_PPC_POWERNV
48 #include <asm/opal.h>
49 #endif
50 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
51 #include <linux/kvm_host.h>
52 #endif
53 #if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
54 #include <asm/kvm_book3s.h>
55 #include <asm/kvm_ppc.h>
56 #endif
57
58 #ifdef CONFIG_PPC32
59 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
60 #include "head_booke.h"
61 #endif
62 #endif
63
64 #if defined(CONFIG_PPC_FSL_BOOK3E)
65 #include "../mm/mmu_decl.h"
66 #endif
67
68 #ifdef CONFIG_PPC_8xx
69 #include <asm/fixmap.h>
70 #endif
71
72 #ifdef CONFIG_XMON
73 #include "../xmon/xmon_bpts.h"
74 #endif
75
76 #define STACK_PT_REGS_OFFSET(sym, val)  \
77         DEFINE(sym, STACK_FRAME_OVERHEAD + offsetof(struct pt_regs, val))
78
79 int main(void)
80 {
81         OFFSET(THREAD, task_struct, thread);
82         OFFSET(MM, task_struct, mm);
83 #ifdef CONFIG_STACKPROTECTOR
84         OFFSET(TASK_CANARY, task_struct, stack_canary);
85 #ifdef CONFIG_PPC64
86         OFFSET(PACA_CANARY, paca_struct, canary);
87 #endif
88 #endif
89         OFFSET(MMCONTEXTID, mm_struct, context.id);
90 #ifdef CONFIG_PPC64
91         DEFINE(SIGSEGV, SIGSEGV);
92         DEFINE(NMI_MASK, NMI_MASK);
93 #else
94         OFFSET(KSP_LIMIT, thread_struct, ksp_limit);
95 #ifdef CONFIG_PPC_RTAS
96         OFFSET(RTAS_SP, thread_struct, rtas_sp);
97 #endif
98 #endif /* CONFIG_PPC64 */
99         OFFSET(TASK_STACK, task_struct, stack);
100 #ifdef CONFIG_SMP
101         OFFSET(TASK_CPU, task_struct, cpu);
102 #endif
103
104 #ifdef CONFIG_LIVEPATCH
105         OFFSET(TI_livepatch_sp, thread_info, livepatch_sp);
106 #endif
107
108         OFFSET(KSP, thread_struct, ksp);
109         OFFSET(PT_REGS, thread_struct, regs);
110 #ifdef CONFIG_BOOKE
111         OFFSET(THREAD_NORMSAVES, thread_struct, normsave[0]);
112 #endif
113         OFFSET(THREAD_FPEXC_MODE, thread_struct, fpexc_mode);
114         OFFSET(THREAD_FPSTATE, thread_struct, fp_state.fpr);
115         OFFSET(THREAD_FPSAVEAREA, thread_struct, fp_save_area);
116         OFFSET(FPSTATE_FPSCR, thread_fp_state, fpscr);
117         OFFSET(THREAD_LOAD_FP, thread_struct, load_fp);
118 #ifdef CONFIG_ALTIVEC
119         OFFSET(THREAD_VRSTATE, thread_struct, vr_state.vr);
120         OFFSET(THREAD_VRSAVEAREA, thread_struct, vr_save_area);
121         OFFSET(THREAD_VRSAVE, thread_struct, vrsave);
122         OFFSET(THREAD_USED_VR, thread_struct, used_vr);
123         OFFSET(VRSTATE_VSCR, thread_vr_state, vscr);
124         OFFSET(THREAD_LOAD_VEC, thread_struct, load_vec);
125 #endif /* CONFIG_ALTIVEC */
126 #ifdef CONFIG_VSX
127         OFFSET(THREAD_USED_VSR, thread_struct, used_vsr);
128 #endif /* CONFIG_VSX */
129 #ifdef CONFIG_PPC64
130         OFFSET(KSP_VSID, thread_struct, ksp_vsid);
131 #else /* CONFIG_PPC64 */
132         OFFSET(PGDIR, thread_struct, pgdir);
133 #ifdef CONFIG_VMAP_STACK
134         OFFSET(SRR0, thread_struct, srr0);
135         OFFSET(SRR1, thread_struct, srr1);
136         OFFSET(DAR, thread_struct, dar);
137         OFFSET(DSISR, thread_struct, dsisr);
138 #ifdef CONFIG_PPC_BOOK3S_32
139         OFFSET(THR0, thread_struct, r0);
140         OFFSET(THR3, thread_struct, r3);
141         OFFSET(THR4, thread_struct, r4);
142         OFFSET(THR5, thread_struct, r5);
143         OFFSET(THR6, thread_struct, r6);
144         OFFSET(THR8, thread_struct, r8);
145         OFFSET(THR9, thread_struct, r9);
146         OFFSET(THR11, thread_struct, r11);
147         OFFSET(THLR, thread_struct, lr);
148         OFFSET(THCTR, thread_struct, ctr);
149 #endif
150 #endif
151 #ifdef CONFIG_SPE
152         OFFSET(THREAD_EVR0, thread_struct, evr[0]);
153         OFFSET(THREAD_ACC, thread_struct, acc);
154         OFFSET(THREAD_SPEFSCR, thread_struct, spefscr);
155         OFFSET(THREAD_USED_SPE, thread_struct, used_spe);
156 #endif /* CONFIG_SPE */
157 #endif /* CONFIG_PPC64 */
158 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
159         OFFSET(THREAD_DBCR0, thread_struct, debug.dbcr0);
160 #endif
161 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
162         OFFSET(THREAD_KVM_SVCPU, thread_struct, kvm_shadow_vcpu);
163 #endif
164 #if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
165         OFFSET(THREAD_KVM_VCPU, thread_struct, kvm_vcpu);
166 #endif
167 #if defined(CONFIG_PPC_BOOK3S_32) && defined(CONFIG_PPC_KUAP)
168         OFFSET(KUAP, thread_struct, kuap);
169 #endif
170
171 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
172         OFFSET(PACATMSCRATCH, paca_struct, tm_scratch);
173         OFFSET(THREAD_TM_TFHAR, thread_struct, tm_tfhar);
174         OFFSET(THREAD_TM_TEXASR, thread_struct, tm_texasr);
175         OFFSET(THREAD_TM_TFIAR, thread_struct, tm_tfiar);
176         OFFSET(THREAD_TM_TAR, thread_struct, tm_tar);
177         OFFSET(THREAD_TM_PPR, thread_struct, tm_ppr);
178         OFFSET(THREAD_TM_DSCR, thread_struct, tm_dscr);
179         OFFSET(THREAD_TM_AMR, thread_struct, tm_amr);
180         OFFSET(PT_CKPT_REGS, thread_struct, ckpt_regs);
181         OFFSET(THREAD_CKVRSTATE, thread_struct, ckvr_state.vr);
182         OFFSET(THREAD_CKVRSAVE, thread_struct, ckvrsave);
183         OFFSET(THREAD_CKFPSTATE, thread_struct, ckfp_state.fpr);
184         /* Local pt_regs on stack for Transactional Memory funcs. */
185         DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
186                sizeof(struct pt_regs) + 16);
187 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
188
189         OFFSET(TI_FLAGS, thread_info, flags);
190         OFFSET(TI_LOCAL_FLAGS, thread_info, local_flags);
191         OFFSET(TI_PREEMPT, thread_info, preempt_count);
192
193 #ifdef CONFIG_PPC64
194         OFFSET(DCACHEL1BLOCKSIZE, ppc64_caches, l1d.block_size);
195         OFFSET(DCACHEL1LOGBLOCKSIZE, ppc64_caches, l1d.log_block_size);
196         OFFSET(DCACHEL1BLOCKSPERPAGE, ppc64_caches, l1d.blocks_per_page);
197         OFFSET(ICACHEL1BLOCKSIZE, ppc64_caches, l1i.block_size);
198         OFFSET(ICACHEL1LOGBLOCKSIZE, ppc64_caches, l1i.log_block_size);
199         OFFSET(ICACHEL1BLOCKSPERPAGE, ppc64_caches, l1i.blocks_per_page);
200         /* paca */
201         DEFINE(PACA_SIZE, sizeof(struct paca_struct));
202         OFFSET(PACAPACAINDEX, paca_struct, paca_index);
203         OFFSET(PACAPROCSTART, paca_struct, cpu_start);
204         OFFSET(PACAKSAVE, paca_struct, kstack);
205         OFFSET(PACACURRENT, paca_struct, __current);
206         DEFINE(PACA_THREAD_INFO, offsetof(struct paca_struct, __current) +
207                                  offsetof(struct task_struct, thread_info));
208         OFFSET(PACASAVEDMSR, paca_struct, saved_msr);
209         OFFSET(PACAR1, paca_struct, saved_r1);
210         OFFSET(PACATOC, paca_struct, kernel_toc);
211         OFFSET(PACAKBASE, paca_struct, kernelbase);
212         OFFSET(PACAKMSR, paca_struct, kernel_msr);
213         OFFSET(PACAIRQSOFTMASK, paca_struct, irq_soft_mask);
214         OFFSET(PACAIRQHAPPENED, paca_struct, irq_happened);
215         OFFSET(PACA_FTRACE_ENABLED, paca_struct, ftrace_enabled);
216 #ifdef CONFIG_PPC_BOOK3S
217         OFFSET(PACACONTEXTID, paca_struct, mm_ctx_id);
218 #ifdef CONFIG_PPC_MM_SLICES
219         OFFSET(PACALOWSLICESPSIZE, paca_struct, mm_ctx_low_slices_psize);
220         OFFSET(PACAHIGHSLICEPSIZE, paca_struct, mm_ctx_high_slices_psize);
221         OFFSET(PACA_SLB_ADDR_LIMIT, paca_struct, mm_ctx_slb_addr_limit);
222         DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
223 #endif /* CONFIG_PPC_MM_SLICES */
224 #endif
225
226 #ifdef CONFIG_PPC_BOOK3E
227         OFFSET(PACAPGD, paca_struct, pgd);
228         OFFSET(PACA_KERNELPGD, paca_struct, kernel_pgd);
229         OFFSET(PACA_EXGEN, paca_struct, exgen);
230         OFFSET(PACA_EXTLB, paca_struct, extlb);
231         OFFSET(PACA_EXMC, paca_struct, exmc);
232         OFFSET(PACA_EXCRIT, paca_struct, excrit);
233         OFFSET(PACA_EXDBG, paca_struct, exdbg);
234         OFFSET(PACA_MC_STACK, paca_struct, mc_kstack);
235         OFFSET(PACA_CRIT_STACK, paca_struct, crit_kstack);
236         OFFSET(PACA_DBG_STACK, paca_struct, dbg_kstack);
237         OFFSET(PACA_TCD_PTR, paca_struct, tcd_ptr);
238
239         OFFSET(TCD_ESEL_NEXT, tlb_core_data, esel_next);
240         OFFSET(TCD_ESEL_MAX, tlb_core_data, esel_max);
241         OFFSET(TCD_ESEL_FIRST, tlb_core_data, esel_first);
242 #endif /* CONFIG_PPC_BOOK3E */
243
244 #ifdef CONFIG_PPC_BOOK3S_64
245         OFFSET(PACASLBCACHE, paca_struct, slb_cache);
246         OFFSET(PACASLBCACHEPTR, paca_struct, slb_cache_ptr);
247         OFFSET(PACASTABRR, paca_struct, stab_rr);
248         OFFSET(PACAVMALLOCSLLP, paca_struct, vmalloc_sllp);
249 #ifdef CONFIG_PPC_MM_SLICES
250         OFFSET(MMUPSIZESLLP, mmu_psize_def, sllp);
251 #else
252         OFFSET(PACACONTEXTSLLP, paca_struct, mm_ctx_sllp);
253 #endif /* CONFIG_PPC_MM_SLICES */
254         OFFSET(PACA_EXGEN, paca_struct, exgen);
255         OFFSET(PACA_EXMC, paca_struct, exmc);
256         OFFSET(PACA_EXSLB, paca_struct, exslb);
257         OFFSET(PACA_EXNMI, paca_struct, exnmi);
258 #ifdef CONFIG_PPC_PSERIES
259         OFFSET(PACALPPACAPTR, paca_struct, lppaca_ptr);
260 #endif
261         OFFSET(PACA_SLBSHADOWPTR, paca_struct, slb_shadow_ptr);
262         OFFSET(SLBSHADOW_STACKVSID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid);
263         OFFSET(SLBSHADOW_STACKESID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid);
264         OFFSET(SLBSHADOW_SAVEAREA, slb_shadow, save_area);
265         OFFSET(LPPACA_PMCINUSE, lppaca, pmcregs_in_use);
266 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
267         OFFSET(PACA_PMCINUSE, paca_struct, pmcregs_in_use);
268 #endif
269         OFFSET(LPPACA_DTLIDX, lppaca, dtl_idx);
270         OFFSET(LPPACA_YIELDCOUNT, lppaca, yield_count);
271         OFFSET(PACA_DTL_RIDX, paca_struct, dtl_ridx);
272 #endif /* CONFIG_PPC_BOOK3S_64 */
273         OFFSET(PACAEMERGSP, paca_struct, emergency_sp);
274 #ifdef CONFIG_PPC_BOOK3S_64
275         OFFSET(PACAMCEMERGSP, paca_struct, mc_emergency_sp);
276         OFFSET(PACA_NMI_EMERG_SP, paca_struct, nmi_emergency_sp);
277         OFFSET(PACA_IN_MCE, paca_struct, in_mce);
278         OFFSET(PACA_IN_NMI, paca_struct, in_nmi);
279         OFFSET(PACA_RFI_FLUSH_FALLBACK_AREA, paca_struct, rfi_flush_fallback_area);
280         OFFSET(PACA_EXRFI, paca_struct, exrfi);
281         OFFSET(PACA_L1D_FLUSH_SIZE, paca_struct, l1d_flush_size);
282
283 #endif
284         OFFSET(PACAHWCPUID, paca_struct, hw_cpu_id);
285         OFFSET(PACAKEXECSTATE, paca_struct, kexec_state);
286         OFFSET(PACA_DSCR_DEFAULT, paca_struct, dscr_default);
287         OFFSET(ACCOUNT_STARTTIME, paca_struct, accounting.starttime);
288         OFFSET(ACCOUNT_STARTTIME_USER, paca_struct, accounting.starttime_user);
289         OFFSET(ACCOUNT_USER_TIME, paca_struct, accounting.utime);
290         OFFSET(ACCOUNT_SYSTEM_TIME, paca_struct, accounting.stime);
291 #ifdef CONFIG_PPC_BOOK3E
292         OFFSET(PACA_TRAP_SAVE, paca_struct, trap_save);
293 #endif
294         OFFSET(PACA_SPRG_VDSO, paca_struct, sprg_vdso);
295 #else /* CONFIG_PPC64 */
296 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
297         OFFSET(ACCOUNT_STARTTIME, thread_info, accounting.starttime);
298         OFFSET(ACCOUNT_STARTTIME_USER, thread_info, accounting.starttime_user);
299         OFFSET(ACCOUNT_USER_TIME, thread_info, accounting.utime);
300         OFFSET(ACCOUNT_SYSTEM_TIME, thread_info, accounting.stime);
301 #endif
302 #endif /* CONFIG_PPC64 */
303
304         /* RTAS */
305         OFFSET(RTASBASE, rtas_t, base);
306         OFFSET(RTASENTRY, rtas_t, entry);
307
308         /* Interrupt register frame */
309         DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
310         DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_WITH_PT_REGS);
311         STACK_PT_REGS_OFFSET(GPR0, gpr[0]);
312         STACK_PT_REGS_OFFSET(GPR1, gpr[1]);
313         STACK_PT_REGS_OFFSET(GPR2, gpr[2]);
314         STACK_PT_REGS_OFFSET(GPR3, gpr[3]);
315         STACK_PT_REGS_OFFSET(GPR4, gpr[4]);
316         STACK_PT_REGS_OFFSET(GPR5, gpr[5]);
317         STACK_PT_REGS_OFFSET(GPR6, gpr[6]);
318         STACK_PT_REGS_OFFSET(GPR7, gpr[7]);
319         STACK_PT_REGS_OFFSET(GPR8, gpr[8]);
320         STACK_PT_REGS_OFFSET(GPR9, gpr[9]);
321         STACK_PT_REGS_OFFSET(GPR10, gpr[10]);
322         STACK_PT_REGS_OFFSET(GPR11, gpr[11]);
323         STACK_PT_REGS_OFFSET(GPR12, gpr[12]);
324         STACK_PT_REGS_OFFSET(GPR13, gpr[13]);
325 #ifndef CONFIG_PPC64
326         STACK_PT_REGS_OFFSET(GPR14, gpr[14]);
327 #endif /* CONFIG_PPC64 */
328         /*
329          * Note: these symbols include _ because they overlap with special
330          * register names
331          */
332         STACK_PT_REGS_OFFSET(_NIP, nip);
333         STACK_PT_REGS_OFFSET(_MSR, msr);
334         STACK_PT_REGS_OFFSET(_CTR, ctr);
335         STACK_PT_REGS_OFFSET(_LINK, link);
336         STACK_PT_REGS_OFFSET(_CCR, ccr);
337         STACK_PT_REGS_OFFSET(_XER, xer);
338         STACK_PT_REGS_OFFSET(_DAR, dar);
339         STACK_PT_REGS_OFFSET(_DSISR, dsisr);
340         STACK_PT_REGS_OFFSET(ORIG_GPR3, orig_gpr3);
341         STACK_PT_REGS_OFFSET(RESULT, result);
342         STACK_PT_REGS_OFFSET(_TRAP, trap);
343 #ifndef CONFIG_PPC64
344         /*
345          * The PowerPC 400-class & Book-E processors have neither the DAR
346          * nor the DSISR SPRs. Hence, we overload them to hold the similar
347          * DEAR and ESR SPRs for such processors.  For critical interrupts
348          * we use them to hold SRR0 and SRR1.
349          */
350         STACK_PT_REGS_OFFSET(_DEAR, dar);
351         STACK_PT_REGS_OFFSET(_ESR, dsisr);
352 #else /* CONFIG_PPC64 */
353         STACK_PT_REGS_OFFSET(SOFTE, softe);
354         STACK_PT_REGS_OFFSET(_PPR, ppr);
355 #endif /* CONFIG_PPC64 */
356
357 #ifdef CONFIG_PPC_KUAP
358         STACK_PT_REGS_OFFSET(STACK_REGS_KUAP, kuap);
359 #endif
360
361 #if defined(CONFIG_PPC32)
362 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
363         DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
364         DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
365         /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
366         DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
367         DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
368         DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
369         DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
370         DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
371         DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
372         DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
373         DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
374         DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
375         DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
376         DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
377         DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
378         DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
379 #endif
380 #endif
381
382 #ifndef CONFIG_PPC64
383         OFFSET(MM_PGD, mm_struct, pgd);
384 #endif /* ! CONFIG_PPC64 */
385
386         /* About the CPU features table */
387         OFFSET(CPU_SPEC_FEATURES, cpu_spec, cpu_features);
388         OFFSET(CPU_SPEC_SETUP, cpu_spec, cpu_setup);
389         OFFSET(CPU_SPEC_RESTORE, cpu_spec, cpu_restore);
390
391         OFFSET(pbe_address, pbe, address);
392         OFFSET(pbe_orig_address, pbe, orig_address);
393         OFFSET(pbe_next, pbe, next);
394
395 #ifndef CONFIG_PPC64
396         DEFINE(TASK_SIZE, TASK_SIZE);
397         DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
398 #endif /* ! CONFIG_PPC64 */
399
400         /* datapage offsets for use by vdso */
401         OFFSET(CFG_TB_ORIG_STAMP, vdso_data, tb_orig_stamp);
402         OFFSET(CFG_TB_TICKS_PER_SEC, vdso_data, tb_ticks_per_sec);
403         OFFSET(CFG_TB_TO_XS, vdso_data, tb_to_xs);
404         OFFSET(CFG_TB_UPDATE_COUNT, vdso_data, tb_update_count);
405         OFFSET(CFG_TZ_MINUTEWEST, vdso_data, tz_minuteswest);
406         OFFSET(CFG_TZ_DSTTIME, vdso_data, tz_dsttime);
407         OFFSET(CFG_SYSCALL_MAP32, vdso_data, syscall_map_32);
408         OFFSET(WTOM_CLOCK_SEC, vdso_data, wtom_clock_sec);
409         OFFSET(WTOM_CLOCK_NSEC, vdso_data, wtom_clock_nsec);
410         OFFSET(STAMP_XTIME_SEC, vdso_data, stamp_xtime_sec);
411         OFFSET(STAMP_XTIME_NSEC, vdso_data, stamp_xtime_nsec);
412         OFFSET(STAMP_SEC_FRAC, vdso_data, stamp_sec_fraction);
413         OFFSET(CLOCK_HRTIMER_RES, vdso_data, hrtimer_res);
414 #ifdef CONFIG_PPC64
415         OFFSET(CFG_ICACHE_BLOCKSZ, vdso_data, icache_block_size);
416         OFFSET(CFG_DCACHE_BLOCKSZ, vdso_data, dcache_block_size);
417         OFFSET(CFG_ICACHE_LOGBLOCKSZ, vdso_data, icache_log_block_size);
418         OFFSET(CFG_DCACHE_LOGBLOCKSZ, vdso_data, dcache_log_block_size);
419         OFFSET(CFG_SYSCALL_MAP64, vdso_data, syscall_map_64);
420         OFFSET(TVAL64_TV_SEC, __kernel_old_timeval, tv_sec);
421         OFFSET(TVAL64_TV_USEC, __kernel_old_timeval, tv_usec);
422 #endif
423         OFFSET(TSPC64_TV_SEC, __kernel_timespec, tv_sec);
424         OFFSET(TSPC64_TV_NSEC, __kernel_timespec, tv_nsec);
425         OFFSET(TVAL32_TV_SEC, old_timeval32, tv_sec);
426         OFFSET(TVAL32_TV_USEC, old_timeval32, tv_usec);
427         OFFSET(TSPC32_TV_SEC, old_timespec32, tv_sec);
428         OFFSET(TSPC32_TV_NSEC, old_timespec32, tv_nsec);
429         /* timeval/timezone offsets for use by vdso */
430         OFFSET(TZONE_TZ_MINWEST, timezone, tz_minuteswest);
431         OFFSET(TZONE_TZ_DSTTIME, timezone, tz_dsttime);
432
433         /* Other bits used by the vdso */
434         DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
435         DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
436         DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
437         DEFINE(CLOCK_MONOTONIC_COARSE, CLOCK_MONOTONIC_COARSE);
438         DEFINE(CLOCK_MAX, CLOCK_TAI);
439         DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
440         DEFINE(EINVAL, EINVAL);
441         DEFINE(KTIME_LOW_RES, KTIME_LOW_RES);
442
443 #ifdef CONFIG_BUG
444         DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
445 #endif
446
447 #ifdef CONFIG_PPC_BOOK3S_64
448         DEFINE(PGD_TABLE_SIZE, (sizeof(pgd_t) << max(RADIX_PGD_INDEX_SIZE, H_PGD_INDEX_SIZE)));
449 #else
450         DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
451 #endif
452         DEFINE(PTE_SIZE, sizeof(pte_t));
453
454 #ifdef CONFIG_KVM
455         OFFSET(VCPU_HOST_STACK, kvm_vcpu, arch.host_stack);
456         OFFSET(VCPU_HOST_PID, kvm_vcpu, arch.host_pid);
457         OFFSET(VCPU_GUEST_PID, kvm_vcpu, arch.pid);
458         OFFSET(VCPU_GPRS, kvm_vcpu, arch.regs.gpr);
459         OFFSET(VCPU_VRSAVE, kvm_vcpu, arch.vrsave);
460         OFFSET(VCPU_FPRS, kvm_vcpu, arch.fp.fpr);
461 #ifdef CONFIG_ALTIVEC
462         OFFSET(VCPU_VRS, kvm_vcpu, arch.vr.vr);
463 #endif
464         OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
465         OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
466         OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
467 #ifdef CONFIG_PPC_BOOK3S
468         OFFSET(VCPU_TAR, kvm_vcpu, arch.tar);
469 #endif
470         OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
471         OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
472 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
473         OFFSET(VCPU_MSR, kvm_vcpu, arch.shregs.msr);
474         OFFSET(VCPU_SRR0, kvm_vcpu, arch.shregs.srr0);
475         OFFSET(VCPU_SRR1, kvm_vcpu, arch.shregs.srr1);
476         OFFSET(VCPU_SPRG0, kvm_vcpu, arch.shregs.sprg0);
477         OFFSET(VCPU_SPRG1, kvm_vcpu, arch.shregs.sprg1);
478         OFFSET(VCPU_SPRG2, kvm_vcpu, arch.shregs.sprg2);
479         OFFSET(VCPU_SPRG3, kvm_vcpu, arch.shregs.sprg3);
480 #endif
481 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
482         OFFSET(VCPU_TB_RMENTRY, kvm_vcpu, arch.rm_entry);
483         OFFSET(VCPU_TB_RMINTR, kvm_vcpu, arch.rm_intr);
484         OFFSET(VCPU_TB_RMEXIT, kvm_vcpu, arch.rm_exit);
485         OFFSET(VCPU_TB_GUEST, kvm_vcpu, arch.guest_time);
486         OFFSET(VCPU_TB_CEDE, kvm_vcpu, arch.cede_time);
487         OFFSET(VCPU_CUR_ACTIVITY, kvm_vcpu, arch.cur_activity);
488         OFFSET(VCPU_ACTIVITY_START, kvm_vcpu, arch.cur_tb_start);
489         OFFSET(TAS_SEQCOUNT, kvmhv_tb_accumulator, seqcount);
490         OFFSET(TAS_TOTAL, kvmhv_tb_accumulator, tb_total);
491         OFFSET(TAS_MIN, kvmhv_tb_accumulator, tb_min);
492         OFFSET(TAS_MAX, kvmhv_tb_accumulator, tb_max);
493 #endif
494         OFFSET(VCPU_SHARED_SPRG3, kvm_vcpu_arch_shared, sprg3);
495         OFFSET(VCPU_SHARED_SPRG4, kvm_vcpu_arch_shared, sprg4);
496         OFFSET(VCPU_SHARED_SPRG5, kvm_vcpu_arch_shared, sprg5);
497         OFFSET(VCPU_SHARED_SPRG6, kvm_vcpu_arch_shared, sprg6);
498         OFFSET(VCPU_SHARED_SPRG7, kvm_vcpu_arch_shared, sprg7);
499         OFFSET(VCPU_SHADOW_PID, kvm_vcpu, arch.shadow_pid);
500         OFFSET(VCPU_SHADOW_PID1, kvm_vcpu, arch.shadow_pid1);
501         OFFSET(VCPU_SHARED, kvm_vcpu, arch.shared);
502         OFFSET(VCPU_SHARED_MSR, kvm_vcpu_arch_shared, msr);
503         OFFSET(VCPU_SHADOW_MSR, kvm_vcpu, arch.shadow_msr);
504 #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
505         OFFSET(VCPU_SHAREDBE, kvm_vcpu, arch.shared_big_endian);
506 #endif
507
508         OFFSET(VCPU_SHARED_MAS0, kvm_vcpu_arch_shared, mas0);
509         OFFSET(VCPU_SHARED_MAS1, kvm_vcpu_arch_shared, mas1);
510         OFFSET(VCPU_SHARED_MAS2, kvm_vcpu_arch_shared, mas2);
511         OFFSET(VCPU_SHARED_MAS7_3, kvm_vcpu_arch_shared, mas7_3);
512         OFFSET(VCPU_SHARED_MAS4, kvm_vcpu_arch_shared, mas4);
513         OFFSET(VCPU_SHARED_MAS6, kvm_vcpu_arch_shared, mas6);
514
515         OFFSET(VCPU_KVM, kvm_vcpu, kvm);
516         OFFSET(KVM_LPID, kvm, arch.lpid);
517
518         /* book3s */
519 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
520         OFFSET(KVM_TLB_SETS, kvm, arch.tlb_sets);
521         OFFSET(KVM_SDR1, kvm, arch.sdr1);
522         OFFSET(KVM_HOST_LPID, kvm, arch.host_lpid);
523         OFFSET(KVM_HOST_LPCR, kvm, arch.host_lpcr);
524         OFFSET(KVM_HOST_SDR1, kvm, arch.host_sdr1);
525         OFFSET(KVM_NEED_FLUSH, kvm, arch.need_tlb_flush.bits);
526         OFFSET(KVM_ENABLED_HCALLS, kvm, arch.enabled_hcalls);
527         OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v);
528         OFFSET(KVM_RADIX, kvm, arch.radix);
529         OFFSET(KVM_FWNMI, kvm, arch.fwnmi_enabled);
530         OFFSET(KVM_SECURE_GUEST, kvm, arch.secure_guest);
531         OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr);
532         OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);
533         OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr);
534         OFFSET(VCPU_VPA_DIRTY, kvm_vcpu, arch.vpa.dirty);
535         OFFSET(VCPU_HEIR, kvm_vcpu, arch.emul_inst);
536         OFFSET(VCPU_NESTED, kvm_vcpu, arch.nested);
537         OFFSET(VCPU_CPU, kvm_vcpu, cpu);
538         OFFSET(VCPU_THREAD_CPU, kvm_vcpu, arch.thread_cpu);
539 #endif
540 #ifdef CONFIG_PPC_BOOK3S
541         OFFSET(VCPU_PURR, kvm_vcpu, arch.purr);
542         OFFSET(VCPU_SPURR, kvm_vcpu, arch.spurr);
543         OFFSET(VCPU_IC, kvm_vcpu, arch.ic);
544         OFFSET(VCPU_DSCR, kvm_vcpu, arch.dscr);
545         OFFSET(VCPU_AMR, kvm_vcpu, arch.amr);
546         OFFSET(VCPU_UAMOR, kvm_vcpu, arch.uamor);
547         OFFSET(VCPU_IAMR, kvm_vcpu, arch.iamr);
548         OFFSET(VCPU_CTRL, kvm_vcpu, arch.ctrl);
549         OFFSET(VCPU_DABR, kvm_vcpu, arch.dabr);
550         OFFSET(VCPU_DABRX, kvm_vcpu, arch.dabrx);
551         OFFSET(VCPU_DAWR, kvm_vcpu, arch.dawr);
552         OFFSET(VCPU_DAWRX, kvm_vcpu, arch.dawrx);
553         OFFSET(VCPU_CIABR, kvm_vcpu, arch.ciabr);
554         OFFSET(VCPU_HFLAGS, kvm_vcpu, arch.hflags);
555         OFFSET(VCPU_DEC, kvm_vcpu, arch.dec);
556         OFFSET(VCPU_DEC_EXPIRES, kvm_vcpu, arch.dec_expires);
557         OFFSET(VCPU_PENDING_EXC, kvm_vcpu, arch.pending_exceptions);
558         OFFSET(VCPU_CEDED, kvm_vcpu, arch.ceded);
559         OFFSET(VCPU_PRODDED, kvm_vcpu, arch.prodded);
560         OFFSET(VCPU_IRQ_PENDING, kvm_vcpu, arch.irq_pending);
561         OFFSET(VCPU_DBELL_REQ, kvm_vcpu, arch.doorbell_request);
562         OFFSET(VCPU_MMCR, kvm_vcpu, arch.mmcr);
563         OFFSET(VCPU_MMCRA, kvm_vcpu, arch.mmcra);
564         OFFSET(VCPU_MMCRS, kvm_vcpu, arch.mmcrs);
565         OFFSET(VCPU_PMC, kvm_vcpu, arch.pmc);
566         OFFSET(VCPU_SPMC, kvm_vcpu, arch.spmc);
567         OFFSET(VCPU_SIAR, kvm_vcpu, arch.siar);
568         OFFSET(VCPU_SDAR, kvm_vcpu, arch.sdar);
569         OFFSET(VCPU_SIER, kvm_vcpu, arch.sier);
570         OFFSET(VCPU_SLB, kvm_vcpu, arch.slb);
571         OFFSET(VCPU_SLB_MAX, kvm_vcpu, arch.slb_max);
572         OFFSET(VCPU_SLB_NR, kvm_vcpu, arch.slb_nr);
573         OFFSET(VCPU_FAULT_DSISR, kvm_vcpu, arch.fault_dsisr);
574         OFFSET(VCPU_FAULT_DAR, kvm_vcpu, arch.fault_dar);
575         OFFSET(VCPU_FAULT_GPA, kvm_vcpu, arch.fault_gpa);
576         OFFSET(VCPU_INTR_MSR, kvm_vcpu, arch.intr_msr);
577         OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
578         OFFSET(VCPU_TRAP, kvm_vcpu, arch.trap);
579         OFFSET(VCPU_CFAR, kvm_vcpu, arch.cfar);
580         OFFSET(VCPU_PPR, kvm_vcpu, arch.ppr);
581         OFFSET(VCPU_FSCR, kvm_vcpu, arch.fscr);
582         OFFSET(VCPU_PSPB, kvm_vcpu, arch.pspb);
583         OFFSET(VCPU_EBBHR, kvm_vcpu, arch.ebbhr);
584         OFFSET(VCPU_EBBRR, kvm_vcpu, arch.ebbrr);
585         OFFSET(VCPU_BESCR, kvm_vcpu, arch.bescr);
586         OFFSET(VCPU_CSIGR, kvm_vcpu, arch.csigr);
587         OFFSET(VCPU_TACR, kvm_vcpu, arch.tacr);
588         OFFSET(VCPU_TCSCR, kvm_vcpu, arch.tcscr);
589         OFFSET(VCPU_ACOP, kvm_vcpu, arch.acop);
590         OFFSET(VCPU_WORT, kvm_vcpu, arch.wort);
591         OFFSET(VCPU_TID, kvm_vcpu, arch.tid);
592         OFFSET(VCPU_PSSCR, kvm_vcpu, arch.psscr);
593         OFFSET(VCPU_HFSCR, kvm_vcpu, arch.hfscr);
594         OFFSET(VCORE_ENTRY_EXIT, kvmppc_vcore, entry_exit_map);
595         OFFSET(VCORE_IN_GUEST, kvmppc_vcore, in_guest);
596         OFFSET(VCORE_NAPPING_THREADS, kvmppc_vcore, napping_threads);
597         OFFSET(VCORE_KVM, kvmppc_vcore, kvm);
598         OFFSET(VCORE_TB_OFFSET, kvmppc_vcore, tb_offset);
599         OFFSET(VCORE_TB_OFFSET_APPL, kvmppc_vcore, tb_offset_applied);
600         OFFSET(VCORE_LPCR, kvmppc_vcore, lpcr);
601         OFFSET(VCORE_PCR, kvmppc_vcore, pcr);
602         OFFSET(VCORE_DPDES, kvmppc_vcore, dpdes);
603         OFFSET(VCORE_VTB, kvmppc_vcore, vtb);
604         OFFSET(VCPU_SLB_E, kvmppc_slb, orige);
605         OFFSET(VCPU_SLB_V, kvmppc_slb, origv);
606         DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
607 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
608         OFFSET(VCPU_TFHAR, kvm_vcpu, arch.tfhar);
609         OFFSET(VCPU_TFIAR, kvm_vcpu, arch.tfiar);
610         OFFSET(VCPU_TEXASR, kvm_vcpu, arch.texasr);
611         OFFSET(VCPU_ORIG_TEXASR, kvm_vcpu, arch.orig_texasr);
612         OFFSET(VCPU_GPR_TM, kvm_vcpu, arch.gpr_tm);
613         OFFSET(VCPU_FPRS_TM, kvm_vcpu, arch.fp_tm.fpr);
614         OFFSET(VCPU_VRS_TM, kvm_vcpu, arch.vr_tm.vr);
615         OFFSET(VCPU_VRSAVE_TM, kvm_vcpu, arch.vrsave_tm);
616         OFFSET(VCPU_CR_TM, kvm_vcpu, arch.cr_tm);
617         OFFSET(VCPU_XER_TM, kvm_vcpu, arch.xer_tm);
618         OFFSET(VCPU_LR_TM, kvm_vcpu, arch.lr_tm);
619         OFFSET(VCPU_CTR_TM, kvm_vcpu, arch.ctr_tm);
620         OFFSET(VCPU_AMR_TM, kvm_vcpu, arch.amr_tm);
621         OFFSET(VCPU_PPR_TM, kvm_vcpu, arch.ppr_tm);
622         OFFSET(VCPU_DSCR_TM, kvm_vcpu, arch.dscr_tm);
623         OFFSET(VCPU_TAR_TM, kvm_vcpu, arch.tar_tm);
624 #endif
625
626 #ifdef CONFIG_PPC_BOOK3S_64
627 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
628         OFFSET(PACA_SVCPU, paca_struct, shadow_vcpu);
629 # define SVCPU_FIELD(x, f)      DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
630 #else
631 # define SVCPU_FIELD(x, f)
632 #endif
633 # define HSTATE_FIELD(x, f)     DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
634 #else   /* 32-bit */
635 # define SVCPU_FIELD(x, f)      DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
636 # define HSTATE_FIELD(x, f)     DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
637 #endif
638
639         SVCPU_FIELD(SVCPU_CR, cr);
640         SVCPU_FIELD(SVCPU_XER, xer);
641         SVCPU_FIELD(SVCPU_CTR, ctr);
642         SVCPU_FIELD(SVCPU_LR, lr);
643         SVCPU_FIELD(SVCPU_PC, pc);
644         SVCPU_FIELD(SVCPU_R0, gpr[0]);
645         SVCPU_FIELD(SVCPU_R1, gpr[1]);
646         SVCPU_FIELD(SVCPU_R2, gpr[2]);
647         SVCPU_FIELD(SVCPU_R3, gpr[3]);
648         SVCPU_FIELD(SVCPU_R4, gpr[4]);
649         SVCPU_FIELD(SVCPU_R5, gpr[5]);
650         SVCPU_FIELD(SVCPU_R6, gpr[6]);
651         SVCPU_FIELD(SVCPU_R7, gpr[7]);
652         SVCPU_FIELD(SVCPU_R8, gpr[8]);
653         SVCPU_FIELD(SVCPU_R9, gpr[9]);
654         SVCPU_FIELD(SVCPU_R10, gpr[10]);
655         SVCPU_FIELD(SVCPU_R11, gpr[11]);
656         SVCPU_FIELD(SVCPU_R12, gpr[12]);
657         SVCPU_FIELD(SVCPU_R13, gpr[13]);
658         SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
659         SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
660         SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
661         SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
662 #ifdef CONFIG_PPC_BOOK3S_32
663         SVCPU_FIELD(SVCPU_SR, sr);
664 #endif
665 #ifdef CONFIG_PPC64
666         SVCPU_FIELD(SVCPU_SLB, slb);
667         SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
668         SVCPU_FIELD(SVCPU_SHADOW_FSCR, shadow_fscr);
669 #endif
670
671         HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
672         HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
673         HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
674         HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
675         HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
676         HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
677         HSTATE_FIELD(HSTATE_SCRATCH2, scratch2);
678         HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
679         HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
680         HSTATE_FIELD(HSTATE_NAPPING, napping);
681
682 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
683         HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
684         HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
685         HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
686         HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
687         HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
688         HSTATE_FIELD(HSTATE_XIVE_TIMA_PHYS, xive_tima_phys);
689         HSTATE_FIELD(HSTATE_XIVE_TIMA_VIRT, xive_tima_virt);
690         HSTATE_FIELD(HSTATE_SAVED_XIRR, saved_xirr);
691         HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
692         HSTATE_FIELD(HSTATE_PTID, ptid);
693         HSTATE_FIELD(HSTATE_TID, tid);
694         HSTATE_FIELD(HSTATE_FAKE_SUSPEND, fake_suspend);
695         HSTATE_FIELD(HSTATE_MMCR0, host_mmcr[0]);
696         HSTATE_FIELD(HSTATE_MMCR1, host_mmcr[1]);
697         HSTATE_FIELD(HSTATE_MMCRA, host_mmcr[2]);
698         HSTATE_FIELD(HSTATE_SIAR, host_mmcr[3]);
699         HSTATE_FIELD(HSTATE_SDAR, host_mmcr[4]);
700         HSTATE_FIELD(HSTATE_MMCR2, host_mmcr[5]);
701         HSTATE_FIELD(HSTATE_SIER, host_mmcr[6]);
702         HSTATE_FIELD(HSTATE_MMCR3, host_mmcr[7]);
703         HSTATE_FIELD(HSTATE_SIER2, host_mmcr[8]);
704         HSTATE_FIELD(HSTATE_SIER3, host_mmcr[9]);
705         HSTATE_FIELD(HSTATE_PMC1, host_pmc[0]);
706         HSTATE_FIELD(HSTATE_PMC2, host_pmc[1]);
707         HSTATE_FIELD(HSTATE_PMC3, host_pmc[2]);
708         HSTATE_FIELD(HSTATE_PMC4, host_pmc[3]);
709         HSTATE_FIELD(HSTATE_PMC5, host_pmc[4]);
710         HSTATE_FIELD(HSTATE_PMC6, host_pmc[5]);
711         HSTATE_FIELD(HSTATE_PURR, host_purr);
712         HSTATE_FIELD(HSTATE_SPURR, host_spurr);
713         HSTATE_FIELD(HSTATE_DSCR, host_dscr);
714         HSTATE_FIELD(HSTATE_DABR, dabr);
715         HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
716         HSTATE_FIELD(HSTATE_SPLIT_MODE, kvm_split_mode);
717         DEFINE(IPI_PRIORITY, IPI_PRIORITY);
718         OFFSET(KVM_SPLIT_RPR, kvm_split_mode, rpr);
719         OFFSET(KVM_SPLIT_PMMAR, kvm_split_mode, pmmar);
720         OFFSET(KVM_SPLIT_LDBAR, kvm_split_mode, ldbar);
721         OFFSET(KVM_SPLIT_DO_NAP, kvm_split_mode, do_nap);
722         OFFSET(KVM_SPLIT_NAPPED, kvm_split_mode, napped);
723         OFFSET(KVM_SPLIT_DO_SET, kvm_split_mode, do_set);
724         OFFSET(KVM_SPLIT_DO_RESTORE, kvm_split_mode, do_restore);
725 #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
726
727 #ifdef CONFIG_PPC_BOOK3S_64
728         HSTATE_FIELD(HSTATE_CFAR, cfar);
729         HSTATE_FIELD(HSTATE_PPR, ppr);
730         HSTATE_FIELD(HSTATE_HOST_FSCR, host_fscr);
731 #endif /* CONFIG_PPC_BOOK3S_64 */
732
733 #else /* CONFIG_PPC_BOOK3S */
734         OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
735         OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
736         OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
737         OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
738         OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
739         OFFSET(VCPU_SPRG9, kvm_vcpu, arch.sprg9);
740         OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
741         OFFSET(VCPU_FAULT_DEAR, kvm_vcpu, arch.fault_dear);
742         OFFSET(VCPU_FAULT_ESR, kvm_vcpu, arch.fault_esr);
743         OFFSET(VCPU_CRIT_SAVE, kvm_vcpu, arch.crit_save);
744 #endif /* CONFIG_PPC_BOOK3S */
745 #endif /* CONFIG_KVM */
746
747 #ifdef CONFIG_KVM_GUEST
748         OFFSET(KVM_MAGIC_SCRATCH1, kvm_vcpu_arch_shared, scratch1);
749         OFFSET(KVM_MAGIC_SCRATCH2, kvm_vcpu_arch_shared, scratch2);
750         OFFSET(KVM_MAGIC_SCRATCH3, kvm_vcpu_arch_shared, scratch3);
751         OFFSET(KVM_MAGIC_INT, kvm_vcpu_arch_shared, int_pending);
752         OFFSET(KVM_MAGIC_MSR, kvm_vcpu_arch_shared, msr);
753         OFFSET(KVM_MAGIC_CRITICAL, kvm_vcpu_arch_shared, critical);
754         OFFSET(KVM_MAGIC_SR, kvm_vcpu_arch_shared, sr);
755 #endif
756
757 #ifdef CONFIG_44x
758         DEFINE(PGD_T_LOG2, PGD_T_LOG2);
759         DEFINE(PTE_T_LOG2, PTE_T_LOG2);
760 #endif
761 #ifdef CONFIG_PPC_FSL_BOOK3E
762         DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
763         OFFSET(TLBCAM_MAS0, tlbcam, MAS0);
764         OFFSET(TLBCAM_MAS1, tlbcam, MAS1);
765         OFFSET(TLBCAM_MAS2, tlbcam, MAS2);
766         OFFSET(TLBCAM_MAS3, tlbcam, MAS3);
767         OFFSET(TLBCAM_MAS7, tlbcam, MAS7);
768 #endif
769
770 #if defined(CONFIG_KVM) && defined(CONFIG_SPE)
771         OFFSET(VCPU_EVR, kvm_vcpu, arch.evr[0]);
772         OFFSET(VCPU_ACC, kvm_vcpu, arch.acc);
773         OFFSET(VCPU_SPEFSCR, kvm_vcpu, arch.spefscr);
774         OFFSET(VCPU_HOST_SPEFSCR, kvm_vcpu, arch.host_spefscr);
775 #endif
776
777 #ifdef CONFIG_KVM_BOOKE_HV
778         OFFSET(VCPU_HOST_MAS4, kvm_vcpu, arch.host_mas4);
779         OFFSET(VCPU_HOST_MAS6, kvm_vcpu, arch.host_mas6);
780 #endif
781
782 #ifdef CONFIG_KVM_XICS
783         DEFINE(VCPU_XIVE_SAVED_STATE, offsetof(struct kvm_vcpu,
784                                                arch.xive_saved_state));
785         DEFINE(VCPU_XIVE_CAM_WORD, offsetof(struct kvm_vcpu,
786                                             arch.xive_cam_word));
787         DEFINE(VCPU_XIVE_PUSHED, offsetof(struct kvm_vcpu, arch.xive_pushed));
788         DEFINE(VCPU_XIVE_ESC_ON, offsetof(struct kvm_vcpu, arch.xive_esc_on));
789         DEFINE(VCPU_XIVE_ESC_RADDR, offsetof(struct kvm_vcpu, arch.xive_esc_raddr));
790         DEFINE(VCPU_XIVE_ESC_VADDR, offsetof(struct kvm_vcpu, arch.xive_esc_vaddr));
791 #endif
792
793 #ifdef CONFIG_KVM_EXIT_TIMING
794         OFFSET(VCPU_TIMING_EXIT_TBU, kvm_vcpu, arch.timing_exit.tv32.tbu);
795         OFFSET(VCPU_TIMING_EXIT_TBL, kvm_vcpu, arch.timing_exit.tv32.tbl);
796         OFFSET(VCPU_TIMING_LAST_ENTER_TBU, kvm_vcpu, arch.timing_last_enter.tv32.tbu);
797         OFFSET(VCPU_TIMING_LAST_ENTER_TBL, kvm_vcpu, arch.timing_last_enter.tv32.tbl);
798 #endif
799
800         DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
801         DEFINE(PPC_DBELL_MSGTYPE, PPC_DBELL_MSGTYPE);
802
803 #ifdef CONFIG_PPC_8xx
804         DEFINE(VIRT_IMMR_BASE, (u64)__fix_to_virt(FIX_IMMR_BASE));
805 #endif
806
807 #ifdef CONFIG_XMON
808         DEFINE(BPT_SIZE, BPT_SIZE);
809 #endif
810
811         return 0;
812 }