arch/powerpc/kernel/asm-offsets.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * This program is used to generate definitions needed by
   4  * assembly language modules.
   5  *
   6  * We use the technique used in the OSF Mach kernel code:
   7  * generate asm statements containing #defines,
   8  * compile this file to assembler, and then extract the
   9  * #defines from the assembly-language output.
  10  */
  11
  12 #include <linux/compat.h>
  13 #include <linux/signal.h>
  14 #include <linux/sched.h>
  15 #include <linux/kernel.h>
  16 #include <linux/errno.h>
  17 #include <linux/string.h>
  18 #include <linux/types.h>
  19 #include <linux/mman.h>
  20 #include <linux/mm.h>
  21 #include <linux/suspend.h>
  22 #include <linux/hrtimer.h>
  23 #ifdef CONFIG_PPC64
  24 #include <linux/time.h>
  25 #include <linux/hardirq.h>
  26 #endif
  27 #include <linux/kbuild.h>
  28
  29 #include <asm/io.h>
  30 #include <asm/page.h>
  31 #include <asm/processor.h>
  32 #include <asm/cputable.h>
  33 #include <asm/thread_info.h>
  34 #include <asm/rtas.h>
  35 #include <asm/vdso_datapage.h>
  36 #include <asm/dbell.h>
  37 #ifdef CONFIG_PPC64
  38 #include <asm/paca.h>
  39 #include <asm/lppaca.h>
  40 #include <asm/cache.h>
  41 #include <asm/mmu.h>
  42 #include <asm/hvcall.h>
  43 #include <asm/xics.h>
  44 #endif
  45 #ifdef CONFIG_PPC_POWERNV
  46 #include <asm/opal.h>
  47 #endif
  48 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
  49 #include <linux/kvm_host.h>
  50 #endif
  51 #if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
  52 #include <asm/kvm_book3s.h>
  53 #include <asm/kvm_ppc.h>
  54 #endif
  55
  56 #ifdef CONFIG_PPC32
  57 #ifdef CONFIG_BOOKE_OR_40x
  58 #include "head_booke.h"
  59 #endif
  60 #endif
  61
  62 #if defined(CONFIG_PPC_E500)
  63 #include "../mm/mmu_decl.h"
  64 #endif
  65
  66 #ifdef CONFIG_PPC_8xx
  67 #include <asm/fixmap.h>
  68 #endif
  69
  70 #ifdef CONFIG_XMON
  71 #include "../xmon/xmon_bpts.h"
  72 #endif
  73
  74 #define STACK_PT_REGS_OFFSET(sym, val)  \
  75         DEFINE(sym, STACK_FRAME_OVERHEAD + offsetof(struct pt_regs, val))
  76
  77 int main(void)
  78 {
  79         OFFSET(THREAD, task_struct, thread);
  80         OFFSET(MM, task_struct, mm);
  81 #ifdef CONFIG_STACKPROTECTOR
  82         OFFSET(TASK_CANARY, task_struct, stack_canary);
  83 #ifdef CONFIG_PPC64
  84         OFFSET(PACA_CANARY, paca_struct, canary);
  85 #endif
  86 #endif
  87 #ifdef CONFIG_PPC32
  88 #ifdef CONFIG_PPC_RTAS
  89         OFFSET(RTAS_SP, thread_struct, rtas_sp);
  90 #endif
  91 #endif /* CONFIG_PPC64 */
  92         OFFSET(TASK_STACK, task_struct, stack);
  93 #ifdef CONFIG_SMP
  94         OFFSET(TASK_CPU, task_struct, thread_info.cpu);
  95 #endif
  96
  97 #ifdef CONFIG_LIVEPATCH_64
  98         OFFSET(TI_livepatch_sp, thread_info, livepatch_sp);
  99 #endif
 100
 101         OFFSET(KSP, thread_struct, ksp);
 102         OFFSET(PT_REGS, thread_struct, regs);
 103 #ifdef CONFIG_BOOKE
 104         OFFSET(THREAD_NORMSAVES, thread_struct, normsave[0]);
 105 #endif
 106 #ifdef CONFIG_PPC_FPU
 107         OFFSET(THREAD_FPEXC_MODE, thread_struct, fpexc_mode);
 108         OFFSET(THREAD_FPSTATE, thread_struct, fp_state.fpr);
 109         OFFSET(THREAD_FPSAVEAREA, thread_struct, fp_save_area);
 110 #endif
 111         OFFSET(FPSTATE_FPSCR, thread_fp_state, fpscr);
 112         OFFSET(THREAD_LOAD_FP, thread_struct, load_fp);
 113 #ifdef CONFIG_ALTIVEC
 114         OFFSET(THREAD_VRSTATE, thread_struct, vr_state.vr);
 115         OFFSET(THREAD_VRSAVEAREA, thread_struct, vr_save_area);
 116         OFFSET(THREAD_USED_VR, thread_struct, used_vr);
 117         OFFSET(VRSTATE_VSCR, thread_vr_state, vscr);
 118         OFFSET(THREAD_LOAD_VEC, thread_struct, load_vec);
 119 #endif /* CONFIG_ALTIVEC */
 120 #ifdef CONFIG_VSX
 121         OFFSET(THREAD_USED_VSR, thread_struct, used_vsr);
 122 #endif /* CONFIG_VSX */
 123 #ifdef CONFIG_PPC64
 124         OFFSET(KSP_VSID, thread_struct, ksp_vsid);
 125 #else /* CONFIG_PPC64 */
 126         OFFSET(PGDIR, thread_struct, pgdir);
 127         OFFSET(SRR0, thread_struct, srr0);
 128         OFFSET(SRR1, thread_struct, srr1);
 129         OFFSET(DAR, thread_struct, dar);
 130         OFFSET(DSISR, thread_struct, dsisr);
 131 #ifdef CONFIG_PPC_BOOK3S_32
 132         OFFSET(THR0, thread_struct, r0);
 133         OFFSET(THR3, thread_struct, r3);
 134         OFFSET(THR4, thread_struct, r4);
 135         OFFSET(THR5, thread_struct, r5);
 136         OFFSET(THR6, thread_struct, r6);
 137         OFFSET(THR8, thread_struct, r8);
 138         OFFSET(THR9, thread_struct, r9);
 139         OFFSET(THR11, thread_struct, r11);
 140         OFFSET(THLR, thread_struct, lr);
 141         OFFSET(THCTR, thread_struct, ctr);
 142         OFFSET(THSR0, thread_struct, sr0);
 143 #endif
 144 #ifdef CONFIG_SPE
 145         OFFSET(THREAD_EVR0, thread_struct, evr[0]);
 146         OFFSET(THREAD_ACC, thread_struct, acc);
 147         OFFSET(THREAD_USED_SPE, thread_struct, used_spe);
 148 #endif /* CONFIG_SPE */
 149 #endif /* CONFIG_PPC64 */
 150 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
 151         OFFSET(THREAD_KVM_SVCPU, thread_struct, kvm_shadow_vcpu);
 152 #endif
 153 #if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
 154         OFFSET(THREAD_KVM_VCPU, thread_struct, kvm_vcpu);
 155 #endif
 156
 157 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 158         OFFSET(PACATMSCRATCH, paca_struct, tm_scratch);
 159         OFFSET(THREAD_TM_TFHAR, thread_struct, tm_tfhar);
 160         OFFSET(THREAD_TM_TEXASR, thread_struct, tm_texasr);
 161         OFFSET(THREAD_TM_TFIAR, thread_struct, tm_tfiar);
 162         OFFSET(THREAD_TM_TAR, thread_struct, tm_tar);
 163         OFFSET(THREAD_TM_PPR, thread_struct, tm_ppr);
 164         OFFSET(THREAD_TM_DSCR, thread_struct, tm_dscr);
 165         OFFSET(THREAD_TM_AMR, thread_struct, tm_amr);
 166         OFFSET(PT_CKPT_REGS, thread_struct, ckpt_regs);
 167         OFFSET(THREAD_CKVRSTATE, thread_struct, ckvr_state.vr);
 168         OFFSET(THREAD_CKVRSAVE, thread_struct, ckvrsave);
 169         OFFSET(THREAD_CKFPSTATE, thread_struct, ckfp_state.fpr);
 170         /* Local pt_regs on stack for Transactional Memory funcs. */
 171         DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
 172                sizeof(struct pt_regs) + 16);
 173 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 174
 175         OFFSET(TI_LOCAL_FLAGS, thread_info, local_flags);
 176
 177 #ifdef CONFIG_PPC64
 178         OFFSET(DCACHEL1BLOCKSIZE, ppc64_caches, l1d.block_size);
 179         OFFSET(DCACHEL1LOGBLOCKSIZE, ppc64_caches, l1d.log_block_size);
 180         /* paca */
 181         OFFSET(PACAPACAINDEX, paca_struct, paca_index);
 182         OFFSET(PACAPROCSTART, paca_struct, cpu_start);
 183         OFFSET(PACAKSAVE, paca_struct, kstack);
 184         OFFSET(PACACURRENT, paca_struct, __current);
 185         DEFINE(PACA_THREAD_INFO, offsetof(struct paca_struct, __current) +
 186                                  offsetof(struct task_struct, thread_info));
 187         OFFSET(PACASAVEDMSR, paca_struct, saved_msr);
 188         OFFSET(PACAR1, paca_struct, saved_r1);
 189         OFFSET(PACATOC, paca_struct, kernel_toc);
 190         OFFSET(PACAKBASE, paca_struct, kernelbase);
 191         OFFSET(PACAKMSR, paca_struct, kernel_msr);
 192 #ifdef CONFIG_PPC_BOOK3S_64
 193         OFFSET(PACAHSRR_VALID, paca_struct, hsrr_valid);
 194         OFFSET(PACASRR_VALID, paca_struct, srr_valid);
 195 #endif
 196         OFFSET(PACAIRQSOFTMASK, paca_struct, irq_soft_mask);
 197         OFFSET(PACAIRQHAPPENED, paca_struct, irq_happened);
 198         OFFSET(PACA_FTRACE_ENABLED, paca_struct, ftrace_enabled);
 199
 200 #ifdef CONFIG_PPC_BOOK3E_64
 201         OFFSET(PACAPGD, paca_struct, pgd);
 202         OFFSET(PACA_KERNELPGD, paca_struct, kernel_pgd);
 203         OFFSET(PACA_EXGEN, paca_struct, exgen);
 204         OFFSET(PACA_EXTLB, paca_struct, extlb);
 205         OFFSET(PACA_EXMC, paca_struct, exmc);
 206         OFFSET(PACA_EXCRIT, paca_struct, excrit);
 207         OFFSET(PACA_EXDBG, paca_struct, exdbg);
 208         OFFSET(PACA_MC_STACK, paca_struct, mc_kstack);
 209         OFFSET(PACA_CRIT_STACK, paca_struct, crit_kstack);
 210         OFFSET(PACA_DBG_STACK, paca_struct, dbg_kstack);
 211         OFFSET(PACA_TCD_PTR, paca_struct, tcd_ptr);
 212
 213         OFFSET(TCD_ESEL_NEXT, tlb_core_data, esel_next);
 214         OFFSET(TCD_ESEL_MAX, tlb_core_data, esel_max);
 215         OFFSET(TCD_ESEL_FIRST, tlb_core_data, esel_first);
 216 #endif /* CONFIG_PPC_BOOK3E_64 */
 217
 218 #ifdef CONFIG_PPC_BOOK3S_64
 219         OFFSET(PACA_EXGEN, paca_struct, exgen);
 220         OFFSET(PACA_EXMC, paca_struct, exmc);
 221         OFFSET(PACA_EXNMI, paca_struct, exnmi);
 222 #ifdef CONFIG_PPC_64S_HASH_MMU
 223         OFFSET(PACA_SLBSHADOWPTR, paca_struct, slb_shadow_ptr);
 224         OFFSET(SLBSHADOW_STACKVSID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid);
 225         OFFSET(SLBSHADOW_STACKESID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid);
 226         OFFSET(SLBSHADOW_SAVEAREA, slb_shadow, save_area);
 227 #endif
 228         OFFSET(LPPACA_PMCINUSE, lppaca, pmcregs_in_use);
 229 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 230         OFFSET(PACA_PMCINUSE, paca_struct, pmcregs_in_use);
 231 #endif
 232         OFFSET(LPPACA_YIELDCOUNT, lppaca, yield_count);
 233 #endif /* CONFIG_PPC_BOOK3S_64 */
 234         OFFSET(PACAEMERGSP, paca_struct, emergency_sp);
 235 #ifdef CONFIG_PPC_BOOK3S_64
 236         OFFSET(PACAMCEMERGSP, paca_struct, mc_emergency_sp);
 237         OFFSET(PACA_NMI_EMERG_SP, paca_struct, nmi_emergency_sp);
 238         OFFSET(PACA_IN_MCE, paca_struct, in_mce);
 239         OFFSET(PACA_IN_NMI, paca_struct, in_nmi);
 240         OFFSET(PACA_RFI_FLUSH_FALLBACK_AREA, paca_struct, rfi_flush_fallback_area);
 241         OFFSET(PACA_EXRFI, paca_struct, exrfi);
 242         OFFSET(PACA_L1D_FLUSH_SIZE, paca_struct, l1d_flush_size);
 243
 244 #endif
 245         OFFSET(PACAHWCPUID, paca_struct, hw_cpu_id);
 246         OFFSET(PACAKEXECSTATE, paca_struct, kexec_state);
 247         OFFSET(PACA_DSCR_DEFAULT, paca_struct, dscr_default);
 248 #ifdef CONFIG_PPC64
 249         OFFSET(PACA_EXIT_SAVE_R1, paca_struct, exit_save_r1);
 250 #endif
 251 #ifdef CONFIG_PPC_BOOK3E_64
 252         OFFSET(PACA_TRAP_SAVE, paca_struct, trap_save);
 253 #endif
 254         OFFSET(PACA_SPRG_VDSO, paca_struct, sprg_vdso);
 255 #else /* CONFIG_PPC64 */
 256 #endif /* CONFIG_PPC64 */
 257
 258         /* RTAS */
 259         OFFSET(RTASBASE, rtas_t, base);
 260         OFFSET(RTASENTRY, rtas_t, entry);
 261
 262         /* Interrupt register frame */
 263         DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
 264         DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_WITH_PT_REGS);
 265         STACK_PT_REGS_OFFSET(GPR0, gpr[0]);
 266         STACK_PT_REGS_OFFSET(GPR1, gpr[1]);
 267         STACK_PT_REGS_OFFSET(GPR2, gpr[2]);
 268         STACK_PT_REGS_OFFSET(GPR3, gpr[3]);
 269         STACK_PT_REGS_OFFSET(GPR4, gpr[4]);
 270         STACK_PT_REGS_OFFSET(GPR5, gpr[5]);
 271         STACK_PT_REGS_OFFSET(GPR6, gpr[6]);
 272         STACK_PT_REGS_OFFSET(GPR7, gpr[7]);
 273         STACK_PT_REGS_OFFSET(GPR8, gpr[8]);
 274         STACK_PT_REGS_OFFSET(GPR9, gpr[9]);
 275         STACK_PT_REGS_OFFSET(GPR10, gpr[10]);
 276         STACK_PT_REGS_OFFSET(GPR11, gpr[11]);
 277         STACK_PT_REGS_OFFSET(GPR12, gpr[12]);
 278         STACK_PT_REGS_OFFSET(GPR13, gpr[13]);
 279         /*
 280          * Note: these symbols include _ because they overlap with special
 281          * register names
 282          */
 283         STACK_PT_REGS_OFFSET(_NIP, nip);
 284         STACK_PT_REGS_OFFSET(_MSR, msr);
 285         STACK_PT_REGS_OFFSET(_CTR, ctr);
 286         STACK_PT_REGS_OFFSET(_LINK, link);
 287         STACK_PT_REGS_OFFSET(_CCR, ccr);
 288         STACK_PT_REGS_OFFSET(_XER, xer);
 289         STACK_PT_REGS_OFFSET(_DAR, dar);
 290         STACK_PT_REGS_OFFSET(_DEAR, dear);
 291         STACK_PT_REGS_OFFSET(_DSISR, dsisr);
 292         STACK_PT_REGS_OFFSET(_ESR, esr);
 293         STACK_PT_REGS_OFFSET(ORIG_GPR3, orig_gpr3);
 294         STACK_PT_REGS_OFFSET(RESULT, result);
 295         STACK_PT_REGS_OFFSET(_TRAP, trap);
 296 #ifdef CONFIG_PPC64
 297         STACK_PT_REGS_OFFSET(SOFTE, softe);
 298         STACK_PT_REGS_OFFSET(_PPR, ppr);
 299 #endif
 300
 301 #ifdef CONFIG_PPC_PKEY
 302         STACK_PT_REGS_OFFSET(STACK_REGS_AMR, amr);
 303         STACK_PT_REGS_OFFSET(STACK_REGS_IAMR, iamr);
 304 #endif
 305
 306 #if defined(CONFIG_PPC32) && defined(CONFIG_BOOKE)
 307         STACK_PT_REGS_OFFSET(MAS0, mas0);
 308         /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
 309         STACK_PT_REGS_OFFSET(MMUCR, mas0);
 310         STACK_PT_REGS_OFFSET(MAS1, mas1);
 311         STACK_PT_REGS_OFFSET(MAS2, mas2);
 312         STACK_PT_REGS_OFFSET(MAS3, mas3);
 313         STACK_PT_REGS_OFFSET(MAS6, mas6);
 314         STACK_PT_REGS_OFFSET(MAS7, mas7);
 315         STACK_PT_REGS_OFFSET(_SRR0, srr0);
 316         STACK_PT_REGS_OFFSET(_SRR1, srr1);
 317         STACK_PT_REGS_OFFSET(_CSRR0, csrr0);
 318         STACK_PT_REGS_OFFSET(_CSRR1, csrr1);
 319         STACK_PT_REGS_OFFSET(_DSRR0, dsrr0);
 320         STACK_PT_REGS_OFFSET(_DSRR1, dsrr1);
 321 #endif
 322
 323         /* About the CPU features table */
 324         OFFSET(CPU_SPEC_FEATURES, cpu_spec, cpu_features);
 325         OFFSET(CPU_SPEC_SETUP, cpu_spec, cpu_setup);
 326         OFFSET(CPU_SPEC_RESTORE, cpu_spec, cpu_restore);
 327
 328         OFFSET(pbe_address, pbe, address);
 329         OFFSET(pbe_orig_address, pbe, orig_address);
 330         OFFSET(pbe_next, pbe, next);
 331
 332 #ifndef CONFIG_PPC64
 333         DEFINE(TASK_SIZE, TASK_SIZE);
 334         DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
 335 #endif /* ! CONFIG_PPC64 */
 336
 337         /* datapage offsets for use by vdso */
 338         OFFSET(VDSO_DATA_OFFSET, vdso_arch_data, data);
 339         OFFSET(CFG_TB_TICKS_PER_SEC, vdso_arch_data, tb_ticks_per_sec);
 340 #ifdef CONFIG_PPC64
 341         OFFSET(CFG_ICACHE_BLOCKSZ, vdso_arch_data, icache_block_size);
 342         OFFSET(CFG_DCACHE_BLOCKSZ, vdso_arch_data, dcache_block_size);
 343         OFFSET(CFG_ICACHE_LOGBLOCKSZ, vdso_arch_data, icache_log_block_size);
 344         OFFSET(CFG_DCACHE_LOGBLOCKSZ, vdso_arch_data, dcache_log_block_size);
 345         OFFSET(CFG_SYSCALL_MAP64, vdso_arch_data, syscall_map);
 346         OFFSET(CFG_SYSCALL_MAP32, vdso_arch_data, compat_syscall_map);
 347 #else
 348         OFFSET(CFG_SYSCALL_MAP32, vdso_arch_data, syscall_map);
 349 #endif
 350
 351 #ifdef CONFIG_BUG
 352         DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
 353 #endif
 354
 355 #ifdef CONFIG_KVM
 356         OFFSET(VCPU_HOST_STACK, kvm_vcpu, arch.host_stack);
 357         OFFSET(VCPU_HOST_PID, kvm_vcpu, arch.host_pid);
 358         OFFSET(VCPU_GUEST_PID, kvm_vcpu, arch.pid);
 359         OFFSET(VCPU_GPRS, kvm_vcpu, arch.regs.gpr);
 360         OFFSET(VCPU_VRSAVE, kvm_vcpu, arch.vrsave);
 361         OFFSET(VCPU_FPRS, kvm_vcpu, arch.fp.fpr);
 362 #ifdef CONFIG_ALTIVEC
 363         OFFSET(VCPU_VRS, kvm_vcpu, arch.vr.vr);
 364 #endif
 365         OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
 366         OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
 367         OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
 368 #ifdef CONFIG_PPC_BOOK3S
 369         OFFSET(VCPU_TAR, kvm_vcpu, arch.tar);
 370 #endif
 371         OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
 372         OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
 373 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 374         OFFSET(VCPU_MSR, kvm_vcpu, arch.shregs.msr);
 375         OFFSET(VCPU_SRR0, kvm_vcpu, arch.shregs.srr0);
 376         OFFSET(VCPU_SRR1, kvm_vcpu, arch.shregs.srr1);
 377         OFFSET(VCPU_SPRG0, kvm_vcpu, arch.shregs.sprg0);
 378         OFFSET(VCPU_SPRG1, kvm_vcpu, arch.shregs.sprg1);
 379         OFFSET(VCPU_SPRG2, kvm_vcpu, arch.shregs.sprg2);
 380         OFFSET(VCPU_SPRG3, kvm_vcpu, arch.shregs.sprg3);
 381 #endif
 382 #ifdef CONFIG_KVM_BOOK3S_HV_P8_TIMING
 383         OFFSET(VCPU_TB_RMENTRY, kvm_vcpu, arch.rm_entry);
 384         OFFSET(VCPU_TB_RMINTR, kvm_vcpu, arch.rm_intr);
 385         OFFSET(VCPU_TB_RMEXIT, kvm_vcpu, arch.rm_exit);
 386         OFFSET(VCPU_TB_GUEST, kvm_vcpu, arch.guest_time);
 387         OFFSET(VCPU_TB_CEDE, kvm_vcpu, arch.cede_time);
 388         OFFSET(VCPU_CUR_ACTIVITY, kvm_vcpu, arch.cur_activity);
 389         OFFSET(VCPU_ACTIVITY_START, kvm_vcpu, arch.cur_tb_start);
 390         OFFSET(TAS_SEQCOUNT, kvmhv_tb_accumulator, seqcount);
 391         OFFSET(TAS_TOTAL, kvmhv_tb_accumulator, tb_total);
 392         OFFSET(TAS_MIN, kvmhv_tb_accumulator, tb_min);
 393         OFFSET(TAS_MAX, kvmhv_tb_accumulator, tb_max);
 394 #endif
 395         OFFSET(VCPU_SHARED_SPRG3, kvm_vcpu_arch_shared, sprg3);
 396         OFFSET(VCPU_SHARED_SPRG4, kvm_vcpu_arch_shared, sprg4);
 397         OFFSET(VCPU_SHARED_SPRG5, kvm_vcpu_arch_shared, sprg5);
 398         OFFSET(VCPU_SHARED_SPRG6, kvm_vcpu_arch_shared, sprg6);
 399         OFFSET(VCPU_SHARED_SPRG7, kvm_vcpu_arch_shared, sprg7);
 400         OFFSET(VCPU_SHADOW_PID, kvm_vcpu, arch.shadow_pid);
 401         OFFSET(VCPU_SHADOW_PID1, kvm_vcpu, arch.shadow_pid1);
 402         OFFSET(VCPU_SHARED, kvm_vcpu, arch.shared);
 403         OFFSET(VCPU_SHARED_MSR, kvm_vcpu_arch_shared, msr);
 404         OFFSET(VCPU_SHADOW_MSR, kvm_vcpu, arch.shadow_msr);
 405 #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
 406         OFFSET(VCPU_SHAREDBE, kvm_vcpu, arch.shared_big_endian);
 407 #endif
 408
 409         OFFSET(VCPU_SHARED_MAS0, kvm_vcpu_arch_shared, mas0);
 410         OFFSET(VCPU_SHARED_MAS1, kvm_vcpu_arch_shared, mas1);
 411         OFFSET(VCPU_SHARED_MAS2, kvm_vcpu_arch_shared, mas2);
 412         OFFSET(VCPU_SHARED_MAS7_3, kvm_vcpu_arch_shared, mas7_3);
 413         OFFSET(VCPU_SHARED_MAS4, kvm_vcpu_arch_shared, mas4);
 414         OFFSET(VCPU_SHARED_MAS6, kvm_vcpu_arch_shared, mas6);
 415
 416         OFFSET(VCPU_KVM, kvm_vcpu, kvm);
 417         OFFSET(KVM_LPID, kvm, arch.lpid);
 418
 419         /* book3s */
 420 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 421         OFFSET(KVM_TLB_SETS, kvm, arch.tlb_sets);
 422         OFFSET(KVM_SDR1, kvm, arch.sdr1);
 423         OFFSET(KVM_HOST_LPID, kvm, arch.host_lpid);
 424         OFFSET(KVM_HOST_LPCR, kvm, arch.host_lpcr);
 425         OFFSET(KVM_HOST_SDR1, kvm, arch.host_sdr1);
 426         OFFSET(KVM_ENABLED_HCALLS, kvm, arch.enabled_hcalls);
 427         OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v);
 428         OFFSET(KVM_RADIX, kvm, arch.radix);
 429         OFFSET(KVM_SECURE_GUEST, kvm, arch.secure_guest);
 430         OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr);
 431         OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);
 432         OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr);
 433         OFFSET(VCPU_VPA_DIRTY, kvm_vcpu, arch.vpa.dirty);
 434         OFFSET(VCPU_HEIR, kvm_vcpu, arch.emul_inst);
 435         OFFSET(VCPU_NESTED, kvm_vcpu, arch.nested);
 436         OFFSET(VCPU_CPU, kvm_vcpu, cpu);
 437         OFFSET(VCPU_THREAD_CPU, kvm_vcpu, arch.thread_cpu);
 438 #endif
 439 #ifdef CONFIG_PPC_BOOK3S
 440         OFFSET(VCPU_PURR, kvm_vcpu, arch.purr);
 441         OFFSET(VCPU_SPURR, kvm_vcpu, arch.spurr);
 442         OFFSET(VCPU_IC, kvm_vcpu, arch.ic);
 443         OFFSET(VCPU_DSCR, kvm_vcpu, arch.dscr);
 444         OFFSET(VCPU_AMR, kvm_vcpu, arch.amr);
 445         OFFSET(VCPU_UAMOR, kvm_vcpu, arch.uamor);
 446         OFFSET(VCPU_IAMR, kvm_vcpu, arch.iamr);
 447         OFFSET(VCPU_CTRL, kvm_vcpu, arch.ctrl);
 448         OFFSET(VCPU_DABR, kvm_vcpu, arch.dabr);
 449         OFFSET(VCPU_DABRX, kvm_vcpu, arch.dabrx);
 450         OFFSET(VCPU_DAWR0, kvm_vcpu, arch.dawr0);
 451         OFFSET(VCPU_DAWRX0, kvm_vcpu, arch.dawrx0);
 452         OFFSET(VCPU_DAWR1, kvm_vcpu, arch.dawr1);
 453         OFFSET(VCPU_DAWRX1, kvm_vcpu, arch.dawrx1);
 454         OFFSET(VCPU_CIABR, kvm_vcpu, arch.ciabr);
 455         OFFSET(VCPU_HFLAGS, kvm_vcpu, arch.hflags);
 456         OFFSET(VCPU_DEC_EXPIRES, kvm_vcpu, arch.dec_expires);
 457         OFFSET(VCPU_PENDING_EXC, kvm_vcpu, arch.pending_exceptions);
 458         OFFSET(VCPU_CEDED, kvm_vcpu, arch.ceded);
 459         OFFSET(VCPU_PRODDED, kvm_vcpu, arch.prodded);
 460         OFFSET(VCPU_IRQ_PENDING, kvm_vcpu, arch.irq_pending);
 461         OFFSET(VCPU_DBELL_REQ, kvm_vcpu, arch.doorbell_request);
 462         OFFSET(VCPU_MMCR, kvm_vcpu, arch.mmcr);
 463         OFFSET(VCPU_MMCRA, kvm_vcpu, arch.mmcra);
 464         OFFSET(VCPU_MMCRS, kvm_vcpu, arch.mmcrs);
 465         OFFSET(VCPU_PMC, kvm_vcpu, arch.pmc);
 466         OFFSET(VCPU_SIAR, kvm_vcpu, arch.siar);
 467         OFFSET(VCPU_SDAR, kvm_vcpu, arch.sdar);
 468         OFFSET(VCPU_SIER, kvm_vcpu, arch.sier);
 469         OFFSET(VCPU_SLB, kvm_vcpu, arch.slb);
 470         OFFSET(VCPU_SLB_MAX, kvm_vcpu, arch.slb_max);
 471         OFFSET(VCPU_SLB_NR, kvm_vcpu, arch.slb_nr);
 472         OFFSET(VCPU_FAULT_DSISR, kvm_vcpu, arch.fault_dsisr);
 473         OFFSET(VCPU_FAULT_DAR, kvm_vcpu, arch.fault_dar);
 474         OFFSET(VCPU_INTR_MSR, kvm_vcpu, arch.intr_msr);
 475         OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
 476         OFFSET(VCPU_TRAP, kvm_vcpu, arch.trap);
 477         OFFSET(VCPU_CFAR, kvm_vcpu, arch.cfar);
 478         OFFSET(VCPU_PPR, kvm_vcpu, arch.ppr);
 479         OFFSET(VCPU_FSCR, kvm_vcpu, arch.fscr);
 480         OFFSET(VCPU_PSPB, kvm_vcpu, arch.pspb);
 481         OFFSET(VCPU_EBBHR, kvm_vcpu, arch.ebbhr);
 482         OFFSET(VCPU_EBBRR, kvm_vcpu, arch.ebbrr);
 483         OFFSET(VCPU_BESCR, kvm_vcpu, arch.bescr);
 484         OFFSET(VCPU_CSIGR, kvm_vcpu, arch.csigr);
 485         OFFSET(VCPU_TACR, kvm_vcpu, arch.tacr);
 486         OFFSET(VCPU_TCSCR, kvm_vcpu, arch.tcscr);
 487         OFFSET(VCPU_ACOP, kvm_vcpu, arch.acop);
 488         OFFSET(VCPU_WORT, kvm_vcpu, arch.wort);
 489         OFFSET(VCPU_TID, kvm_vcpu, arch.tid);
 490         OFFSET(VCPU_PSSCR, kvm_vcpu, arch.psscr);
 491         OFFSET(VCPU_HFSCR, kvm_vcpu, arch.hfscr);
 492         OFFSET(VCORE_ENTRY_EXIT, kvmppc_vcore, entry_exit_map);
 493         OFFSET(VCORE_IN_GUEST, kvmppc_vcore, in_guest);
 494         OFFSET(VCORE_NAPPING_THREADS, kvmppc_vcore, napping_threads);
 495         OFFSET(VCORE_KVM, kvmppc_vcore, kvm);
 496         OFFSET(VCORE_TB_OFFSET, kvmppc_vcore, tb_offset);
 497         OFFSET(VCORE_TB_OFFSET_APPL, kvmppc_vcore, tb_offset_applied);
 498         OFFSET(VCORE_LPCR, kvmppc_vcore, lpcr);
 499         OFFSET(VCORE_PCR, kvmppc_vcore, pcr);
 500         OFFSET(VCORE_DPDES, kvmppc_vcore, dpdes);
 501         OFFSET(VCORE_VTB, kvmppc_vcore, vtb);
 502         OFFSET(VCPU_SLB_E, kvmppc_slb, orige);
 503         OFFSET(VCPU_SLB_V, kvmppc_slb, origv);
 504         DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
 505 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 506         OFFSET(VCPU_TFHAR, kvm_vcpu, arch.tfhar);
 507         OFFSET(VCPU_TFIAR, kvm_vcpu, arch.tfiar);
 508         OFFSET(VCPU_TEXASR, kvm_vcpu, arch.texasr);
 509         OFFSET(VCPU_ORIG_TEXASR, kvm_vcpu, arch.orig_texasr);
 510         OFFSET(VCPU_GPR_TM, kvm_vcpu, arch.gpr_tm);
 511         OFFSET(VCPU_FPRS_TM, kvm_vcpu, arch.fp_tm.fpr);
 512         OFFSET(VCPU_VRS_TM, kvm_vcpu, arch.vr_tm.vr);
 513         OFFSET(VCPU_VRSAVE_TM, kvm_vcpu, arch.vrsave_tm);
 514         OFFSET(VCPU_CR_TM, kvm_vcpu, arch.cr_tm);
 515         OFFSET(VCPU_XER_TM, kvm_vcpu, arch.xer_tm);
 516         OFFSET(VCPU_LR_TM, kvm_vcpu, arch.lr_tm);
 517         OFFSET(VCPU_CTR_TM, kvm_vcpu, arch.ctr_tm);
 518         OFFSET(VCPU_AMR_TM, kvm_vcpu, arch.amr_tm);
 519         OFFSET(VCPU_PPR_TM, kvm_vcpu, arch.ppr_tm);
 520         OFFSET(VCPU_DSCR_TM, kvm_vcpu, arch.dscr_tm);
 521         OFFSET(VCPU_TAR_TM, kvm_vcpu, arch.tar_tm);
 522 #endif
 523
 524 #ifdef CONFIG_PPC_BOOK3S_64
 525 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
 526         OFFSET(PACA_SVCPU, paca_struct, shadow_vcpu);
 527 # define SVCPU_FIELD(x, f)      DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
 528 #else
 529 # define SVCPU_FIELD(x, f)
 530 #endif
 531 # define HSTATE_FIELD(x, f)     DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
 532 #else   /* 32-bit */
 533 # define SVCPU_FIELD(x, f)      DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
 534 # define HSTATE_FIELD(x, f)     DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
 535 #endif
 536
 537         SVCPU_FIELD(SVCPU_CR, cr);
 538         SVCPU_FIELD(SVCPU_XER, xer);
 539         SVCPU_FIELD(SVCPU_CTR, ctr);
 540         SVCPU_FIELD(SVCPU_LR, lr);
 541         SVCPU_FIELD(SVCPU_PC, pc);
 542         SVCPU_FIELD(SVCPU_R0, gpr[0]);
 543         SVCPU_FIELD(SVCPU_R1, gpr[1]);
 544         SVCPU_FIELD(SVCPU_R2, gpr[2]);
 545         SVCPU_FIELD(SVCPU_R3, gpr[3]);
 546         SVCPU_FIELD(SVCPU_R4, gpr[4]);
 547         SVCPU_FIELD(SVCPU_R5, gpr[5]);
 548         SVCPU_FIELD(SVCPU_R6, gpr[6]);
 549         SVCPU_FIELD(SVCPU_R7, gpr[7]);
 550         SVCPU_FIELD(SVCPU_R8, gpr[8]);
 551         SVCPU_FIELD(SVCPU_R9, gpr[9]);
 552         SVCPU_FIELD(SVCPU_R10, gpr[10]);
 553         SVCPU_FIELD(SVCPU_R11, gpr[11]);
 554         SVCPU_FIELD(SVCPU_R12, gpr[12]);
 555         SVCPU_FIELD(SVCPU_R13, gpr[13]);
 556         SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
 557         SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
 558         SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
 559         SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
 560 #ifdef CONFIG_PPC_BOOK3S_32
 561         SVCPU_FIELD(SVCPU_SR, sr);
 562 #endif
 563 #ifdef CONFIG_PPC64
 564         SVCPU_FIELD(SVCPU_SLB, slb);
 565         SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
 566         SVCPU_FIELD(SVCPU_SHADOW_FSCR, shadow_fscr);
 567 #endif
 568
 569         HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
 570         HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
 571         HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
 572         HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
 573         HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
 574         HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
 575         HSTATE_FIELD(HSTATE_SCRATCH2, scratch2);
 576         HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
 577         HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
 578         HSTATE_FIELD(HSTATE_NAPPING, napping);
 579
 580 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 581         HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
 582         HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
 583         HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
 584         HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
 585         HSTATE_FIELD(HSTATE_XIVE_TIMA_PHYS, xive_tima_phys);
 586         HSTATE_FIELD(HSTATE_XIVE_TIMA_VIRT, xive_tima_virt);
 587         HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
 588         HSTATE_FIELD(HSTATE_PTID, ptid);
 589         HSTATE_FIELD(HSTATE_FAKE_SUSPEND, fake_suspend);
 590         HSTATE_FIELD(HSTATE_MMCR0, host_mmcr[0]);
 591         HSTATE_FIELD(HSTATE_MMCR1, host_mmcr[1]);
 592         HSTATE_FIELD(HSTATE_MMCRA, host_mmcr[2]);
 593         HSTATE_FIELD(HSTATE_SIAR, host_mmcr[3]);
 594         HSTATE_FIELD(HSTATE_SDAR, host_mmcr[4]);
 595         HSTATE_FIELD(HSTATE_MMCR2, host_mmcr[5]);
 596         HSTATE_FIELD(HSTATE_SIER, host_mmcr[6]);
 597         HSTATE_FIELD(HSTATE_MMCR3, host_mmcr[7]);
 598         HSTATE_FIELD(HSTATE_SIER2, host_mmcr[8]);
 599         HSTATE_FIELD(HSTATE_SIER3, host_mmcr[9]);
 600         HSTATE_FIELD(HSTATE_PMC1, host_pmc[0]);
 601         HSTATE_FIELD(HSTATE_PMC2, host_pmc[1]);
 602         HSTATE_FIELD(HSTATE_PMC3, host_pmc[2]);
 603         HSTATE_FIELD(HSTATE_PMC4, host_pmc[3]);
 604         HSTATE_FIELD(HSTATE_PMC5, host_pmc[4]);
 605         HSTATE_FIELD(HSTATE_PMC6, host_pmc[5]);
 606         HSTATE_FIELD(HSTATE_PURR, host_purr);
 607         HSTATE_FIELD(HSTATE_SPURR, host_spurr);
 608         HSTATE_FIELD(HSTATE_DSCR, host_dscr);
 609         HSTATE_FIELD(HSTATE_DABR, dabr);
 610         HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
 611         HSTATE_FIELD(HSTATE_SPLIT_MODE, kvm_split_mode);
 612         DEFINE(IPI_PRIORITY, IPI_PRIORITY);
 613         OFFSET(KVM_SPLIT_RPR, kvm_split_mode, rpr);
 614         OFFSET(KVM_SPLIT_PMMAR, kvm_split_mode, pmmar);
 615         OFFSET(KVM_SPLIT_LDBAR, kvm_split_mode, ldbar);
 616         OFFSET(KVM_SPLIT_DO_NAP, kvm_split_mode, do_nap);
 617         OFFSET(KVM_SPLIT_NAPPED, kvm_split_mode, napped);
 618 #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
 619
 620 #ifdef CONFIG_PPC_BOOK3S_64
 621         HSTATE_FIELD(HSTATE_CFAR, cfar);
 622         HSTATE_FIELD(HSTATE_PPR, ppr);
 623         HSTATE_FIELD(HSTATE_HOST_FSCR, host_fscr);
 624 #endif /* CONFIG_PPC_BOOK3S_64 */
 625
 626 #else /* CONFIG_PPC_BOOK3S */
 627         OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
 628         OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
 629         OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
 630         OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
 631         OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
 632         OFFSET(VCPU_SPRG9, kvm_vcpu, arch.sprg9);
 633         OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
 634         OFFSET(VCPU_FAULT_DEAR, kvm_vcpu, arch.fault_dear);
 635         OFFSET(VCPU_FAULT_ESR, kvm_vcpu, arch.fault_esr);
 636         OFFSET(VCPU_CRIT_SAVE, kvm_vcpu, arch.crit_save);
 637 #endif /* CONFIG_PPC_BOOK3S */
 638 #endif /* CONFIG_KVM */
 639
 640 #ifdef CONFIG_KVM_GUEST
 641         OFFSET(KVM_MAGIC_SCRATCH1, kvm_vcpu_arch_shared, scratch1);
 642         OFFSET(KVM_MAGIC_SCRATCH2, kvm_vcpu_arch_shared, scratch2);
 643         OFFSET(KVM_MAGIC_SCRATCH3, kvm_vcpu_arch_shared, scratch3);
 644         OFFSET(KVM_MAGIC_INT, kvm_vcpu_arch_shared, int_pending);
 645         OFFSET(KVM_MAGIC_MSR, kvm_vcpu_arch_shared, msr);
 646         OFFSET(KVM_MAGIC_CRITICAL, kvm_vcpu_arch_shared, critical);
 647         OFFSET(KVM_MAGIC_SR, kvm_vcpu_arch_shared, sr);
 648 #endif
 649
 650 #ifdef CONFIG_44x
 651         DEFINE(PGD_T_LOG2, PGD_T_LOG2);
 652         DEFINE(PTE_T_LOG2, PTE_T_LOG2);
 653 #endif
 654 #ifdef CONFIG_PPC_E500
 655         DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
 656         OFFSET(TLBCAM_MAS0, tlbcam, MAS0);
 657         OFFSET(TLBCAM_MAS1, tlbcam, MAS1);
 658         OFFSET(TLBCAM_MAS2, tlbcam, MAS2);
 659         OFFSET(TLBCAM_MAS3, tlbcam, MAS3);
 660         OFFSET(TLBCAM_MAS7, tlbcam, MAS7);
 661 #endif
 662
 663 #if defined(CONFIG_KVM) && defined(CONFIG_SPE)
 664         OFFSET(VCPU_EVR, kvm_vcpu, arch.evr[0]);
 665         OFFSET(VCPU_ACC, kvm_vcpu, arch.acc);
 666         OFFSET(VCPU_SPEFSCR, kvm_vcpu, arch.spefscr);
 667         OFFSET(VCPU_HOST_SPEFSCR, kvm_vcpu, arch.host_spefscr);
 668 #endif
 669
 670 #ifdef CONFIG_KVM_BOOKE_HV
 671         OFFSET(VCPU_HOST_MAS4, kvm_vcpu, arch.host_mas4);
 672         OFFSET(VCPU_HOST_MAS6, kvm_vcpu, arch.host_mas6);
 673 #endif
 674
 675 #ifdef CONFIG_KVM_XICS
 676         DEFINE(VCPU_XIVE_SAVED_STATE, offsetof(struct kvm_vcpu,
 677                                                arch.xive_saved_state));
 678         DEFINE(VCPU_XIVE_CAM_WORD, offsetof(struct kvm_vcpu,
 679                                             arch.xive_cam_word));
 680         DEFINE(VCPU_XIVE_PUSHED, offsetof(struct kvm_vcpu, arch.xive_pushed));
 681         DEFINE(VCPU_XIVE_ESC_ON, offsetof(struct kvm_vcpu, arch.xive_esc_on));
 682         DEFINE(VCPU_XIVE_ESC_RADDR, offsetof(struct kvm_vcpu, arch.xive_esc_raddr));
 683         DEFINE(VCPU_XIVE_ESC_VADDR, offsetof(struct kvm_vcpu, arch.xive_esc_vaddr));
 684 #endif
 685
 686 #ifdef CONFIG_KVM_EXIT_TIMING
 687         OFFSET(VCPU_TIMING_EXIT_TBU, kvm_vcpu, arch.timing_exit.tv32.tbu);
 688         OFFSET(VCPU_TIMING_EXIT_TBL, kvm_vcpu, arch.timing_exit.tv32.tbl);
 689         OFFSET(VCPU_TIMING_LAST_ENTER_TBU, kvm_vcpu, arch.timing_last_enter.tv32.tbu);
 690         OFFSET(VCPU_TIMING_LAST_ENTER_TBL, kvm_vcpu, arch.timing_last_enter.tv32.tbl);
 691 #endif
 692
 693         DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
 694
 695 #ifdef CONFIG_PPC_8xx
 696         DEFINE(VIRT_IMMR_BASE, (u64)__fix_to_virt(FIX_IMMR_BASE));
 697 #endif
 698
 699 #ifdef CONFIG_XMON
 700         DEFINE(BPT_SIZE, BPT_SIZE);
 701 #endif
 702
 703         return 0;
 704 }