1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 #ifndef _ASM_POWERPC_SIMPLE_SPINLOCK_H
3 #define _ASM_POWERPC_SIMPLE_SPINLOCK_H
6 * Simple spin lock operations.
8 * Copyright (C) 2001-2004 Paul Mackerras <paulus@au.ibm.com>, IBM
9 * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM
10 * Copyright (C) 2002 Dave Engebretsen <engebret@us.ibm.com>, IBM
11 * Rework to support virtual processors
13 * Type of int is used as a full 64b word is not necessary.
15 * (the type definitions are in asm/simple_spinlock_types.h)
17 #include <linux/irqflags.h>
18 #include <asm/paravirt.h>
20 #include <asm/synch.h>
21 #include <asm/ppc-opcode.h>
24 /* use 0x800000yy when locked, where yy == CPU number */
26 #define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token))
28 #define LOCK_TOKEN (*(u32 *)(&get_paca()->paca_index))
34 static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock)
36 return lock.slock == 0;
39 static inline int arch_spin_is_locked(arch_spinlock_t *lock)
41 return !arch_spin_value_unlocked(READ_ONCE(*lock));
45 * This returns the old value in the lock, so we succeeded
46 * in getting the lock if the return value is 0.
48 static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock)
50 unsigned long tmp, token;
51 unsigned int eh = IS_ENABLED(CONFIG_PPC64);
55 "1: lwarx %0,0,%2,%[eh]\n\
63 : "r" (token), "r" (&lock->slock), [eh] "n" (eh)
69 static inline int arch_spin_trylock(arch_spinlock_t *lock)
71 return __arch_spin_trylock(lock) == 0;
75 * On a system with shared processors (that is, where a physical
76 * processor is multiplexed between several virtual processors),
77 * there is no point spinning on a lock if the holder of the lock
78 * isn't currently scheduled on a physical processor. Instead
79 * we detect this situation and ask the hypervisor to give the
80 * rest of our timeslice to the lock holder.
82 * So that we can tell which virtual processor is holding a lock,
83 * we put 0x80000000 | smp_processor_id() in the lock when it is
84 * held. Conveniently, we have a word in the paca that holds this
88 #if defined(CONFIG_PPC_SPLPAR)
89 /* We only yield to the hypervisor if we are in shared processor mode */
90 void splpar_spin_yield(arch_spinlock_t *lock);
91 void splpar_rw_yield(arch_rwlock_t *lock);
93 static inline void splpar_spin_yield(arch_spinlock_t *lock) {}
94 static inline void splpar_rw_yield(arch_rwlock_t *lock) {}
97 static inline void spin_yield(arch_spinlock_t *lock)
99 if (is_shared_processor())
100 splpar_spin_yield(lock);
105 static inline void rw_yield(arch_rwlock_t *lock)
107 if (is_shared_processor())
108 splpar_rw_yield(lock);
113 static inline void arch_spin_lock(arch_spinlock_t *lock)
116 if (likely(__arch_spin_trylock(lock) == 0))
120 if (is_shared_processor())
121 splpar_spin_yield(lock);
122 } while (unlikely(lock->slock != 0));
127 static inline void arch_spin_unlock(arch_spinlock_t *lock)
129 __asm__ __volatile__("# arch_spin_unlock\n\t"
130 PPC_RELEASE_BARRIER: : :"memory");
135 * Read-write spinlocks, allowing multiple readers
136 * but only one writer.
138 * NOTE! it is quite common to have readers in interrupts
139 * but no interrupt writers. For those circumstances we
140 * can "mix" irq-safe locks - any writer needs to get a
141 * irq-safe write-lock, but readers can get non-irqsafe
146 #define __DO_SIGN_EXTEND "extsw %0,%0\n"
147 #define WRLOCK_TOKEN LOCK_TOKEN /* it's negative */
149 #define __DO_SIGN_EXTEND
150 #define WRLOCK_TOKEN (-1)
154 * This returns the old value in the lock + 1,
155 * so we got a read lock if the return value is > 0.
157 static inline long __arch_read_trylock(arch_rwlock_t *rw)
160 unsigned int eh = IS_ENABLED(CONFIG_PPC64);
162 __asm__ __volatile__(
163 "1: lwarx %0,0,%1,%[eh]\n"
171 : "r" (&rw->lock), [eh] "n" (eh)
172 : "cr0", "xer", "memory");
178 * This returns the old value in the lock,
179 * so we got the write lock if the return value is 0.
181 static inline long __arch_write_trylock(arch_rwlock_t *rw)
184 unsigned int eh = IS_ENABLED(CONFIG_PPC64);
186 token = WRLOCK_TOKEN;
187 __asm__ __volatile__(
188 "1: lwarx %0,0,%2,%[eh]\n\
195 : "r" (token), "r" (&rw->lock), [eh] "n" (eh)
201 static inline void arch_read_lock(arch_rwlock_t *rw)
204 if (likely(__arch_read_trylock(rw) > 0))
208 if (is_shared_processor())
210 } while (unlikely(rw->lock < 0));
215 static inline void arch_write_lock(arch_rwlock_t *rw)
218 if (likely(__arch_write_trylock(rw) == 0))
222 if (is_shared_processor())
224 } while (unlikely(rw->lock != 0));
229 static inline int arch_read_trylock(arch_rwlock_t *rw)
231 return __arch_read_trylock(rw) > 0;
234 static inline int arch_write_trylock(arch_rwlock_t *rw)
236 return __arch_write_trylock(rw) == 0;
239 static inline void arch_read_unlock(arch_rwlock_t *rw)
243 __asm__ __volatile__(
252 : "cr0", "xer", "memory");
255 static inline void arch_write_unlock(arch_rwlock_t *rw)
257 __asm__ __volatile__("# write_unlock\n\t"
258 PPC_RELEASE_BARRIER: : :"memory");
262 #define arch_spin_relax(lock) spin_yield(lock)
263 #define arch_read_relax(lock) rw_yield(lock)
264 #define arch_write_relax(lock) rw_yield(lock)
266 #endif /* _ASM_POWERPC_SIMPLE_SPINLOCK_H */