1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 #ifndef _POWERPC_PROM_H
3 #define _POWERPC_PROM_H
7 * Definitions for talking to the Open Firmware PROM on
8 * Power Macintosh computers.
10 * Copyright (C) 1996-2005 Paul Mackerras.
12 * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp.
14 #include <linux/types.h>
15 #include <asm/firmware.h>
20 #define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
21 #define OF_DT_END_NODE 0x2 /* End node */
22 #define OF_DT_PROP 0x3 /* Property: name off, size,
24 #define OF_DT_NOP 0x4 /* nop */
27 #define OF_DT_VERSION 0x10
30 * This is what gets passed to the kernel by prom_init or kexec
32 * The dt struct contains the device tree structure, full pathes and
33 * property contents. The dt strings contain a separate block with just
34 * the strings for the property names, and is fully page aligned and
35 * self contained in a page, so that it can be kept around by the kernel,
36 * each property name appears only once in this page (cheap compression)
38 * the mem_rsvmap contains a map of reserved ranges of physical memory,
39 * passing it here instead of in the device-tree itself greatly simplifies
40 * the job of everybody. It's just a list of u64 pairs (base/size) that
43 struct boot_param_header {
44 __be32 magic; /* magic word OF_DT_HEADER */
45 __be32 totalsize; /* total size of DT block */
46 __be32 off_dt_struct; /* offset to structure */
47 __be32 off_dt_strings; /* offset to strings */
48 __be32 off_mem_rsvmap; /* offset to memory reserve map */
49 __be32 version; /* format version */
50 __be32 last_comp_version; /* last compatible version */
51 /* version 2 fields below */
52 __be32 boot_cpuid_phys; /* Physical CPU id we're booting on */
53 /* version 3 fields below */
54 __be32 dt_strings_size; /* size of the DT strings block */
55 /* version 17 fields below */
56 __be32 dt_struct_size; /* size of the DT structure block */
60 * OF address retreival & translation
63 /* Parse the ibm,dma-window property of an OF node into the busno, phys and
66 void of_parse_dma_window(struct device_node *dn, const __be32 *dma_window,
67 unsigned long *busno, unsigned long *phys,
70 extern void of_instantiate_rtc(void);
72 extern int of_get_ibm_chip_id(struct device_node *np);
76 char *drc_name_prefix;
78 u32 drc_name_suffix_start;
79 u32 num_sequential_elems;
85 extern int of_read_drc_info_cell(struct property **prop,
86 const __be32 **curval, struct of_drc_info *data);
88 extern unsigned int boot_cpu_node_count;
91 * There are two methods for telling firmware what our capabilities are.
92 * Newer machines have an "ibm,client-architecture-support" method on the
93 * root node. For older machines, we have to call the "process-elf-header"
94 * method in the /packages/elf-loader node, passing it a fake 32-bit
95 * ELF header containing a couple of PT_NOTE sections that contain
96 * structures that contain various information.
99 /* New method - extensible architecture description vector. */
101 /* Option vector bits - generic bits in byte 1 */
102 #define OV_IGNORE 0x80 /* ignore this vector */
103 #define OV_CESSATION_POLICY 0x40 /* halt if unsupported option present*/
105 /* Option vector 1: processor architectures supported */
106 #define OV1_PPC_2_00 0x80 /* set if we support PowerPC 2.00 */
107 #define OV1_PPC_2_01 0x40 /* set if we support PowerPC 2.01 */
108 #define OV1_PPC_2_02 0x20 /* set if we support PowerPC 2.02 */
109 #define OV1_PPC_2_03 0x10 /* set if we support PowerPC 2.03 */
110 #define OV1_PPC_2_04 0x08 /* set if we support PowerPC 2.04 */
111 #define OV1_PPC_2_05 0x04 /* set if we support PowerPC 2.05 */
112 #define OV1_PPC_2_06 0x02 /* set if we support PowerPC 2.06 */
113 #define OV1_PPC_2_07 0x01 /* set if we support PowerPC 2.07 */
115 #define OV1_PPC_3_00 0x80 /* set if we support PowerPC 3.00 */
116 #define OV1_PPC_3_1 0x40 /* set if we support PowerPC 3.1 */
118 /* Option vector 2: Open Firmware options supported */
119 #define OV2_REAL_MODE 0x20 /* set if we want OF in real mode */
121 /* Option vector 3: processor options supported */
122 #define OV3_FP 0x80 /* floating point */
123 #define OV3_VMX 0x40 /* VMX/Altivec */
124 #define OV3_DFP 0x20 /* decimal FP */
126 /* Option vector 4: IBM PAPR implementation */
127 #define OV4_MIN_ENT_CAP 0x01 /* minimum VP entitled capacity */
129 /* Option vector 5: PAPR/OF options supported
130 * These bits are also used in firmware_has_feature() to validate
131 * the capabilities reported for vector 5 in the device tree so we
132 * encode the vector index in the define and use the OV5_FEAT()
133 * and OV5_INDX() macros to extract the desired information.
135 #define OV5_FEAT(x) ((x) & 0xff)
136 #define OV5_INDX(x) ((x) >> 8)
137 #define OV5_LPAR 0x0280 /* logical partitioning supported */
138 #define OV5_SPLPAR 0x0240 /* shared-processor LPAR supported */
139 /* ibm,dynamic-reconfiguration-memory property supported */
140 #define OV5_DRCONF_MEMORY 0x0220
141 #define OV5_LARGE_PAGES 0x0210 /* large pages supported */
142 #define OV5_DONATE_DEDICATE_CPU 0x0202 /* donate dedicated CPU support */
143 #define OV5_MSI 0x0201 /* PCIe/MSI support */
144 #define OV5_CMO 0x0480 /* Cooperative Memory Overcommitment */
145 #define OV5_XCMO 0x0440 /* Page Coalescing */
146 #define OV5_FORM1_AFFINITY 0x0580 /* FORM1 NUMA affinity */
147 #define OV5_PRRN 0x0540 /* Platform Resource Reassignment */
148 #define OV5_FORM2_AFFINITY 0x0520 /* Form2 NUMA affinity */
149 #define OV5_HP_EVT 0x0604 /* Hot Plug Event support */
150 #define OV5_RESIZE_HPT 0x0601 /* Hash Page Table resizing */
151 #define OV5_PFO_HW_RNG 0x1180 /* PFO Random Number Generator */
152 #define OV5_PFO_HW_842 0x1140 /* PFO Compression Accelerator */
153 #define OV5_PFO_HW_ENCR 0x1120 /* PFO Encryption Accelerator */
154 #define OV5_SUB_PROCESSORS 0x1501 /* 1,2,or 4 Sub-Processors supported */
155 #define OV5_DRMEM_V2 0x1680 /* ibm,dynamic-reconfiguration-v2 */
156 #define OV5_XIVE_SUPPORT 0x17C0 /* XIVE Exploitation Support Mask */
157 #define OV5_XIVE_LEGACY 0x1700 /* XIVE legacy mode Only */
158 #define OV5_XIVE_EXPLOIT 0x1740 /* XIVE exploitation mode Only */
159 #define OV5_XIVE_EITHER 0x1780 /* XIVE legacy or exploitation mode */
160 /* MMU Base Architecture */
161 #define OV5_MMU_SUPPORT 0x18C0 /* MMU Mode Support Mask */
162 #define OV5_MMU_HASH 0x1800 /* Hash MMU Only */
163 #define OV5_MMU_RADIX 0x1840 /* Radix MMU Only */
164 #define OV5_MMU_EITHER 0x1880 /* Hash or Radix Supported */
165 #define OV5_MMU_DYNAMIC 0x18C0 /* Hash or Radix Can Switch Later */
166 #define OV5_NMMU 0x1820 /* Nest MMU Available */
167 /* Hash Table Extensions */
168 #define OV5_HASH_SEG_TBL 0x1980 /* In Memory Segment Tables Available */
169 #define OV5_HASH_GTSE 0x1940 /* Guest Translation Shoot Down Avail */
170 /* Radix Table Extensions */
171 #define OV5_RADIX_GTSE 0x1A40 /* Guest Translation Shoot Down Avail */
172 #define OV5_DRC_INFO 0x1640 /* Redef Prop Structures: drc-info */
174 /* Option Vector 6: IBM PAPR hints */
175 #define OV6_LINUX 0x02 /* Linux is our OS */
177 #endif /* __KERNEL__ */
178 #endif /* _POWERPC_PROM_H */