GNU Linux-libre 4.14.290-gnu1
[releases.git] / arch / powerpc / include / asm / opal.h
1 /*
2  * PowerNV OPAL definitions.
3  *
4  * Copyright 2011 IBM Corp.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11
12 #ifndef _ASM_POWERPC_OPAL_H
13 #define _ASM_POWERPC_OPAL_H
14
15 #include <asm/opal-api.h>
16
17 #ifndef __ASSEMBLY__
18
19 #include <linux/notifier.h>
20
21 /* We calculate number of sg entries based on PAGE_SIZE */
22 #define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry))
23
24 /* Default time to sleep or delay between OPAL_BUSY/OPAL_BUSY_EVENT loops */
25 #define OPAL_BUSY_DELAY_MS      10
26
27 /* /sys/firmware/opal */
28 extern struct kobject *opal_kobj;
29
30 /* /ibm,opal */
31 extern struct device_node *opal_node;
32
33 /* API functions */
34 int64_t opal_invalid_call(void);
35 int64_t opal_npu_destroy_context(uint64_t phb_id, uint64_t pid, uint64_t bdf);
36 int64_t opal_npu_init_context(uint64_t phb_id, int pasid, uint64_t msr,
37                         uint64_t bdf);
38 int64_t opal_npu_map_lpar(uint64_t phb_id, uint64_t bdf, uint64_t lparid,
39                         uint64_t lpcr);
40 int64_t opal_console_write(int64_t term_number, __be64 *length,
41                            const uint8_t *buffer);
42 int64_t opal_console_read(int64_t term_number, __be64 *length,
43                           uint8_t *buffer);
44 int64_t opal_console_write_buffer_space(int64_t term_number,
45                                         __be64 *length);
46 int64_t opal_console_flush(int64_t term_number);
47 int64_t opal_rtc_read(__be32 *year_month_day,
48                       __be64 *hour_minute_second_millisecond);
49 int64_t opal_rtc_write(uint32_t year_month_day,
50                        uint64_t hour_minute_second_millisecond);
51 int64_t opal_tpo_read(uint64_t token, __be32 *year_mon_day, __be32 *hour_min);
52 int64_t opal_tpo_write(uint64_t token, uint32_t year_mon_day,
53                        uint32_t hour_min);
54 int64_t opal_cec_power_down(uint64_t request);
55 int64_t opal_cec_reboot(void);
56 int64_t opal_cec_reboot2(uint32_t reboot_type, const char *diag);
57 int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
58 int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
59 int64_t opal_handle_interrupt(uint64_t isn, __be64 *outstanding_event_mask);
60 int64_t opal_poll_events(__be64 *outstanding_event_mask);
61 int64_t opal_pci_set_hub_tce_memory(uint64_t hub_id, uint64_t tce_mem_addr,
62                                     uint64_t tce_mem_size);
63 int64_t opal_pci_set_phb_tce_memory(uint64_t phb_id, uint64_t tce_mem_addr,
64                                     uint64_t tce_mem_size);
65 int64_t opal_pci_config_read_byte(uint64_t phb_id, uint64_t bus_dev_func,
66                                   uint64_t offset, uint8_t *data);
67 int64_t opal_pci_config_read_half_word(uint64_t phb_id, uint64_t bus_dev_func,
68                                        uint64_t offset, __be16 *data);
69 int64_t opal_pci_config_read_word(uint64_t phb_id, uint64_t bus_dev_func,
70                                   uint64_t offset, __be32 *data);
71 int64_t opal_pci_config_write_byte(uint64_t phb_id, uint64_t bus_dev_func,
72                                    uint64_t offset, uint8_t data);
73 int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func,
74                                         uint64_t offset, uint16_t data);
75 int64_t opal_pci_config_write_word(uint64_t phb_id, uint64_t bus_dev_func,
76                                    uint64_t offset, uint32_t data);
77 int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority);
78 int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority);
79 int64_t opal_register_exception_handler(uint64_t opal_exception,
80                                         uint64_t handler_address,
81                                         uint64_t glue_cache_line);
82 int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number,
83                                    uint8_t *freeze_state,
84                                    __be16 *pci_error_type,
85                                    __be64 *phb_status);
86 int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number,
87                                   uint64_t eeh_action_token);
88 int64_t opal_pci_eeh_freeze_set(uint64_t phb_id, uint64_t pe_number,
89                                 uint64_t eeh_action_token);
90 int64_t opal_pci_err_inject(uint64_t phb_id, uint32_t pe_no, uint32_t type,
91                             uint32_t func, uint64_t addr, uint64_t mask);
92 int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state);
93
94
95
96 int64_t opal_pci_phb_mmio_enable(uint64_t phb_id, uint16_t window_type,
97                                  uint16_t window_num, uint16_t enable);
98 int64_t opal_pci_set_phb_mem_window(uint64_t phb_id, uint16_t window_type,
99                                     uint16_t window_num,
100                                     uint64_t starting_real_address,
101                                     uint64_t starting_pci_address,
102                                     uint64_t size);
103 int64_t opal_pci_map_pe_mmio_window(uint64_t phb_id, uint16_t pe_number,
104                                     uint16_t window_type, uint16_t window_num,
105                                     uint16_t segment_num);
106 int64_t opal_pci_set_phb_table_memory(uint64_t phb_id, uint64_t rtt_addr,
107                                       uint64_t ivt_addr, uint64_t ivt_len,
108                                       uint64_t reject_array_addr,
109                                       uint64_t peltv_addr);
110 int64_t opal_pci_set_pe(uint64_t phb_id, uint64_t pe_number, uint64_t bus_dev_func,
111                         uint8_t bus_compare, uint8_t dev_compare, uint8_t func_compare,
112                         uint8_t pe_action);
113 int64_t opal_pci_set_peltv(uint64_t phb_id, uint32_t parent_pe, uint32_t child_pe,
114                            uint8_t state);
115 int64_t opal_pci_set_mve(uint64_t phb_id, uint32_t mve_number, uint32_t pe_number);
116 int64_t opal_pci_set_mve_enable(uint64_t phb_id, uint32_t mve_number,
117                                 uint32_t state);
118 int64_t opal_pci_get_xive_reissue(uint64_t phb_id, uint32_t xive_number,
119                                   uint8_t *p_bit, uint8_t *q_bit);
120 int64_t opal_pci_set_xive_reissue(uint64_t phb_id, uint32_t xive_number,
121                                   uint8_t p_bit, uint8_t q_bit);
122 int64_t opal_pci_msi_eoi(uint64_t phb_id, uint32_t hw_irq);
123 int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number,
124                              uint32_t xive_num);
125 int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num,
126                              __be32 *interrupt_source_number);
127 int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num,
128                         uint8_t msi_range, __be32 *msi_address,
129                         __be32 *message_data);
130 int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number,
131                         uint32_t xive_num, uint8_t msi_range,
132                         __be64 *msi_address, __be32 *message_data);
133 int64_t opal_start_cpu(uint64_t thread_number, uint64_t start_address);
134 int64_t opal_query_cpu_status(uint64_t thread_number, uint8_t *thread_status);
135 int64_t opal_write_oppanel(oppanel_line_t *lines, uint64_t num_lines);
136 int64_t opal_pci_map_pe_dma_window(uint64_t phb_id, uint16_t pe_number, uint16_t window_id,
137                                    uint16_t tce_levels, uint64_t tce_table_addr,
138                                    uint64_t tce_table_size, uint64_t tce_page_size);
139 int64_t opal_pci_map_pe_dma_window_real(uint64_t phb_id, uint16_t pe_number,
140                                         uint16_t dma_window_number, uint64_t pci_start_addr,
141                                         uint64_t pci_mem_size);
142 int64_t opal_pci_reset(uint64_t id, uint8_t reset_scope, uint8_t assert_state);
143
144 int64_t opal_pci_get_hub_diag_data(uint64_t hub_id, void *diag_buffer,
145                                    uint64_t diag_buffer_len);
146 int64_t opal_pci_get_phb_diag_data(uint64_t phb_id, void *diag_buffer,
147                                    uint64_t diag_buffer_len);
148 int64_t opal_pci_get_phb_diag_data2(uint64_t phb_id, void *diag_buffer,
149                                     uint64_t diag_buffer_len);
150 int64_t opal_pci_fence_phb(uint64_t phb_id);
151 int64_t opal_pci_reinit(uint64_t phb_id, uint64_t reinit_scope, uint64_t data);
152 int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action);
153 int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action);
154 int64_t opal_get_epow_status(__be16 *epow_status, __be16 *num_epow_classes);
155 int64_t opal_get_dpo_status(__be64 *dpo_timeout);
156 int64_t opal_set_system_attention_led(uint8_t led_action);
157 int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe,
158                             __be16 *pci_error_type, __be16 *severity);
159 int64_t opal_pci_poll(uint64_t id);
160 int64_t opal_return_cpu(void);
161 int64_t opal_check_token(uint64_t token);
162 int64_t opal_reinit_cpus(uint64_t flags);
163
164 int64_t opal_xscom_read(uint32_t gcid, uint64_t pcb_addr, __be64 *val);
165 int64_t opal_xscom_write(uint32_t gcid, uint64_t pcb_addr, uint64_t val);
166
167 int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
168                        uint32_t addr, uint32_t data, uint32_t sz);
169 int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type,
170                       uint32_t addr, __be32 *data, uint32_t sz);
171
172 int64_t opal_read_elog(uint64_t buffer, uint64_t size, uint64_t log_id);
173 int64_t opal_get_elog_size(__be64 *log_id, __be64 *size, __be64 *elog_type);
174 int64_t opal_write_elog(uint64_t buffer, uint64_t size, uint64_t offset);
175 int64_t opal_send_ack_elog(uint64_t log_id);
176 void opal_resend_pending_logs(void);
177
178 int64_t opal_validate_flash(uint64_t buffer, uint32_t *size, uint32_t *result);
179 int64_t opal_manage_flash(uint8_t op);
180 int64_t opal_update_flash(uint64_t blk_list);
181 int64_t opal_dump_init(uint8_t dump_type);
182 int64_t opal_dump_info(__be32 *dump_id, __be32 *dump_size);
183 int64_t opal_dump_info2(__be32 *dump_id, __be32 *dump_size, __be32 *dump_type);
184 int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer);
185 int64_t opal_dump_ack(uint32_t dump_id);
186 int64_t opal_dump_resend_notification(void);
187
188 int64_t opal_get_msg(uint64_t buffer, uint64_t size);
189 int64_t opal_write_oppanel_async(uint64_t token, oppanel_line_t *lines,
190                                         uint64_t num_lines);
191 int64_t opal_check_completion(uint64_t buffer, uint64_t size, uint64_t token);
192 int64_t opal_sync_host_reboot(void);
193 int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer,
194                 uint64_t length);
195 int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
196                 uint64_t length);
197 int64_t opal_sensor_read(uint32_t sensor_hndl, int token, __be32 *sensor_data);
198 int64_t opal_handle_hmi(void);
199 int64_t opal_register_dump_region(uint32_t id, uint64_t start, uint64_t end);
200 int64_t opal_unregister_dump_region(uint32_t id);
201 int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);
202 int64_t opal_config_cpu_idle_state(uint64_t state, uint64_t flag);
203 int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);
204 int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg,
205                 uint64_t msg_len);
206 int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg,
207                 uint64_t *msg_len);
208 int64_t opal_i2c_request(uint64_t async_token, uint32_t bus_id,
209                          struct opal_i2c_request *oreq);
210 int64_t opal_prd_msg(struct opal_prd_msg *msg);
211 int64_t opal_leds_get_ind(char *loc_code, __be64 *led_mask,
212                           __be64 *led_value, __be64 *max_led_type);
213 int64_t opal_leds_set_ind(uint64_t token, char *loc_code, const u64 led_mask,
214                           const u64 led_value, __be64 *max_led_type);
215
216 int64_t opal_flash_read(uint64_t id, uint64_t offset, uint64_t buf,
217                 uint64_t size, uint64_t token);
218 int64_t opal_flash_write(uint64_t id, uint64_t offset, uint64_t buf,
219                 uint64_t size, uint64_t token);
220 int64_t opal_flash_erase(uint64_t id, uint64_t offset, uint64_t size,
221                 uint64_t token);
222 int64_t opal_get_device_tree(uint32_t phandle, uint64_t buf, uint64_t len);
223 int64_t opal_pci_get_presence_state(uint64_t id, uint64_t data);
224 int64_t opal_pci_get_power_state(uint64_t id, uint64_t data);
225 int64_t opal_pci_set_power_state(uint64_t async_token, uint64_t id,
226                                  uint64_t data);
227 int64_t opal_pci_poll2(uint64_t id, uint64_t data);
228
229 int64_t opal_int_get_xirr(uint32_t *out_xirr, bool just_poll);
230 int64_t opal_int_set_cppr(uint8_t cppr);
231 int64_t opal_int_eoi(uint32_t xirr);
232 int64_t opal_int_set_mfrr(uint32_t cpu, uint8_t mfrr);
233 int64_t opal_pci_tce_kill(uint64_t phb_id, uint32_t kill_type,
234                           uint32_t pe_num, uint32_t tce_size,
235                           uint64_t dma_addr, uint32_t npages);
236 int64_t opal_nmmu_set_ptcr(uint64_t chip_id, uint64_t ptcr);
237 int64_t opal_xive_reset(uint64_t version);
238 int64_t opal_xive_get_irq_info(uint32_t girq,
239                                __be64 *out_flags,
240                                __be64 *out_eoi_page,
241                                __be64 *out_trig_page,
242                                __be32 *out_esb_shift,
243                                __be32 *out_src_chip);
244 int64_t opal_xive_get_irq_config(uint32_t girq, __be64 *out_vp,
245                                  uint8_t *out_prio, __be32 *out_lirq);
246 int64_t opal_xive_set_irq_config(uint32_t girq, uint64_t vp, uint8_t prio,
247                                  uint32_t lirq);
248 int64_t opal_xive_get_queue_info(uint64_t vp, uint32_t prio,
249                                  __be64 *out_qpage,
250                                  __be64 *out_qsize,
251                                  __be64 *out_qeoi_page,
252                                  __be32 *out_escalate_irq,
253                                  __be64 *out_qflags);
254 int64_t opal_xive_set_queue_info(uint64_t vp, uint32_t prio,
255                                  uint64_t qpage,
256                                  uint64_t qsize,
257                                  uint64_t qflags);
258 int64_t opal_xive_donate_page(uint32_t chip_id, uint64_t addr);
259 int64_t opal_xive_alloc_vp_block(uint32_t alloc_order);
260 int64_t opal_xive_free_vp_block(uint64_t vp);
261 int64_t opal_xive_get_vp_info(uint64_t vp,
262                               __be64 *out_flags,
263                               __be64 *out_cam_value,
264                               __be64 *out_report_cl_pair,
265                               __be32 *out_chip_id);
266 int64_t opal_xive_set_vp_info(uint64_t vp,
267                               uint64_t flags,
268                               uint64_t report_cl_pair);
269 int64_t opal_xive_allocate_irq_raw(uint32_t chip_id);
270 int64_t opal_xive_free_irq(uint32_t girq);
271 int64_t opal_xive_sync(uint32_t type, uint32_t id);
272 int64_t opal_xive_dump(uint32_t type, uint32_t id);
273 int64_t opal_pci_set_p2p(uint64_t phb_init, uint64_t phb_target,
274                         uint64_t desc, uint16_t pe_number);
275
276 int64_t opal_imc_counters_init(uint32_t type, uint64_t address,
277                                                         uint64_t cpu_pir);
278 int64_t opal_imc_counters_start(uint32_t type, uint64_t cpu_pir);
279 int64_t opal_imc_counters_stop(uint32_t type, uint64_t cpu_pir);
280
281 int opal_get_powercap(u32 handle, int token, u32 *pcap);
282 int opal_set_powercap(u32 handle, int token, u32 pcap);
283 int opal_get_power_shift_ratio(u32 handle, int token, u32 *psr);
284 int opal_set_power_shift_ratio(u32 handle, int token, u32 psr);
285 int opal_sensor_group_clear(u32 group_hndl, int token);
286
287 /* Internal functions */
288 extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
289                                    int depth, void *data);
290 extern int early_init_dt_scan_recoverable_ranges(unsigned long node,
291                                  const char *uname, int depth, void *data);
292 extern void opal_configure_cores(void);
293
294 extern int opal_get_chars(uint32_t vtermno, char *buf, int count);
295 extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
296
297 extern void hvc_opal_init_early(void);
298
299 extern int opal_notifier_register(struct notifier_block *nb);
300 extern int opal_notifier_unregister(struct notifier_block *nb);
301
302 extern int opal_message_notifier_register(enum opal_msg_type msg_type,
303                                                 struct notifier_block *nb);
304 extern int opal_message_notifier_unregister(enum opal_msg_type msg_type,
305                                             struct notifier_block *nb);
306 extern void opal_notifier_enable(void);
307 extern void opal_notifier_disable(void);
308 extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val);
309
310 extern int __opal_async_get_token(void);
311 extern int opal_async_get_token_interruptible(void);
312 extern int __opal_async_release_token(int token);
313 extern int opal_async_release_token(int token);
314 extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);
315 extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data);
316
317 struct rtc_time;
318 extern unsigned long opal_get_boot_time(void);
319 extern void opal_nvram_init(void);
320 extern void opal_flash_update_init(void);
321 extern void opal_flash_term_callback(void);
322 extern int opal_elog_init(void);
323 extern void opal_platform_dump_init(void);
324 extern void opal_sys_param_init(void);
325 extern void opal_msglog_init(void);
326 extern void opal_msglog_sysfs_init(void);
327 extern int opal_async_comp_init(void);
328 extern int opal_sensor_init(void);
329 extern int opal_hmi_handler_init(void);
330 extern int opal_event_init(void);
331
332 extern int opal_machine_check(struct pt_regs *regs);
333 extern bool opal_mce_check_early_recovery(struct pt_regs *regs);
334 extern int opal_hmi_exception_early(struct pt_regs *regs);
335 extern int opal_handle_hmi_exception(struct pt_regs *regs);
336
337 extern void opal_shutdown(void);
338 extern int opal_resync_timebase(void);
339
340 extern void opal_lpc_init(void);
341
342 extern void opal_kmsg_init(void);
343
344 extern int opal_event_request(unsigned int opal_event_nr);
345
346 struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,
347                                              unsigned long vmalloc_size);
348 void opal_free_sg_list(struct opal_sg_list *sg);
349
350 extern int opal_error_code(int rc);
351
352 ssize_t opal_msglog_copy(char *to, loff_t pos, size_t count);
353
354 static inline int opal_get_async_rc(struct opal_msg msg)
355 {
356         if (msg.msg_type != OPAL_MSG_ASYNC_COMP)
357                 return OPAL_PARAMETER;
358         else
359                 return be64_to_cpu(msg.params[1]);
360 }
361
362 void opal_wake_poller(void);
363
364 void opal_powercap_init(void);
365 void opal_psr_init(void);
366 void opal_sensor_groups_init(void);
367
368 #endif /* __ASSEMBLY__ */
369
370 #endif /* _ASM_POWERPC_OPAL_H */