1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright SUSE Linux Products GmbH 2010
6 * Authors: Alexander Graf <agraf@suse.de>
9 #ifndef __ASM_KVM_BOOK3S_64_H__
10 #define __ASM_KVM_BOOK3S_64_H__
12 #include <linux/string.h>
13 #include <asm/bitops.h>
14 #include <asm/book3s/64/mmu-hash.h>
15 #include <asm/cpu_has_feature.h>
16 #include <asm/ppc-opcode.h>
17 #include <asm/pte-walk.h>
19 #ifdef CONFIG_PPC_PSERIES
20 static inline bool kvmhv_on_pseries(void)
22 return !cpu_has_feature(CPU_FTR_HVMODE);
25 static inline bool kvmhv_on_pseries(void)
32 * Structure for a nested guest, that is, for a guest that is managed by
35 struct kvm_nested_guest {
36 struct kvm *l1_host; /* L1 VM that owns this nested guest */
37 int l1_lpid; /* lpid L1 guest thinks this guest is */
38 int shadow_lpid; /* real lpid of this nested guest */
39 pgd_t *shadow_pgtable; /* our page table for this guest */
40 u64 l1_gr_to_hr; /* L1's addr of part'n-scoped table */
41 u64 process_table; /* process table entry for this guest */
42 long refcnt; /* number of pointers to this struct */
43 struct mutex tlb_lock; /* serialize page faults and tlbies */
44 struct kvm_nested_guest *next;
45 cpumask_t need_tlb_flush;
46 cpumask_t cpu_in_guest;
47 short prev_cpu[NR_CPUS];
48 u8 radix; /* is this nested guest radix */
52 * We define a nested rmap entry as a single 64-bit quantity
53 * 0xFFF0000000000000 12-bit lpid field
54 * 0x000FFFFFFFFFF000 40-bit guest 4k page frame number
55 * 0x0000000000000001 1-bit single entry flag
57 #define RMAP_NESTED_LPID_MASK 0xFFF0000000000000UL
58 #define RMAP_NESTED_LPID_SHIFT (52)
59 #define RMAP_NESTED_GPA_MASK 0x000FFFFFFFFFF000UL
60 #define RMAP_NESTED_IS_SINGLE_ENTRY 0x0000000000000001UL
62 /* Structure for a nested guest rmap entry */
64 struct llist_node list;
69 * for_each_nest_rmap_safe - iterate over the list of nested rmap entries
70 * safe against removal of the list entry or NULL list
71 * @pos: a (struct rmap_nested *) to use as a loop cursor
72 * @node: pointer to the first entry
73 * NOTE: this can be NULL
74 * @rmapp: an (unsigned long *) in which to return the rmap entries on each
76 * NOTE: this must point to already allocated memory
78 * The nested_rmap is a llist of (struct rmap_nested) entries pointed to by the
79 * rmap entry in the memslot. The list is always terminated by a "single entry"
80 * stored in the list element of the final entry of the llist. If there is ONLY
81 * a single entry then this is itself in the rmap entry of the memslot, not a
84 * Note that the iterator below assumes that a nested rmap entry is always
85 * non-zero. This is true for our usage because the LPID field is always
86 * non-zero (zero is reserved for the host).
88 * This should be used to iterate over the list of rmap_nested entries with
89 * processing done on the u64 rmap value given by each iteration. This is safe
90 * against removal of list entries and it is always safe to call free on (pos).
93 * struct rmap_nested *cursor;
94 * struct llist_node *first;
96 * for_each_nest_rmap_safe(cursor, first, &rmap) {
101 #define for_each_nest_rmap_safe(pos, node, rmapp) \
102 for ((pos) = llist_entry((node), typeof(*(pos)), list); \
104 (*(rmapp) = ((RMAP_NESTED_IS_SINGLE_ENTRY & ((u64) (node))) ? \
105 ((u64) (node)) : ((pos)->rmap))) && \
106 (((node) = ((RMAP_NESTED_IS_SINGLE_ENTRY & ((u64) (node))) ? \
107 ((struct llist_node *) ((pos) = NULL)) : \
108 (pos)->list.next)), true); \
109 (pos) = llist_entry((node), typeof(*(pos)), list))
111 struct kvm_nested_guest *kvmhv_get_nested(struct kvm *kvm, int l1_lpid,
113 void kvmhv_put_nested(struct kvm_nested_guest *gp);
114 int kvmhv_nested_next_lpid(struct kvm *kvm, int lpid);
116 /* Encoding of first parameter for H_TLB_INVALIDATE */
117 #define H_TLBIE_P1_ENC(ric, prs, r) (___PPC_RIC(ric) | ___PPC_PRS(prs) | \
120 /* Power architecture requires HPT is at least 256kiB, at most 64TiB */
121 #define PPC_MIN_HPT_ORDER 18
122 #define PPC_MAX_HPT_ORDER 46
124 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
125 static inline struct kvmppc_book3s_shadow_vcpu *svcpu_get(struct kvm_vcpu *vcpu)
128 return &get_paca()->shadow_vcpu;
131 static inline void svcpu_put(struct kvmppc_book3s_shadow_vcpu *svcpu)
137 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
139 static inline bool kvm_is_radix(struct kvm *kvm)
141 return kvm->arch.radix;
144 static inline bool kvmhv_vcpu_is_radix(struct kvm_vcpu *vcpu)
148 if (vcpu->arch.nested)
149 radix = vcpu->arch.nested->radix;
151 radix = kvm_is_radix(vcpu->kvm);
156 int kvmhv_vcpu_entry_p9(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpcr);
158 #define KVM_DEFAULT_HPT_ORDER 24 /* 16MB HPT by default */
162 * Invalid HDSISR value which is used to indicate when HW has not set the reg.
163 * Used to work around an errata.
165 #define HDSISR_CANARY 0x7fff
168 * We use a lock bit in HPTE dword 0 to synchronize updates and
169 * accesses to each HPTE, and another bit to indicate non-present
172 #define HPTE_V_HVLOCK 0x40UL
173 #define HPTE_V_ABSENT 0x20UL
176 * We use this bit in the guest_rpte field of the revmap entry
177 * to indicate a modified HPTE.
179 #define HPTE_GR_MODIFIED (1ul << 62)
181 /* These bits are reserved in the guest view of the HPTE */
182 #define HPTE_GR_RESERVED HPTE_GR_MODIFIED
184 static inline long try_lock_hpte(__be64 *hpte, unsigned long bits)
186 unsigned long tmp, old;
187 __be64 be_lockbit, be_bits;
190 * We load/store in native endian, but the HTAB is in big endian. If
191 * we byte swap all data we apply on the PTE we're implicitly correct
194 be_lockbit = cpu_to_be64(HPTE_V_HVLOCK);
195 be_bits = cpu_to_be64(bits);
197 asm volatile(" ldarx %0,0,%2\n"
205 : "=&r" (tmp), "=&r" (old)
206 : "r" (hpte), "r" (be_bits), "r" (be_lockbit)
211 static inline void unlock_hpte(__be64 *hpte, unsigned long hpte_v)
213 hpte_v &= ~HPTE_V_HVLOCK;
214 asm volatile(PPC_RELEASE_BARRIER "" : : : "memory");
215 hpte[0] = cpu_to_be64(hpte_v);
218 /* Without barrier */
219 static inline void __unlock_hpte(__be64 *hpte, unsigned long hpte_v)
221 hpte_v &= ~HPTE_V_HVLOCK;
222 hpte[0] = cpu_to_be64(hpte_v);
226 * These functions encode knowledge of the POWER7/8/9 hardware
227 * interpretations of the HPTE LP (large page size) field.
229 static inline int kvmppc_hpte_page_shifts(unsigned long h, unsigned long l)
233 if (!(h & HPTE_V_LARGE))
235 lphi = (l >> 16) & 0xf;
236 switch ((l >> 12) & 0xf) {
238 return !lphi ? 24 : 0; /* 16MB */
241 return 16; /* 64kB */
244 return !lphi ? 34 : 0; /* 16GB */
247 return (16 << 8) + 12; /* 64kB in 4kB */
251 return (24 << 8) + 16; /* 16MB in 64kkB */
253 return (24 << 8) + 12; /* 16MB in 4kB */
259 static inline int kvmppc_hpte_base_page_shift(unsigned long h, unsigned long l)
261 return kvmppc_hpte_page_shifts(h, l) & 0xff;
264 static inline int kvmppc_hpte_actual_page_shift(unsigned long h, unsigned long l)
266 int tmp = kvmppc_hpte_page_shifts(h, l);
273 static inline unsigned long kvmppc_actual_pgsz(unsigned long v, unsigned long r)
275 int shift = kvmppc_hpte_actual_page_shift(v, r);
282 static inline int kvmppc_pgsize_lp_encoding(int base_shift, int actual_shift)
284 switch (base_shift) {
286 switch (actual_shift) {
296 switch (actual_shift) {
309 static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
310 unsigned long pte_index)
312 int a_pgshift, b_pgshift;
313 unsigned long rb = 0, va_low, sllp;
315 b_pgshift = a_pgshift = kvmppc_hpte_page_shifts(v, r);
316 if (a_pgshift >= 0x100) {
322 * Ignore the top 14 bits of va
323 * v have top two bits covering segment size, hence move
324 * by 16 bits, Also clear the lower HPTE_V_AVPN_SHIFT (7) bits.
325 * AVA field in v also have the lower 23 bits ignored.
326 * For base page size 4K we need 14 .. 65 bits (so need to
327 * collect extra 11 bits)
328 * For others we need 14..14+i
330 /* This covers 14..54 bits of va*/
331 rb = (v & ~0x7fUL) << 16; /* AVA field */
334 * AVA in v had cleared lower 23 bits. We need to derive
335 * that from pteg index
337 va_low = pte_index >> 3;
338 if (v & HPTE_V_SECONDARY)
341 * get the vpn bits from va_low using reverse of hashing.
342 * In v we have va with 23 bits dropped and then left shifted
343 * HPTE_V_AVPN_SHIFT (7) bits. Now to find vsid we need
344 * right shift it with (SID_SHIFT - (23 - 7))
346 if (!(v & HPTE_V_1TB_SEG))
347 va_low ^= v >> (SID_SHIFT - 16);
349 va_low ^= v >> (SID_SHIFT_1T - 16);
352 if (b_pgshift <= 12) {
353 if (a_pgshift > 12) {
354 sllp = (a_pgshift == 16) ? 5 : 4;
355 rb |= sllp << 5; /* AP field */
357 rb |= (va_low & 0x7ff) << 12; /* remaining 11 bits of AVA */
361 * remaining bits of AVA/LP fields
362 * Also contain the rr bits of LP
364 rb |= (va_low << b_pgshift) & 0x7ff000;
366 * Now clear not needed LP bits based on actual psize
368 rb &= ~((1ul << a_pgshift) - 1);
370 * AVAL field 58..77 - base_page_shift bits of va
371 * we have space for 58..64 bits, Missing bits should
372 * be zero filled. +1 is to take care of L bit shift
374 aval_shift = 64 - (77 - b_pgshift) + 1;
375 rb |= ((va_low << aval_shift) & 0xfe);
377 rb |= 1; /* L field */
378 rb |= r & 0xff000 & ((1ul << a_pgshift) - 1); /* LP field */
380 rb |= (v >> HPTE_V_SSIZE_SHIFT) << 8; /* B field */
384 static inline unsigned long hpte_rpn(unsigned long ptel, unsigned long psize)
386 return ((ptel & HPTE_R_RPN) & ~(psize - 1)) >> PAGE_SHIFT;
389 static inline int hpte_is_writable(unsigned long ptel)
391 unsigned long pp = ptel & (HPTE_R_PP0 | HPTE_R_PP);
393 return pp != PP_RXRX && pp != PP_RXXX;
396 static inline unsigned long hpte_make_readonly(unsigned long ptel)
398 if ((ptel & HPTE_R_PP0) || (ptel & HPTE_R_PP) == PP_RWXX)
399 ptel = (ptel & ~HPTE_R_PP) | PP_RXXX;
405 static inline bool hpte_cache_flags_ok(unsigned long hptel, bool is_ci)
407 unsigned int wimg = hptel & HPTE_R_WIMG;
410 if (wimg == (HPTE_R_W | HPTE_R_I | HPTE_R_M) &&
411 cpu_has_feature(CPU_FTR_ARCH_206))
415 return wimg == HPTE_R_M;
417 * if host is mapped cache inhibited, make sure hptel also have
420 if (wimg & HPTE_R_W) /* FIXME!! is this ok for all guest. ? */
422 return !!(wimg & HPTE_R_I);
426 * If it's present and writable, atomically set dirty and referenced bits and
427 * return the PTE, otherwise return 0.
429 static inline pte_t kvmppc_read_update_linux_pte(pte_t *ptep, int writing)
431 pte_t old_pte, new_pte = __pte(0);
435 * Make sure we don't reload from ptep
437 old_pte = READ_ONCE(*ptep);
439 * wait until H_PAGE_BUSY is clear then set it atomically
441 if (unlikely(pte_val(old_pte) & H_PAGE_BUSY)) {
445 /* If pte is not present return None */
446 if (unlikely(!pte_present(old_pte)))
449 new_pte = pte_mkyoung(old_pte);
450 if (writing && pte_write(old_pte))
451 new_pte = pte_mkdirty(new_pte);
453 if (pte_xchg(ptep, old_pte, new_pte))
459 static inline bool hpte_read_permission(unsigned long pp, unsigned long key)
462 return PP_RWRX <= pp && pp <= PP_RXRX;
466 static inline bool hpte_write_permission(unsigned long pp, unsigned long key)
469 return pp == PP_RWRW;
470 return pp <= PP_RWRW;
473 static inline int hpte_get_skey_perm(unsigned long hpte_r, unsigned long amr)
477 skey = ((hpte_r & HPTE_R_KEY_HI) >> 57) |
478 ((hpte_r & HPTE_R_KEY_LO) >> 9);
479 return (amr >> (62 - 2 * skey)) & 3;
482 static inline void lock_rmap(unsigned long *rmap)
485 while (test_bit(KVMPPC_RMAP_LOCK_BIT, rmap))
487 } while (test_and_set_bit_lock(KVMPPC_RMAP_LOCK_BIT, rmap));
490 static inline void unlock_rmap(unsigned long *rmap)
492 __clear_bit_unlock(KVMPPC_RMAP_LOCK_BIT, rmap);
495 static inline bool slot_is_aligned(struct kvm_memory_slot *memslot,
496 unsigned long pagesize)
498 unsigned long mask = (pagesize >> PAGE_SHIFT) - 1;
500 if (pagesize <= PAGE_SIZE)
502 return !(memslot->base_gfn & mask) && !(memslot->npages & mask);
506 * This works for 4k, 64k and 16M pages on POWER7,
507 * and 4k and 16M pages on PPC970.
509 static inline unsigned long slb_pgsize_encoding(unsigned long psize)
511 unsigned long senc = 0;
513 if (psize > 0x1000) {
515 if (psize == 0x10000)
516 senc |= SLB_VSID_LP_01;
521 static inline int is_vrma_hpte(unsigned long hpte_v)
523 return (hpte_v & ~0xffffffUL) ==
524 (HPTE_V_1TB_SEG | (VRMA_VSID << (40 - 16)));
527 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
529 * Note modification of an HPTE; set the HPTE modified bit
530 * if anyone is interested.
532 static inline void note_hpte_modification(struct kvm *kvm,
533 struct revmap_entry *rev)
535 if (atomic_read(&kvm->arch.hpte_mod_interest))
536 rev->guest_rpte |= HPTE_GR_MODIFIED;
540 * Like kvm_memslots(), but for use in real mode when we can't do
541 * any RCU stuff (since the secondary threads are offline from the
542 * kernel's point of view), and we can't print anything.
543 * Thus we use rcu_dereference_raw() rather than rcu_dereference_check().
545 static inline struct kvm_memslots *kvm_memslots_raw(struct kvm *kvm)
547 return rcu_dereference_raw_check(kvm->memslots[0]);
550 extern void kvmppc_mmu_debugfs_init(struct kvm *kvm);
551 extern void kvmhv_radix_debugfs_init(struct kvm *kvm);
553 extern void kvmhv_rm_send_ipi(int cpu);
555 static inline unsigned long kvmppc_hpt_npte(struct kvm_hpt_info *hpt)
557 /* HPTEs are 2**4 bytes long */
558 return 1UL << (hpt->order - 4);
561 static inline unsigned long kvmppc_hpt_mask(struct kvm_hpt_info *hpt)
563 /* 128 (2**7) bytes in each HPTEG */
564 return (1UL << (hpt->order - 7)) - 1;
567 /* Set bits in a dirty bitmap, which is in LE format */
568 static inline void set_dirty_bits(unsigned long *map, unsigned long i,
569 unsigned long npages)
573 memset((char *)map + i / 8, 0xff, npages / 8);
575 for (; npages; ++i, --npages)
576 __set_bit_le(i, map);
579 static inline void set_dirty_bits_atomic(unsigned long *map, unsigned long i,
580 unsigned long npages)
583 memset((char *)map + i / 8, 0xff, npages / 8);
585 for (; npages; ++i, --npages)
589 static inline u64 sanitize_msr(u64 msr)
596 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
597 static inline void copy_from_checkpoint(struct kvm_vcpu *vcpu)
599 vcpu->arch.regs.ccr = vcpu->arch.cr_tm;
600 vcpu->arch.regs.xer = vcpu->arch.xer_tm;
601 vcpu->arch.regs.link = vcpu->arch.lr_tm;
602 vcpu->arch.regs.ctr = vcpu->arch.ctr_tm;
603 vcpu->arch.amr = vcpu->arch.amr_tm;
604 vcpu->arch.ppr = vcpu->arch.ppr_tm;
605 vcpu->arch.dscr = vcpu->arch.dscr_tm;
606 vcpu->arch.tar = vcpu->arch.tar_tm;
607 memcpy(vcpu->arch.regs.gpr, vcpu->arch.gpr_tm,
608 sizeof(vcpu->arch.regs.gpr));
609 vcpu->arch.fp = vcpu->arch.fp_tm;
610 vcpu->arch.vr = vcpu->arch.vr_tm;
611 vcpu->arch.vrsave = vcpu->arch.vrsave_tm;
614 static inline void copy_to_checkpoint(struct kvm_vcpu *vcpu)
616 vcpu->arch.cr_tm = vcpu->arch.regs.ccr;
617 vcpu->arch.xer_tm = vcpu->arch.regs.xer;
618 vcpu->arch.lr_tm = vcpu->arch.regs.link;
619 vcpu->arch.ctr_tm = vcpu->arch.regs.ctr;
620 vcpu->arch.amr_tm = vcpu->arch.amr;
621 vcpu->arch.ppr_tm = vcpu->arch.ppr;
622 vcpu->arch.dscr_tm = vcpu->arch.dscr;
623 vcpu->arch.tar_tm = vcpu->arch.tar;
624 memcpy(vcpu->arch.gpr_tm, vcpu->arch.regs.gpr,
625 sizeof(vcpu->arch.regs.gpr));
626 vcpu->arch.fp_tm = vcpu->arch.fp;
627 vcpu->arch.vr_tm = vcpu->arch.vr;
628 vcpu->arch.vrsave_tm = vcpu->arch.vrsave;
630 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
632 extern int kvmppc_create_pte(struct kvm *kvm, pgd_t *pgtable, pte_t pte,
633 unsigned long gpa, unsigned int level,
634 unsigned long mmu_seq, unsigned int lpid,
635 unsigned long *rmapp, struct rmap_nested **n_rmap);
636 extern void kvmhv_insert_nest_rmap(struct kvm *kvm, unsigned long *rmapp,
637 struct rmap_nested **n_rmap);
638 extern void kvmhv_update_nest_rmap_rc_list(struct kvm *kvm, unsigned long *rmapp,
639 unsigned long clr, unsigned long set,
640 unsigned long hpa, unsigned long nbytes);
641 extern void kvmhv_remove_nest_rmap_range(struct kvm *kvm,
642 const struct kvm_memory_slot *memslot,
643 unsigned long gpa, unsigned long hpa,
644 unsigned long nbytes);
646 static inline pte_t *
647 find_kvm_secondary_pte_unlocked(struct kvm *kvm, unsigned long ea,
652 pte = __find_linux_pte(kvm->arch.pgtable, ea, NULL, hshift);
656 static inline pte_t *find_kvm_secondary_pte(struct kvm *kvm, unsigned long ea,
661 VM_WARN(!spin_is_locked(&kvm->mmu_lock),
662 "%s called with kvm mmu_lock not held \n", __func__);
663 pte = __find_linux_pte(kvm->arch.pgtable, ea, NULL, hshift);
668 static inline pte_t *find_kvm_host_pte(struct kvm *kvm, unsigned long mmu_seq,
669 unsigned long ea, unsigned *hshift)
673 VM_WARN(!spin_is_locked(&kvm->mmu_lock),
674 "%s called with kvm mmu_lock not held \n", __func__);
676 if (mmu_notifier_retry(kvm, mmu_seq))
679 pte = __find_linux_pte(kvm->mm->pgd, ea, NULL, hshift);
684 extern pte_t *find_kvm_nested_guest_pte(struct kvm *kvm, unsigned long lpid,
685 unsigned long ea, unsigned *hshift);
687 #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
689 #endif /* __ASM_KVM_BOOK3S_64_H__ */