1 #ifndef _ASM_POWERPC_EXCEPTION_H
2 #define _ASM_POWERPC_EXCEPTION_H
4 * Extracted from head_64.S
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
37 #include <asm/head-64.h>
39 /* PACA save area offsets (exgen, exmc, etc) */
50 #if defined(CONFIG_RELOCATABLE)
52 #define EX_SIZE 10 /* size in u64 units */
54 #define EX_SIZE 9 /* size in u64 units */
58 * EX_LR is only used in EXSLB and where it does not overlap with EX_DAR
59 * EX_CCR similarly with DSISR, but being 4 byte registers there is a hole
60 * in the save area so it's not necessary to overlap them. Could be used
61 * for future savings though if another 4 byte register was to be saved.
66 * EX_R3 is only used by the bad_stack handler. bad_stack reloads and
67 * saves DAR from SPRN_DAR, and EX_DAR is not used. So EX_R3 can overlap
72 #define STF_ENTRY_BARRIER_SLOT \
73 STF_ENTRY_BARRIER_FIXUP_SECTION; \
78 #define STF_EXIT_BARRIER_SLOT \
79 STF_EXIT_BARRIER_FIXUP_SECTION; \
87 #define ENTRY_FLUSH_SLOT \
88 ENTRY_FLUSH_FIXUP_SECTION; \
94 * r10 must be free to use, r13 must be paca
96 #define INTERRUPT_TO_KERNEL \
97 STF_ENTRY_BARRIER_SLOT; \
101 * Macros for annotating the expected destination of (h)rfid
103 * The nop instructions allow us to insert one or more instructions to flush the
104 * L1-D cache when returning to userspace or a guest.
106 #define RFI_FLUSH_SLOT \
107 RFI_FLUSH_FIXUP_SECTION; \
112 #define RFI_TO_KERNEL \
115 #define RFI_TO_USER \
116 STF_EXIT_BARRIER_SLOT; \
121 #define RFI_TO_USER_OR_KERNEL \
122 STF_EXIT_BARRIER_SLOT; \
127 #define RFI_TO_GUEST \
128 STF_EXIT_BARRIER_SLOT; \
133 #define HRFI_TO_KERNEL \
136 #define HRFI_TO_USER \
137 STF_EXIT_BARRIER_SLOT; \
140 b hrfi_flush_fallback
142 #define HRFI_TO_USER_OR_KERNEL \
143 STF_EXIT_BARRIER_SLOT; \
146 b hrfi_flush_fallback
148 #define HRFI_TO_GUEST \
149 STF_EXIT_BARRIER_SLOT; \
152 b hrfi_flush_fallback
154 #define HRFI_TO_UNKNOWN \
155 STF_EXIT_BARRIER_SLOT; \
158 b hrfi_flush_fallback
160 #ifdef CONFIG_RELOCATABLE
161 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
162 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
163 LOAD_HANDLER(r12,label); \
165 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
167 mtmsrd r10,1; /* Set RI (EE=0) */ \
170 /* If not relocatable, we can jump directly -- and save messing with LR */
171 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
172 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
173 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
175 mtmsrd r10,1; /* Set RI (EE=0) */ \
178 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
179 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
182 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
183 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which
184 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
186 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
187 EXCEPTION_PROLOG_0(area); \
188 EXCEPTION_PROLOG_1(area, extra, vec); \
189 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
192 * We're short on space and time in the exception prolog, so we can't
193 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label.
194 * Instead we get the base of the kernel from paca->kernelbase and or in the low
195 * part of label. This requires that the label be within 64KB of kernelbase, and
196 * that kernelbase be 64K aligned.
198 #define LOAD_HANDLER(reg, label) \
199 ld reg,PACAKBASE(r13); /* get high part of &label */ \
200 ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label);
202 #define __LOAD_HANDLER(reg, label) \
203 ld reg,PACAKBASE(r13); \
204 ori reg,reg,(ABS_ADDR(label))@l;
207 * Branches from unrelocated code (e.g., interrupts) to labels outside
208 * head-y require >64K offsets.
210 #define __LOAD_FAR_HANDLER(reg, label) \
211 ld reg,PACAKBASE(r13); \
212 ori reg,reg,(ABS_ADDR(label))@l; \
213 addis reg,reg,(ABS_ADDR(label))@h;
215 /* Exception register prefixes */
219 #if defined(CONFIG_RELOCATABLE)
221 * If we support interrupts with relocation on AND we're a relocatable kernel,
222 * we need to use CTR to get to the 2nd level handler. So, save/restore it
225 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13)
226 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13)
227 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg
229 /* ...else CTR is unused and in register. */
230 #define SAVE_CTR(reg, area)
231 #define GET_CTR(reg, area) mfctr reg
232 #define RESTORE_CTR(reg, area)
236 * PPR save/restore macros used in exceptions_64s.S
237 * Used for P7 or later processors
239 #define SAVE_PPR(area, ra, rb) \
240 BEGIN_FTR_SECTION_NESTED(940) \
241 ld ra,PACACURRENT(r13); \
242 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \
243 std rb,TASKTHREADPPR(ra); \
244 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
246 #define RESTORE_PPR_PACA(area, ra) \
247 BEGIN_FTR_SECTION_NESTED(941) \
248 ld ra,area+EX_PPR(r13); \
250 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
253 * Get an SPR into a register if the CPU has the given feature
255 #define OPT_GET_SPR(ra, spr, ftr) \
256 BEGIN_FTR_SECTION_NESTED(943) \
258 END_FTR_SECTION_NESTED(ftr,ftr,943)
261 * Set an SPR from a register if the CPU has the given feature
263 #define OPT_SET_SPR(ra, spr, ftr) \
264 BEGIN_FTR_SECTION_NESTED(943) \
266 END_FTR_SECTION_NESTED(ftr,ftr,943)
269 * Save a register to the PACA if the CPU has the given feature
271 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \
272 BEGIN_FTR_SECTION_NESTED(943) \
273 std ra,offset(r13); \
274 END_FTR_SECTION_NESTED(ftr,ftr,943)
276 #define EXCEPTION_PROLOG_0(area) \
278 std r9,area+EX_R9(r13); /* save r9 */ \
279 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \
281 std r10,area+EX_R10(r13); /* save r10 - r12 */ \
282 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
284 #define __EXCEPTION_PROLOG_1(area, extra, vec) \
285 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \
286 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
287 INTERRUPT_TO_KERNEL; \
288 SAVE_CTR(r10, area); \
291 std r11,area+EX_R11(r13); \
292 std r12,area+EX_R12(r13); \
294 std r10,area+EX_R13(r13)
295 #define EXCEPTION_PROLOG_1(area, extra, vec) \
296 __EXCEPTION_PROLOG_1(area, extra, vec)
298 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
299 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
300 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
301 LOAD_HANDLER(r12,label) \
302 mtspr SPRN_##h##SRR0,r12; \
303 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
304 mtspr SPRN_##h##SRR1,r10; \
306 b . /* prevent speculative execution */
307 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \
308 __EXCEPTION_PROLOG_PSERIES_1(label, h)
310 /* _NORI variant keeps MSR_RI clear */
311 #define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \
312 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
313 xori r10,r10,MSR_RI; /* Clear MSR_RI */ \
314 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
315 LOAD_HANDLER(r12,label) \
316 mtspr SPRN_##h##SRR0,r12; \
317 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
318 mtspr SPRN_##h##SRR1,r10; \
320 b . /* prevent speculative execution */
322 #define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \
323 __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h)
325 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
326 EXCEPTION_PROLOG_0(area); \
327 EXCEPTION_PROLOG_1(area, extra, vec); \
328 EXCEPTION_PROLOG_PSERIES_1(label, h);
330 #define __KVMTEST(h, n) \
331 lbz r10,HSTATE_IN_GUEST(r13); \
335 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
337 * If hv is possible, interrupts come into to the hv version
338 * of the kvmppc_interrupt code, which then jumps to the PR handler,
339 * kvmppc_interrupt_pr, if the guest is a PR guest.
341 #define kvmppc_interrupt kvmppc_interrupt_hv
343 #define kvmppc_interrupt kvmppc_interrupt_pr
347 * Branch to label using its 0xC000 address. This results in instruction
348 * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned
349 * on using mtmsr rather than rfid.
351 * This could set the 0xc bits for !RELOCATABLE as an immediate, rather than
352 * load KBASE for a slight optimisation.
354 #define BRANCH_TO_C000(reg, label) \
355 __LOAD_HANDLER(reg, label); \
359 #ifdef CONFIG_RELOCATABLE
360 #define BRANCH_TO_COMMON(reg, label) \
361 __LOAD_HANDLER(reg, label); \
365 #define BRANCH_LINK_TO_FAR(label) \
366 __LOAD_FAR_HANDLER(r12, label); \
371 * KVM requires __LOAD_FAR_HANDLER.
373 * __BRANCH_TO_KVM_EXIT branches are also a special case because they
374 * explicitly use r9 then reload it from PACA before branching. Hence
375 * the double-underscore.
377 #define __BRANCH_TO_KVM_EXIT(area, label) \
379 std r9,HSTATE_SCRATCH1(r13); \
380 __LOAD_FAR_HANDLER(r9, label); \
382 ld r9,area+EX_R9(r13); \
386 #define BRANCH_TO_COMMON(reg, label) \
389 #define BRANCH_LINK_TO_FAR(label) \
392 #define __BRANCH_TO_KVM_EXIT(area, label) \
393 ld r9,area+EX_R9(r13); \
398 /* Do not enable RI */
399 #define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \
400 EXCEPTION_PROLOG_0(area); \
401 EXCEPTION_PROLOG_1(area, extra, vec); \
402 EXCEPTION_PROLOG_PSERIES_1_NORI(label, h);
405 #define __KVM_HANDLER(area, h, n) \
406 BEGIN_FTR_SECTION_NESTED(947) \
407 ld r10,area+EX_CFAR(r13); \
408 std r10,HSTATE_CFAR(r13); \
409 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \
410 BEGIN_FTR_SECTION_NESTED(948) \
411 ld r10,area+EX_PPR(r13); \
412 std r10,HSTATE_PPR(r13); \
413 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
414 ld r10,area+EX_R10(r13); \
415 std r12,HSTATE_SCRATCH0(r13); \
418 /* This reloads r9 before branching to kvmppc_interrupt */ \
419 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt)
421 #define __KVM_HANDLER_SKIP(area, h, n) \
422 cmpwi r10,KVM_GUEST_MODE_SKIP; \
424 BEGIN_FTR_SECTION_NESTED(948) \
425 ld r10,area+EX_PPR(r13); \
426 std r10,HSTATE_PPR(r13); \
427 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
428 ld r10,area+EX_R10(r13); \
429 std r12,HSTATE_SCRATCH0(r13); \
432 /* This reloads r9 before branching to kvmppc_interrupt */ \
433 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \
434 89: mtocrf 0x80,r9; \
435 ld r9,area+EX_R9(r13); \
436 ld r10,area+EX_R10(r13); \
437 b kvmppc_skip_##h##interrupt
439 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
440 #define KVMTEST(h, n) __KVMTEST(h, n)
441 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
442 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
445 #define KVMTEST(h, n)
446 #define KVM_HANDLER(area, h, n)
447 #define KVM_HANDLER_SKIP(area, h, n)
452 #define EXCEPTION_PROLOG_COMMON_1() \
453 std r9,_CCR(r1); /* save CR in stackframe */ \
454 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
455 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
456 std r10,0(r1); /* make stack chain pointer */ \
457 std r0,GPR0(r1); /* save r0 in stackframe */ \
458 std r10,GPR1(r1); /* save r1 in stackframe */ \
462 * The common exception prolog is used for all except a few exceptions
463 * such as a segment miss on a kernel address. We have to be prepared
464 * to take another exception from the point where we first touch the
465 * kernel stack onwards.
467 * On entry r13 points to the paca, r9-r13 are saved in the paca,
468 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
469 * SRR1, and relocation is on.
471 #define EXCEPTION_PROLOG_COMMON(n, area) \
472 andi. r10,r12,MSR_PR; /* See if coming from user */ \
473 mr r10,r1; /* Save r1 */ \
474 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
476 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
477 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \
478 blt+ cr1,3f; /* abort if it is */ \
479 li r1,(n); /* will be reloaded later */ \
480 sth r1,PACA_TRAP_SAVE(r13); \
481 std r3,area+EX_R3(r13); \
482 addi r3,r13,area; /* r3 -> where regs are saved*/ \
483 RESTORE_CTR(r1, area); \
485 3: EXCEPTION_PROLOG_COMMON_1(); \
486 beq 4f; /* if from kernel mode */ \
487 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \
488 SAVE_PPR(area, r9, r10); \
489 4: EXCEPTION_PROLOG_COMMON_2(area) \
490 EXCEPTION_PROLOG_COMMON_3(n) \
493 /* Save original regs values from save area to stack frame. */
494 #define EXCEPTION_PROLOG_COMMON_2(area) \
495 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
496 ld r10,area+EX_R10(r13); \
499 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
500 ld r10,area+EX_R12(r13); \
501 ld r11,area+EX_R13(r13); \
505 BEGIN_FTR_SECTION_NESTED(66); \
506 ld r10,area+EX_CFAR(r13); \
507 std r10,ORIG_GPR3(r1); \
508 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
509 GET_CTR(r10, area); \
512 #define EXCEPTION_PROLOG_COMMON_3(n) \
513 std r2,GPR2(r1); /* save r2 in stackframe */ \
514 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
515 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
516 mflr r9; /* Get LR, later save to stack */ \
517 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
519 lbz r10,PACASOFTIRQEN(r13); \
520 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
524 std r9,_TRAP(r1); /* set trap number */ \
526 ld r11,exception_marker@toc(r2); \
527 std r10,RESULT(r1); /* clear regs->result */ \
528 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */
533 #define STD_EXCEPTION_PSERIES(vec, label) \
534 SET_SCRATCH0(r13); /* save r13 */ \
535 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \
536 EXC_STD, KVMTEST_PR, vec); \
538 /* Version of above for when we have to branch out-of-line */
539 #define __OOL_EXCEPTION(vec, label, hdlr) \
541 EXCEPTION_PROLOG_0(PACA_EXGEN) \
544 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \
545 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
546 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD)
548 #define STD_EXCEPTION_HV(loc, vec, label) \
549 SET_SCRATCH0(r13); /* save r13 */ \
550 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \
551 EXC_HV, KVMTEST_HV, vec);
553 #define STD_EXCEPTION_HV_OOL(vec, label) \
554 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
555 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV)
557 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
558 /* No guest interrupts come through here */ \
559 SET_SCRATCH0(r13); /* save r13 */ \
560 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec);
562 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \
563 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
564 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD)
566 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \
567 SET_SCRATCH0(r13); /* save r13 */ \
568 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \
569 EXC_HV, KVMTEST_HV, vec);
571 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
572 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
573 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV)
575 /* This associate vector numbers with bits in paca->irq_happened */
576 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE
577 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
578 #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC
579 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL
580 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
581 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI
582 #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE
584 #define __SOFTEN_TEST(h, vec) \
585 lbz r10,PACASOFTIRQEN(r13); \
587 li r10,SOFTEN_VALUE_##vec; \
588 beq masked_##h##interrupt
590 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
592 #define SOFTEN_TEST_PR(vec) \
593 KVMTEST(EXC_STD, vec); \
594 _SOFTEN_TEST(EXC_STD, vec)
596 #define SOFTEN_TEST_HV(vec) \
597 KVMTEST(EXC_HV, vec); \
598 _SOFTEN_TEST(EXC_HV, vec)
600 #define KVMTEST_PR(vec) \
601 KVMTEST(EXC_STD, vec)
603 #define KVMTEST_HV(vec) \
606 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec)
607 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec)
609 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
610 SET_SCRATCH0(r13); /* save r13 */ \
611 EXCEPTION_PROLOG_0(PACA_EXGEN); \
612 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
613 EXCEPTION_PROLOG_PSERIES_1(label, h);
615 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
616 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
618 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
619 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
620 EXC_STD, SOFTEN_TEST_PR)
622 #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \
623 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \
624 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD)
626 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \
627 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
628 EXC_HV, SOFTEN_TEST_HV)
630 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \
631 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \
632 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV)
634 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
635 SET_SCRATCH0(r13); /* save r13 */ \
636 EXCEPTION_PROLOG_0(PACA_EXGEN); \
637 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
638 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
640 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
641 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)
643 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \
644 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
645 EXC_STD, SOFTEN_NOTEST_PR)
647 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \
648 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
649 EXC_HV, SOFTEN_TEST_HV)
651 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \
652 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \
653 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV)
655 #define MASKABLE_RELON_EXCEPTION_PSERIES_OOL(vec, label) \
656 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec); \
657 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD)
660 * Our exception common code can be passed various "additions"
661 * to specify the behaviour of interrupts, whether to kick the
666 * This addition reconciles our actual IRQ state with the various software
667 * flags that track it. This may call C code.
669 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11)
674 #define RUNLATCH_ON \
676 CURRENT_THREAD_INFO(r3, r1); \
677 ld r4,TI_LOCAL_FLAGS(r3); \
678 andi. r0,r4,_TLF_RUNLATCH; \
679 beql ppc64_runlatch_on_trampoline; \
680 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
682 #define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \
683 EXCEPTION_PROLOG_COMMON(trap, area); \
684 /* Volatile regs are potentially clobbered here */ \
686 addi r3,r1,STACK_FRAME_OVERHEAD; \
691 * Exception where stack is already set in r1, r1 is saved in r10, and it
692 * continues rather than returns.
694 #define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \
695 EXCEPTION_PROLOG_COMMON_1(); \
696 EXCEPTION_PROLOG_COMMON_2(area); \
697 EXCEPTION_PROLOG_COMMON_3(trap); \
698 /* Volatile regs are potentially clobbered here */ \
700 addi r3,r1,STACK_FRAME_OVERHEAD; \
703 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
704 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \
705 ret_from_except, ADD_NVGPRS;ADD_RECONCILE)
708 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
709 * in the idle task and therefore need the special idle handling
710 * (finish nap and runlatch)
712 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
713 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \
714 ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON)
717 * When the idle code in power4_idle puts the CPU into NAP mode,
718 * it has to do so in a loop, and relies on the external interrupt
719 * and decrementer interrupt entry code to get it out of the loop.
720 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
721 * to signal that it is in the loop and needs help to get out.
723 #ifdef CONFIG_PPC_970_NAP
726 CURRENT_THREAD_INFO(r11, r1); \
727 ld r9,TI_LOCAL_FLAGS(r11); \
728 andi. r10,r9,_TLF_NAPPING; \
729 bnel power4_fixup_nap; \
730 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
735 #endif /* _ASM_POWERPC_EXCEPTION_H */