1 #ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
2 #define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
5 * Common bits between hash and Radix page table
7 #define _PAGE_BIT_SWAP_TYPE 0
11 #define _PAGE_EXEC 0x00001 /* execute permission */
12 #define _PAGE_WRITE 0x00002 /* write access allowed */
13 #define _PAGE_READ 0x00004 /* read access allowed */
14 #define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
15 #define _PAGE_RWX (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)
16 #define _PAGE_PRIVILEGED 0x00008 /* kernel access only */
17 #define _PAGE_SAO 0x00010 /* Strong access order */
18 #define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */
19 #define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
20 #define _PAGE_DIRTY 0x00080 /* C: page changed */
21 #define _PAGE_ACCESSED 0x00100 /* R: page referenced */
25 #define _RPAGE_SW0 0x2000000000000000UL
26 #define _RPAGE_SW1 0x00800
27 #define _RPAGE_SW2 0x00400
28 #define _RPAGE_SW3 0x00200
29 #ifdef CONFIG_MEM_SOFT_DIRTY
30 #define _PAGE_SOFT_DIRTY _RPAGE_SW3 /* software: software dirty tracking */
32 #define _PAGE_SOFT_DIRTY 0x00000
34 #define _PAGE_SPECIAL _RPAGE_SW2 /* software: special page */
37 #define _PAGE_PTE (1ul << 62) /* distinguishes PTEs from pointers */
38 #define _PAGE_PRESENT (1ul << 63) /* pte contains a translation */
40 * Drivers request for cache inhibited pte mapping using _PAGE_NO_CACHE
41 * Instead of fixing all of them, add an alternate define which
42 * maps CI pte mapping.
44 #define _PAGE_NO_CACHE _PAGE_TOLERANT
46 * We support 57 bit real address in pte. Clear everything above 57, and
47 * every thing below PAGE_SHIFT;
49 #define PTE_RPN_MASK (((1UL << 57) - 1) & (PAGE_MASK))
51 * set of bits not changed in pmd_modify. Even though we have hash specific bits
52 * in here, on radix we expect them to be zero.
54 #define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
55 _PAGE_ACCESSED | H_PAGE_THP_HUGE | _PAGE_PTE | \
58 * user access blocked by key
60 #define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY)
61 #define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_READ)
62 #define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | \
63 _PAGE_RW | _PAGE_EXEC)
65 * No page size encoding in the linux PTE
69 * _PAGE_CHG_MASK masks of bits that are to be preserved across
72 #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
73 _PAGE_ACCESSED | _PAGE_SPECIAL | _PAGE_PTE | \
76 * Mask of bits returned by pte_pgprot()
78 #define PAGE_PROT_BITS (_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT | \
79 H_PAGE_4K_PFN | _PAGE_PRIVILEGED | _PAGE_ACCESSED | \
80 _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_EXEC | \
83 * We define 2 sets of base prot bits, one for basic pages (ie,
84 * cacheable kernel and user pages) and one for non cacheable
85 * pages. We always set _PAGE_COHERENT when SMP is enabled or
86 * the processor might need it for DMA coherency.
88 #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
89 #define _PAGE_BASE (_PAGE_BASE_NC)
91 /* Permission masks used to generate the __P and __S table,
93 * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
95 * Write permissions imply read permissions for now (we could make write-only
96 * pages on BookE but we don't bother for now). Execute permission control is
97 * possible on platforms that define _PAGE_EXEC
99 * Note due to the way vm flags are laid out, the bits are XWR
101 #define PAGE_NONE __pgprot(_PAGE_BASE | _PAGE_PRIVILEGED)
102 #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW)
103 #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_EXEC)
104 #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_READ)
105 #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
106 #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_READ)
107 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
109 #define __P000 PAGE_NONE
110 #define __P001 PAGE_READONLY
111 #define __P010 PAGE_COPY
112 #define __P011 PAGE_COPY
113 #define __P100 PAGE_READONLY_X
114 #define __P101 PAGE_READONLY_X
115 #define __P110 PAGE_COPY_X
116 #define __P111 PAGE_COPY_X
118 #define __S000 PAGE_NONE
119 #define __S001 PAGE_READONLY
120 #define __S010 PAGE_SHARED
121 #define __S011 PAGE_SHARED
122 #define __S100 PAGE_READONLY_X
123 #define __S101 PAGE_READONLY_X
124 #define __S110 PAGE_SHARED_X
125 #define __S111 PAGE_SHARED_X
127 /* Permission masks used for kernel mappings */
128 #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
129 #define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
131 #define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
132 _PAGE_NON_IDEMPOTENT)
133 #define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
134 #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
135 #define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
138 * Protection used for kernel text. We want the debuggers to be able to
139 * set breakpoints anywhere, so don't write protect the kernel text
140 * on platforms where such control is possible.
142 #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) || \
143 defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
144 #define PAGE_KERNEL_TEXT PAGE_KERNEL_X
146 #define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
149 /* Make modules code happy. We don't set RO yet */
150 #define PAGE_KERNEL_EXEC PAGE_KERNEL_X
151 #define PAGE_AGP (PAGE_KERNEL_NC)
157 extern unsigned long __pte_index_size;
158 extern unsigned long __pmd_index_size;
159 extern unsigned long __pud_index_size;
160 extern unsigned long __pgd_index_size;
161 extern unsigned long __pmd_cache_index;
162 #define PTE_INDEX_SIZE __pte_index_size
163 #define PMD_INDEX_SIZE __pmd_index_size
164 #define PUD_INDEX_SIZE __pud_index_size
165 #define PGD_INDEX_SIZE __pgd_index_size
166 #define PMD_CACHE_INDEX __pmd_cache_index
168 * Because of use of pte fragments and THP, size of page table
169 * are not always derived out of index size above.
171 extern unsigned long __pte_table_size;
172 extern unsigned long __pmd_table_size;
173 extern unsigned long __pud_table_size;
174 extern unsigned long __pgd_table_size;
175 #define PTE_TABLE_SIZE __pte_table_size
176 #define PMD_TABLE_SIZE __pmd_table_size
177 #define PUD_TABLE_SIZE __pud_table_size
178 #define PGD_TABLE_SIZE __pgd_table_size
180 extern unsigned long __pmd_val_bits;
181 extern unsigned long __pud_val_bits;
182 extern unsigned long __pgd_val_bits;
183 #define PMD_VAL_BITS __pmd_val_bits
184 #define PUD_VAL_BITS __pud_val_bits
185 #define PGD_VAL_BITS __pgd_val_bits
187 extern unsigned long __pte_frag_nr;
188 #define PTE_FRAG_NR __pte_frag_nr
189 extern unsigned long __pte_frag_size_shift;
190 #define PTE_FRAG_SIZE_SHIFT __pte_frag_size_shift
191 #define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
193 * Pgtable size used by swapper, init in asm code
195 #define MAX_PGD_TABLE_SIZE (sizeof(pgd_t) << RADIX_PGD_INDEX_SIZE)
197 #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
198 #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
199 #define PTRS_PER_PUD (1 << PUD_INDEX_SIZE)
200 #define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
202 /* PMD_SHIFT determines what a second-level page table entry can map */
203 #define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE)
204 #define PMD_SIZE (1UL << PMD_SHIFT)
205 #define PMD_MASK (~(PMD_SIZE-1))
207 /* PUD_SHIFT determines what a third-level page table entry can map */
208 #define PUD_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE)
209 #define PUD_SIZE (1UL << PUD_SHIFT)
210 #define PUD_MASK (~(PUD_SIZE-1))
212 /* PGDIR_SHIFT determines what a fourth-level page table entry can map */
213 #define PGDIR_SHIFT (PUD_SHIFT + PUD_INDEX_SIZE)
214 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
215 #define PGDIR_MASK (~(PGDIR_SIZE-1))
217 /* Bits to mask out from a PMD to get to the PTE page */
218 #define PMD_MASKED_BITS 0xc0000000000000ffUL
219 /* Bits to mask out from a PUD to get to the PMD page */
220 #define PUD_MASKED_BITS 0xc0000000000000ffUL
221 /* Bits to mask out from a PGD to get to the PUD page */
222 #define PGD_MASKED_BITS 0xc0000000000000ffUL
224 extern unsigned long __vmalloc_start;
225 extern unsigned long __vmalloc_end;
226 #define VMALLOC_START __vmalloc_start
227 #define VMALLOC_END __vmalloc_end
229 extern unsigned long __kernel_virt_start;
230 extern unsigned long __kernel_virt_size;
231 #define KERN_VIRT_START __kernel_virt_start
232 #define KERN_VIRT_SIZE __kernel_virt_size
233 extern struct page *vmemmap;
234 extern unsigned long ioremap_bot;
235 extern unsigned long pci_io_base;
236 #endif /* __ASSEMBLY__ */
238 #include <asm/book3s/64/hash.h>
239 #include <asm/book3s/64/radix.h>
241 #ifdef CONFIG_PPC_64K_PAGES
242 #include <asm/book3s/64/pgtable-64k.h>
244 #include <asm/book3s/64/pgtable-4k.h>
247 #include <asm/barrier.h>
249 * The second half of the kernel virtual space is used for IO mappings,
250 * it's itself carved into the PIO region (ISA and PHB IO space) and
253 * ISA_IO_BASE = KERN_IO_START, 64K reserved area
254 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
255 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
257 #define KERN_IO_START (KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
258 #define FULL_IO_SIZE 0x80000000ul
259 #define ISA_IO_BASE (KERN_IO_START)
260 #define ISA_IO_END (KERN_IO_START + 0x10000ul)
261 #define PHB_IO_BASE (ISA_IO_END)
262 #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
263 #define IOREMAP_BASE (PHB_IO_END)
264 #define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE)
266 /* Advertise special mapping type for AGP */
267 #define HAVE_PAGE_AGP
269 /* Advertise support for _PAGE_SPECIAL */
270 #define __HAVE_ARCH_PTE_SPECIAL
275 * This is the default implementation of various PTE accessors, it's
276 * used in all cases except Book3S with 64K pages where we have a
277 * concept of sub-pages
281 #define __real_pte(e,p) ((real_pte_t){(e)})
282 #define __rpte_to_pte(r) ((r).pte)
283 #define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> H_PAGE_F_GIX_SHIFT)
285 #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
288 shift = mmu_psize_defs[psize].shift; \
290 #define pte_iterate_hashed_end() } while(0)
293 * We expect this to be called only for user addresses or kernel virtual
294 * addresses other than the linear mapping.
296 #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
298 #endif /* __real_pte */
300 static inline unsigned long pte_update(struct mm_struct *mm, unsigned long addr,
301 pte_t *ptep, unsigned long clr,
302 unsigned long set, int huge)
305 return radix__pte_update(mm, addr, ptep, clr, set, huge);
306 return hash__pte_update(mm, addr, ptep, clr, set, huge);
309 * For hash even if we have _PAGE_ACCESSED = 0, we do a pte_update.
310 * We currently remove entries from the hashtable regardless of whether
311 * the entry was young or dirty.
313 * We should be more intelligent about this but for the moment we override
314 * these functions and force a tlb flush unconditionally
315 * For radix: H_PAGE_HASHPTE should be zero. Hence we can use the same
316 * function for both hash and radix.
318 static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
319 unsigned long addr, pte_t *ptep)
323 if ((pte_raw(*ptep) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
325 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
326 return (old & _PAGE_ACCESSED) != 0;
329 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
330 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \
333 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
337 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
338 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
341 if ((pte_raw(*ptep) & cpu_to_be64(_PAGE_WRITE)) == 0)
344 pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 0);
347 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
348 unsigned long addr, pte_t *ptep)
350 if ((pte_raw(*ptep) & cpu_to_be64(_PAGE_WRITE)) == 0)
353 pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 1);
356 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
357 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
358 unsigned long addr, pte_t *ptep)
360 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
364 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
367 pte_update(mm, addr, ptep, ~0UL, 0, 0);
370 static inline int pte_write(pte_t pte)
372 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_WRITE));
375 static inline int pte_dirty(pte_t pte)
377 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_DIRTY));
380 static inline int pte_young(pte_t pte)
382 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_ACCESSED));
385 static inline int pte_special(pte_t pte)
387 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SPECIAL));
390 static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
392 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
393 static inline bool pte_soft_dirty(pte_t pte)
395 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SOFT_DIRTY));
398 static inline pte_t pte_mksoft_dirty(pte_t pte)
400 return __pte(pte_val(pte) | _PAGE_SOFT_DIRTY);
403 static inline pte_t pte_clear_soft_dirty(pte_t pte)
405 return __pte(pte_val(pte) & ~_PAGE_SOFT_DIRTY);
407 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
409 #ifdef CONFIG_NUMA_BALANCING
411 * These work without NUMA balancing but the kernel does not care. See the
412 * comment in include/asm-generic/pgtable.h . On powerpc, this will only
413 * work for user pages and always return true for kernel pages.
415 static inline int pte_protnone(pte_t pte)
417 return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED)) ==
418 cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED);
420 #endif /* CONFIG_NUMA_BALANCING */
422 static inline int pte_present(pte_t pte)
424 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT));
427 * Conversion functions: convert a page and protection to a page entry,
428 * and a page entry and page directory to the page they refer to.
430 * Even if PTEs can be unsigned long long, a PFN is always an unsigned
433 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
435 return __pte((((pte_basic_t)(pfn) << PAGE_SHIFT) & PTE_RPN_MASK) |
439 static inline unsigned long pte_pfn(pte_t pte)
441 return (pte_val(pte) & PTE_RPN_MASK) >> PAGE_SHIFT;
444 /* Generic modifiers for PTE bits */
445 static inline pte_t pte_wrprotect(pte_t pte)
447 return __pte(pte_val(pte) & ~_PAGE_WRITE);
450 static inline pte_t pte_mkclean(pte_t pte)
452 return __pte(pte_val(pte) & ~_PAGE_DIRTY);
455 static inline pte_t pte_mkold(pte_t pte)
457 return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
460 static inline pte_t pte_mkwrite(pte_t pte)
463 * write implies read, hence set both
465 return __pte(pte_val(pte) | _PAGE_RW);
468 static inline pte_t pte_mkdirty(pte_t pte)
470 return __pte(pte_val(pte) | _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
473 static inline pte_t pte_mkyoung(pte_t pte)
475 return __pte(pte_val(pte) | _PAGE_ACCESSED);
478 static inline pte_t pte_mkspecial(pte_t pte)
480 return __pte(pte_val(pte) | _PAGE_SPECIAL);
483 static inline pte_t pte_mkhuge(pte_t pte)
488 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
490 /* FIXME!! check whether this need to be a conditional */
491 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
494 static inline bool pte_user(pte_t pte)
496 return !(pte_raw(pte) & cpu_to_be64(_PAGE_PRIVILEGED));
499 /* Encode and de-code a swap entry */
500 #define MAX_SWAPFILES_CHECK() do { \
501 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
503 * Don't have overlapping bits with _PAGE_HPTEFLAGS \
504 * We filter HPTEFLAGS on set_pte. \
506 BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \
507 BUILD_BUG_ON(_PAGE_HPTEFLAGS & _PAGE_SWP_SOFT_DIRTY); \
510 * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT;
512 #define SWP_TYPE_BITS 5
513 #define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \
514 & ((1UL << SWP_TYPE_BITS) - 1))
515 #define __swp_offset(x) (((x).val & PTE_RPN_MASK) >> PAGE_SHIFT)
516 #define __swp_entry(type, offset) ((swp_entry_t) { \
517 ((type) << _PAGE_BIT_SWAP_TYPE) \
518 | (((offset) << PAGE_SHIFT) & PTE_RPN_MASK)})
520 * swp_entry_t must be independent of pte bits. We build a swp_entry_t from
521 * swap type and offset we get from swap and convert that to pte to find a
522 * matching pte in linux page table.
523 * Clear bits not found in swap entries here.
525 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) & ~_PAGE_PTE })
526 #define __swp_entry_to_pte(x) __pte((x).val | _PAGE_PTE)
528 #ifdef CONFIG_MEM_SOFT_DIRTY
529 #define _PAGE_SWP_SOFT_DIRTY (1UL << (SWP_TYPE_BITS + _PAGE_BIT_SWAP_TYPE))
531 #define _PAGE_SWP_SOFT_DIRTY 0UL
532 #endif /* CONFIG_MEM_SOFT_DIRTY */
534 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
535 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
537 return __pte(pte_val(pte) | _PAGE_SWP_SOFT_DIRTY);
540 static inline bool pte_swp_soft_dirty(pte_t pte)
542 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SWP_SOFT_DIRTY));
545 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
547 return __pte(pte_val(pte) & ~_PAGE_SWP_SOFT_DIRTY);
549 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
551 static inline bool check_pte_access(unsigned long access, unsigned long ptev)
554 * This check for _PAGE_RWX and _PAGE_PRESENT bits
559 * This check for access to privilege space
561 if ((access & _PAGE_PRIVILEGED) != (ptev & _PAGE_PRIVILEGED))
567 * Generic functions with hash/radix callbacks
570 static inline void __ptep_set_access_flags(struct mm_struct *mm,
571 pte_t *ptep, pte_t entry)
574 return radix__ptep_set_access_flags(mm, ptep, entry);
575 return hash__ptep_set_access_flags(ptep, entry);
578 #define __HAVE_ARCH_PTE_SAME
579 static inline int pte_same(pte_t pte_a, pte_t pte_b)
582 return radix__pte_same(pte_a, pte_b);
583 return hash__pte_same(pte_a, pte_b);
586 static inline int pte_none(pte_t pte)
589 return radix__pte_none(pte);
590 return hash__pte_none(pte);
593 static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
594 pte_t *ptep, pte_t pte, int percpu)
597 return radix__set_pte_at(mm, addr, ptep, pte, percpu);
598 return hash__set_pte_at(mm, addr, ptep, pte, percpu);
601 #define _PAGE_CACHE_CTL (_PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT)
603 #define pgprot_noncached pgprot_noncached
604 static inline pgprot_t pgprot_noncached(pgprot_t prot)
606 return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
607 _PAGE_NON_IDEMPOTENT);
610 #define pgprot_noncached_wc pgprot_noncached_wc
611 static inline pgprot_t pgprot_noncached_wc(pgprot_t prot)
613 return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
617 #define pgprot_cached pgprot_cached
618 static inline pgprot_t pgprot_cached(pgprot_t prot)
620 return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL));
623 #define pgprot_writecombine pgprot_writecombine
624 static inline pgprot_t pgprot_writecombine(pgprot_t prot)
626 return pgprot_noncached_wc(prot);
629 * check a pte mapping have cache inhibited property
631 static inline bool pte_ci(pte_t pte)
633 unsigned long pte_v = pte_val(pte);
635 if (((pte_v & _PAGE_CACHE_CTL) == _PAGE_TOLERANT) ||
636 ((pte_v & _PAGE_CACHE_CTL) == _PAGE_NON_IDEMPOTENT))
641 static inline void pmd_set(pmd_t *pmdp, unsigned long val)
646 static inline void pmd_clear(pmd_t *pmdp)
651 static inline int pmd_none(pmd_t pmd)
653 return !pmd_raw(pmd);
656 static inline int pmd_present(pmd_t pmd)
659 return !pmd_none(pmd);
662 static inline int pmd_bad(pmd_t pmd)
665 return radix__pmd_bad(pmd);
666 return hash__pmd_bad(pmd);
669 static inline void pud_set(pud_t *pudp, unsigned long val)
674 static inline void pud_clear(pud_t *pudp)
679 static inline int pud_none(pud_t pud)
681 return !pud_raw(pud);
684 static inline int pud_present(pud_t pud)
686 return !pud_none(pud);
689 extern struct page *pud_page(pud_t pud);
690 extern struct page *pmd_page(pmd_t pmd);
691 static inline pte_t pud_pte(pud_t pud)
693 return __pte_raw(pud_raw(pud));
696 static inline pud_t pte_pud(pte_t pte)
698 return __pud_raw(pte_raw(pte));
700 #define pud_write(pud) pte_write(pud_pte(pud))
702 static inline int pud_bad(pud_t pud)
705 return radix__pud_bad(pud);
706 return hash__pud_bad(pud);
710 #define pgd_write(pgd) pte_write(pgd_pte(pgd))
711 static inline void pgd_set(pgd_t *pgdp, unsigned long val)
716 static inline void pgd_clear(pgd_t *pgdp)
721 static inline int pgd_none(pgd_t pgd)
723 return !pgd_raw(pgd);
726 static inline int pgd_present(pgd_t pgd)
728 return !pgd_none(pgd);
731 static inline pte_t pgd_pte(pgd_t pgd)
733 return __pte_raw(pgd_raw(pgd));
736 static inline pgd_t pte_pgd(pte_t pte)
738 return __pgd_raw(pte_raw(pte));
741 static inline int pgd_bad(pgd_t pgd)
744 return radix__pgd_bad(pgd);
745 return hash__pgd_bad(pgd);
748 extern struct page *pgd_page(pgd_t pgd);
750 /* Pointers in the page table tree are physical addresses */
751 #define __pgtable_ptr_val(ptr) __pa(ptr)
753 #define pmd_page_vaddr(pmd) __va(pmd_val(pmd) & ~PMD_MASKED_BITS)
754 #define pud_page_vaddr(pud) __va(pud_val(pud) & ~PUD_MASKED_BITS)
755 #define pgd_page_vaddr(pgd) __va(pgd_val(pgd) & ~PGD_MASKED_BITS)
757 static inline unsigned long pgd_index(unsigned long address)
759 return (address >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1);
762 static inline unsigned long pud_index(unsigned long address)
764 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
767 static inline unsigned long pmd_index(unsigned long address)
769 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
772 static inline unsigned long pte_index(unsigned long address)
774 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
778 * Find an entry in a page-table-directory. We combine the address region
779 * (the high order N bits) and the pgd portion of the address.
782 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
784 #define pud_offset(pgdp, addr) \
785 (((pud_t *) pgd_page_vaddr(*(pgdp))) + pud_index(addr))
786 #define pmd_offset(pudp,addr) \
787 (((pmd_t *) pud_page_vaddr(*(pudp))) + pmd_index(addr))
788 #define pte_offset_kernel(dir,addr) \
789 (((pte_t *) pmd_page_vaddr(*(dir))) + pte_index(addr))
791 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
792 #define pte_unmap(pte) do { } while(0)
794 /* to find an entry in a kernel page-table-directory */
795 /* This now only contains the vmalloc pages */
796 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
798 #define pte_ERROR(e) \
799 pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
800 #define pmd_ERROR(e) \
801 pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
802 #define pud_ERROR(e) \
803 pr_err("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
804 #define pgd_ERROR(e) \
805 pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
807 void pgtable_cache_add(unsigned shift, void (*ctor)(void *));
808 void pgtable_cache_init(void);
810 static inline int map_kernel_page(unsigned long ea, unsigned long pa,
813 if (radix_enabled()) {
814 #if defined(CONFIG_PPC_RADIX_MMU) && defined(DEBUG_VM)
815 unsigned long page_size = 1 << mmu_psize_defs[mmu_io_psize].shift;
816 WARN((page_size != PAGE_SIZE), "I/O page size != PAGE_SIZE");
818 return radix__map_kernel_page(ea, pa, __pgprot(flags), PAGE_SIZE);
820 return hash__map_kernel_page(ea, pa, flags);
823 static inline int __meminit vmemmap_create_mapping(unsigned long start,
824 unsigned long page_size,
828 return radix__vmemmap_create_mapping(start, page_size, phys);
829 return hash__vmemmap_create_mapping(start, page_size, phys);
832 #ifdef CONFIG_MEMORY_HOTPLUG
833 static inline void vmemmap_remove_mapping(unsigned long start,
834 unsigned long page_size)
837 return radix__vmemmap_remove_mapping(start, page_size);
838 return hash__vmemmap_remove_mapping(start, page_size);
841 struct page *realmode_pfn_to_page(unsigned long pfn);
843 static inline pte_t pmd_pte(pmd_t pmd)
845 return __pte_raw(pmd_raw(pmd));
848 static inline pmd_t pte_pmd(pte_t pte)
850 return __pmd_raw(pte_raw(pte));
853 static inline pte_t *pmdp_ptep(pmd_t *pmd)
857 #define pmd_pfn(pmd) pte_pfn(pmd_pte(pmd))
858 #define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
859 #define pmd_young(pmd) pte_young(pmd_pte(pmd))
860 #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
861 #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
862 #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
863 #define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
864 #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
865 #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
867 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
868 #define pmd_soft_dirty(pmd) pte_soft_dirty(pmd_pte(pmd))
869 #define pmd_mksoft_dirty(pmd) pte_pmd(pte_mksoft_dirty(pmd_pte(pmd)))
870 #define pmd_clear_soft_dirty(pmd) pte_pmd(pte_clear_soft_dirty(pmd_pte(pmd)))
871 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
873 #ifdef CONFIG_NUMA_BALANCING
874 static inline int pmd_protnone(pmd_t pmd)
876 return pte_protnone(pmd_pte(pmd));
878 #endif /* CONFIG_NUMA_BALANCING */
880 #define __HAVE_ARCH_PMD_WRITE
881 #define pmd_write(pmd) pte_write(pmd_pte(pmd))
883 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
884 extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
885 extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot);
886 extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
887 extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
888 pmd_t *pmdp, pmd_t pmd);
889 extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
891 extern int hash__has_transparent_hugepage(void);
892 static inline int has_transparent_hugepage(void)
895 return radix__has_transparent_hugepage();
896 return hash__has_transparent_hugepage();
898 #define has_transparent_hugepage has_transparent_hugepage
900 static inline unsigned long
901 pmd_hugepage_update(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp,
902 unsigned long clr, unsigned long set)
905 return radix__pmd_hugepage_update(mm, addr, pmdp, clr, set);
906 return hash__pmd_hugepage_update(mm, addr, pmdp, clr, set);
909 static inline int pmd_large(pmd_t pmd)
911 return !!(pmd_raw(pmd) & cpu_to_be64(_PAGE_PTE));
914 static inline pmd_t pmd_mknotpresent(pmd_t pmd)
916 return __pmd(pmd_val(pmd) & ~_PAGE_PRESENT);
919 * For radix we should always find H_PAGE_HASHPTE zero. Hence
920 * the below will work for radix too
922 static inline int __pmdp_test_and_clear_young(struct mm_struct *mm,
923 unsigned long addr, pmd_t *pmdp)
927 if ((pmd_raw(*pmdp) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
929 old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED, 0);
930 return ((old & _PAGE_ACCESSED) != 0);
933 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
934 static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr,
938 if ((pmd_raw(*pmdp) & cpu_to_be64(_PAGE_WRITE)) == 0)
941 pmd_hugepage_update(mm, addr, pmdp, _PAGE_WRITE, 0);
944 static inline int pmd_trans_huge(pmd_t pmd)
947 return radix__pmd_trans_huge(pmd);
948 return hash__pmd_trans_huge(pmd);
951 #define __HAVE_ARCH_PMD_SAME
952 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
955 return radix__pmd_same(pmd_a, pmd_b);
956 return hash__pmd_same(pmd_a, pmd_b);
959 static inline pmd_t pmd_mkhuge(pmd_t pmd)
962 return radix__pmd_mkhuge(pmd);
963 return hash__pmd_mkhuge(pmd);
966 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
967 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
968 unsigned long address, pmd_t *pmdp,
969 pmd_t entry, int dirty);
971 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
972 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
973 unsigned long address, pmd_t *pmdp);
975 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
976 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
977 unsigned long addr, pmd_t *pmdp)
980 return radix__pmdp_huge_get_and_clear(mm, addr, pmdp);
981 return hash__pmdp_huge_get_and_clear(mm, addr, pmdp);
984 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
985 unsigned long address, pmd_t *pmdp)
988 return radix__pmdp_collapse_flush(vma, address, pmdp);
989 return hash__pmdp_collapse_flush(vma, address, pmdp);
991 #define pmdp_collapse_flush pmdp_collapse_flush
993 #define __HAVE_ARCH_PGTABLE_DEPOSIT
994 static inline void pgtable_trans_huge_deposit(struct mm_struct *mm,
995 pmd_t *pmdp, pgtable_t pgtable)
998 return radix__pgtable_trans_huge_deposit(mm, pmdp, pgtable);
999 return hash__pgtable_trans_huge_deposit(mm, pmdp, pgtable);
1002 #define __HAVE_ARCH_PGTABLE_WITHDRAW
1003 static inline pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm,
1006 if (radix_enabled())
1007 return radix__pgtable_trans_huge_withdraw(mm, pmdp);
1008 return hash__pgtable_trans_huge_withdraw(mm, pmdp);
1011 #define __HAVE_ARCH_PMDP_INVALIDATE
1012 extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
1015 #define __HAVE_ARCH_PMDP_HUGE_SPLIT_PREPARE
1016 static inline void pmdp_huge_split_prepare(struct vm_area_struct *vma,
1017 unsigned long address, pmd_t *pmdp)
1019 if (radix_enabled())
1020 return radix__pmdp_huge_split_prepare(vma, address, pmdp);
1021 return hash__pmdp_huge_split_prepare(vma, address, pmdp);
1024 #define pmd_move_must_withdraw pmd_move_must_withdraw
1026 static inline int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
1027 struct spinlock *old_pmd_ptl)
1029 if (radix_enabled())
1032 * Archs like ppc64 use pgtable to store per pmd
1033 * specific information. So when we switch the pmd,
1034 * we should also withdraw and deposit the pgtable
1038 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1039 #endif /* __ASSEMBLY__ */
1040 #endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */