1 # SPDX-License-Identifier: GPL-2.0
3 menu "Accelerated Cryptographic Algorithms for CPU (powerpc)"
5 config CRYPTO_CRC32C_VPMSUM
7 depends on PPC64 && ALTIVEC
11 CRC32c CRC algorithm with the iSCSI polynomial (RFC 3385 and RFC 3720)
13 Architecture: powerpc64 using
16 Enable on POWER8 and newer processors for improved performance.
18 config CRYPTO_CRCT10DIF_VPMSUM
19 tristate "CRC32T10DIF"
20 depends on PPC64 && ALTIVEC && CRC_T10DIF
23 CRC16 CRC algorithm used for the T10 (SCSI) Data Integrity Field (DIF)
25 Architecture: powerpc64 using
28 Enable on POWER8 and newer processors for improved performance.
30 config CRYPTO_VPMSUM_TESTER
31 tristate "CRC32c and CRC32T10DIF hardware acceleration tester"
32 depends on CRYPTO_CRCT10DIF_VPMSUM && CRYPTO_CRC32C_VPMSUM
34 Stress test for CRC32c and CRCT10DIF algorithms implemented with
35 powerpc64 AltiVec extensions (POWER8 vpmsum instructions).
36 Unless you are testing these algorithms, you don't need this.
39 tristate "Digests: MD5"
43 MD5 message digest algorithm (RFC1321)
47 config CRYPTO_SHA1_PPC
48 tristate "Hash functions: SHA-1"
51 SHA-1 secure hash algorithm (FIPS 180)
55 config CRYPTO_SHA1_PPC_SPE
56 tristate "Hash functions: SHA-1 (SPE)"
59 SHA-1 secure hash algorithm (FIPS 180)
61 Architecture: powerpc using
62 - SPE (Signal Processing Engine) extensions
64 config CRYPTO_SHA256_PPC_SPE
65 tristate "Hash functions: SHA-224 and SHA-256 (SPE)"
70 SHA-224 and SHA-256 secure hash algorithms (FIPS 180)
72 Architecture: powerpc using
73 - SPE (Signal Processing Engine) extensions
75 config CRYPTO_AES_PPC_SPE
76 tristate "Ciphers: AES, modes: ECB/CBC/CTR/XTS (SPE)"
78 select CRYPTO_SKCIPHER
80 Block ciphers: AES cipher algorithms (FIPS-197)
81 Length-preserving ciphers: AES with ECB, CBC, CTR, and XTS modes
83 Architecture: powerpc using:
84 - SPE (Signal Processing Engine) extensions
87 - Processor Type: Freescale 8500
88 - CPU selection: e500 (8540)
90 This module should only be used for low power (router) devices
91 without hardware AES acceleration (e.g. caam crypto). It reduces the
92 size of the AES tables from 16KB to 8KB + 256 bytes and mitigates
93 timining attacks. Nevertheless it might be not as secure as other
94 architecture specific assembler implementations that work on 1KB
95 tables or 256 bytes S-boxes.
97 config CRYPTO_AES_GCM_P10
98 tristate "Stitched AES/GCM acceleration support on P10 or later CPU (PPC)"
99 depends on PPC64 && CPU_LITTLE_ENDIAN && VSX
100 select CRYPTO_LIB_AES
103 select CRYPTO_SKCIPHER
105 AEAD cipher: AES cipher algorithms (FIPS-197)
106 GCM (Galois/Counter Mode) authenticated encryption mode (NIST SP800-38D)
107 Architecture: powerpc64 using:
109 - Power10 or later features
111 Support for cryptographic acceleration instructions on Power10 or
112 later CPU. This module supports stitched acceleration for AES/GCM.
114 config CRYPTO_CHACHA20_P10
115 tristate "Ciphers: ChaCha20, XChacha20, XChacha12 (P10 or later)"
116 depends on PPC64 && CPU_LITTLE_ENDIAN && VSX
117 select CRYPTO_SKCIPHER
118 select CRYPTO_LIB_CHACHA_GENERIC
119 select CRYPTO_ARCH_HAVE_LIB_CHACHA
121 Length-preserving ciphers: ChaCha20, XChaCha20, and XChaCha12
122 stream cipher algorithms
124 Architecture: PowerPC64
128 config CRYPTO_POLY1305_P10
129 tristate "Hash functions: Poly1305 (P10 or later)"
130 depends on PPC64 && CPU_LITTLE_ENDIAN && VSX
132 select CRYPTO_LIB_POLY1305_GENERIC
134 Poly1305 authenticator algorithm (RFC7539)
136 Architecture: PowerPC64