arch/powerpc/boot/dts/xpedite5200_xmon.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2009 Extreme Engineering Solutions, Inc.
   4  * Based on TQM8548 device tree
   5  *
   6  * XPedite5200 PrPMC/XMC module based on MPC8548E.  This dts is for the
   7  * xMon boot loader memory map which differs from U-Boot's.
   8  */
   9
  10 /dts-v1/;
  11
  12 / {
  13         model = "xes,xpedite5200";
  14         compatible = "xes,xpedite5200", "xes,MPC8548";
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17         form-factor = "PMC/XMC";
  18         boot-bank = <0x0>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 ethernet2 = &enet2;
  24                 ethernet3 = &enet3;
  25
  26                 serial0 = &serial0;
  27                 serial1 = &serial1;
  28                 pci0 = &pci0;
  29                 pci1 = &pci1;
  30         };
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 PowerPC,8548@0 {
  37                         device_type = "cpu";
  38                         reg = <0>;
  39                         d-cache-line-size = <32>;       // 32 bytes
  40                         i-cache-line-size = <32>;       // 32 bytes
  41                         d-cache-size = <0x8000>;        // L1, 32K
  42                         i-cache-size = <0x8000>;        // L1, 32K
  43                         next-level-cache = <&L2>;
  44                 };
  45         };
  46
  47         memory {
  48                 device_type = "memory";
  49                 reg = <0x0 0x0>;        // Filled in by boot loader
  50         };
  51
  52         soc@ef000000 {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 device_type = "soc";
  56                 ranges = <0x0 0xef000000 0x100000>;
  57                 bus-frequency = <0>;
  58                 compatible = "fsl,mpc8548-immr", "simple-bus";
  59
  60                 ecm-law@0 {
  61                         compatible = "fsl,ecm-law";
  62                         reg = <0x0 0x1000>;
  63                         fsl,num-laws = <12>;
  64                 };
  65
  66                 ecm@1000 {
  67                         compatible = "fsl,mpc8548-ecm", "fsl,ecm";
  68                         reg = <0x1000 0x1000>;
  69                         interrupts = <17 2>;
  70                         interrupt-parent = <&mpic>;
  71                 };
  72
  73                 memory-controller@2000 {
  74                         compatible = "fsl,mpc8548-memory-controller";
  75                         reg = <0x2000 0x1000>;
  76                         interrupt-parent = <&mpic>;
  77                         interrupts = <18 2>;
  78                 };
  79
  80                 L2: l2-cache-controller@20000 {
  81                         compatible = "fsl,mpc8548-l2-cache-controller";
  82                         reg = <0x20000 0x1000>;
  83                         cache-line-size = <32>; // 32 bytes
  84                         cache-size = <0x80000>; // L2, 512K
  85                         interrupt-parent = <&mpic>;
  86                         interrupts = <16 2>;
  87                 };
  88
  89                 /* On-card I2C */
  90                 i2c@3000 {
  91                         #address-cells = <1>;
  92                         #size-cells = <0>;
  93                         cell-index = <0>;
  94                         compatible = "fsl-i2c";
  95                         reg = <0x3000 0x100>;
  96                         interrupts = <43 2>;
  97                         interrupt-parent = <&mpic>;
  98                         dfsrr;
  99
 100                         /*
 101                          * Board GPIO:
 102                          *      0: BRD_CFG0 (1: P14 IO present)
 103                          *      1: BRD_CFG1 (1: FP ethernet present)
 104                          *      2: BRD_CFG2 (1: XMC IO present)
 105                          *      3: XMC root complex indicator
 106                          *      4: Flash boot device indicator
 107                          *      5: Flash write protect enable
 108                          *      6: PMC monarch indicator
 109                          *      7: PMC EREADY
 110                          */
 111                         gpio1: gpio@18 {
 112                                 compatible = "nxp,pca9556";
 113                                 reg = <0x18>;
 114                                 #gpio-cells = <2>;
 115                                 gpio-controller;
 116                                 polarity = <0x00>;
 117                         };
 118
 119                         /* P14 GPIO */
 120                         gpio2: gpio@19 {
 121                                 compatible = "nxp,pca9556";
 122                                 reg = <0x19>;
 123                                 #gpio-cells = <2>;
 124                                 gpio-controller;
 125                                 polarity = <0x00>;
 126                         };
 127
 128                         eeprom@50 {
 129                                 compatible = "atmel,at24c16";
 130                                 reg = <0x50>;
 131                         };
 132
 133                         rtc@68 {
 134                                 compatible = "st,m41t00",
 135                                              "dallas,ds1338";
 136                                 reg = <0x68>;
 137                         };
 138
 139                         dtt@48 {
 140                                 compatible = "maxim,max1237";
 141                                 reg = <0x34>;
 142                         };
 143                 };
 144
 145                 /* Off-card I2C */
 146                 i2c@3100 {
 147                         #address-cells = <1>;
 148                         #size-cells = <0>;
 149                         cell-index = <1>;
 150                         compatible = "fsl-i2c";
 151                         reg = <0x3100 0x100>;
 152                         interrupts = <43 2>;
 153                         interrupt-parent = <&mpic>;
 154                         dfsrr;
 155                 };
 156
 157                 dma@21300 {
 158                         #address-cells = <1>;
 159                         #size-cells = <1>;
 160                         compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
 161                         reg = <0x21300 0x4>;
 162                         ranges = <0x0 0x21100 0x200>;
 163                         cell-index = <0>;
 164                         dma-channel@0 {
 165                                 compatible = "fsl,mpc8548-dma-channel",
 166                                                 "fsl,eloplus-dma-channel";
 167                                 reg = <0x0 0x80>;
 168                                 cell-index = <0>;
 169                                 interrupt-parent = <&mpic>;
 170                                 interrupts = <20 2>;
 171                         };
 172                         dma-channel@80 {
 173                                 compatible = "fsl,mpc8548-dma-channel",
 174                                                 "fsl,eloplus-dma-channel";
 175                                 reg = <0x80 0x80>;
 176                                 cell-index = <1>;
 177                                 interrupt-parent = <&mpic>;
 178                                 interrupts = <21 2>;
 179                         };
 180                         dma-channel@100 {
 181                                 compatible = "fsl,mpc8548-dma-channel",
 182                                                 "fsl,eloplus-dma-channel";
 183                                 reg = <0x100 0x80>;
 184                                 cell-index = <2>;
 185                                 interrupt-parent = <&mpic>;
 186                                 interrupts = <22 2>;
 187                         };
 188                         dma-channel@180 {
 189                                 compatible = "fsl,mpc8548-dma-channel",
 190                                                 "fsl,eloplus-dma-channel";
 191                                 reg = <0x180 0x80>;
 192                                 cell-index = <3>;
 193                                 interrupt-parent = <&mpic>;
 194                                 interrupts = <23 2>;
 195                         };
 196                 };
 197
 198                 /* eTSEC1: Front panel port 0 */
 199                 enet0: ethernet@24000 {
 200                         #address-cells = <1>;
 201                         #size-cells = <1>;
 202                         cell-index = <0>;
 203                         device_type = "network";
 204                         model = "eTSEC";
 205                         compatible = "gianfar";
 206                         reg = <0x24000 0x1000>;
 207                         ranges = <0x0 0x24000 0x1000>;
 208                         local-mac-address = [ 00 00 00 00 00 00 ];
 209                         interrupts = <29 2 30 2 34 2>;
 210                         interrupt-parent = <&mpic>;
 211                         tbi-handle = <&tbi0>;
 212                         phy-handle = <&phy0>;
 213
 214                         mdio@520 {
 215                                 #address-cells = <1>;
 216                                 #size-cells = <0>;
 217                                 compatible = "fsl,gianfar-mdio";
 218                                 reg = <0x520 0x20>;
 219
 220                                 phy0: ethernet-phy@1 {
 221                                         interrupt-parent = <&mpic>;
 222                                         interrupts = <8 1>;
 223                                         reg = <0x1>;
 224                                 };
 225                                 phy1: ethernet-phy@2 {
 226                                         interrupt-parent = <&mpic>;
 227                                         interrupts = <8 1>;
 228                                         reg = <0x2>;
 229                                 };
 230                                 phy2: ethernet-phy@3 {
 231                                         interrupt-parent = <&mpic>;
 232                                         interrupts = <8 1>;
 233                                         reg = <0x3>;
 234                                 };
 235                                 phy3: ethernet-phy@4 {
 236                                         interrupt-parent = <&mpic>;
 237                                         interrupts = <8 1>;
 238                                         reg = <0x4>;
 239                                 };
 240                                 tbi0: tbi-phy@11 {
 241                                         reg = <0x11>;
 242                                         device_type = "tbi-phy";
 243                                 };
 244                         };
 245                 };
 246
 247                 /* eTSEC2: Front panel port 1 */
 248                 enet1: ethernet@25000 {
 249                         #address-cells = <1>;
 250                         #size-cells = <1>;
 251                         cell-index = <1>;
 252                         device_type = "network";
 253                         model = "eTSEC";
 254                         compatible = "gianfar";
 255                         reg = <0x25000 0x1000>;
 256                         ranges = <0x0 0x25000 0x1000>;
 257                         local-mac-address = [ 00 00 00 00 00 00 ];
 258                         interrupts = <35 2 36 2 40 2>;
 259                         interrupt-parent = <&mpic>;
 260                         tbi-handle = <&tbi1>;
 261                         phy-handle = <&phy1>;
 262
 263                         mdio@520 {
 264                                 #address-cells = <1>;
 265                                 #size-cells = <0>;
 266                                 compatible = "fsl,gianfar-tbi";
 267                                 reg = <0x520 0x20>;
 268
 269                                 tbi1: tbi-phy@11 {
 270                                         reg = <0x11>;
 271                                         device_type = "tbi-phy";
 272                                 };
 273                         };
 274                 };
 275
 276                 /* eTSEC3: Rear panel port 2 */
 277                 enet2: ethernet@26000 {
 278                         #address-cells = <1>;
 279                         #size-cells = <1>;
 280                         cell-index = <2>;
 281                         device_type = "network";
 282                         model = "eTSEC";
 283                         compatible = "gianfar";
 284                         reg = <0x26000 0x1000>;
 285                         ranges = <0x0 0x26000 0x1000>;
 286                         local-mac-address = [ 00 00 00 00 00 00 ];
 287                         interrupts = <31 2 32 2 33 2>;
 288                         interrupt-parent = <&mpic>;
 289                         tbi-handle = <&tbi2>;
 290                         phy-handle = <&phy2>;
 291
 292                         mdio@520 {
 293                                 #address-cells = <1>;
 294                                 #size-cells = <0>;
 295                                 compatible = "fsl,gianfar-tbi";
 296                                 reg = <0x520 0x20>;
 297
 298                                 tbi2: tbi-phy@11 {
 299                                         reg = <0x11>;
 300                                         device_type = "tbi-phy";
 301                                 };
 302                         };
 303                 };
 304
 305                 /* eTSEC4: Rear panel port 3 */
 306                 enet3: ethernet@27000 {
 307                         #address-cells = <1>;
 308                         #size-cells = <1>;
 309                         cell-index = <3>;
 310                         device_type = "network";
 311                         model = "eTSEC";
 312                         compatible = "gianfar";
 313                         reg = <0x27000 0x1000>;
 314                         ranges = <0x0 0x27000 0x1000>;
 315                         local-mac-address = [ 00 00 00 00 00 00 ];
 316                         interrupts = <37 2 38 2 39 2>;
 317                         interrupt-parent = <&mpic>;
 318                         tbi-handle = <&tbi3>;
 319                         phy-handle = <&phy3>;
 320
 321                         mdio@520 {
 322                                 #address-cells = <1>;
 323                                 #size-cells = <0>;
 324                                 compatible = "fsl,gianfar-tbi";
 325                                 reg = <0x520 0x20>;
 326
 327                                 tbi3: tbi-phy@11 {
 328                                         reg = <0x11>;
 329                                         device_type = "tbi-phy";
 330                                 };
 331                         };
 332                 };
 333
 334                 serial0: serial@4500 {
 335                         cell-index = <0>;
 336                         device_type = "serial";
 337                         compatible = "fsl,ns16550", "ns16550";
 338                         reg = <0x4500 0x100>;
 339                         clock-frequency = <0>;
 340                         current-speed = <9600>;
 341                         interrupts = <42 2>;
 342                         interrupt-parent = <&mpic>;
 343                 };
 344
 345                 serial1: serial@4600 {
 346                         cell-index = <1>;
 347                         device_type = "serial";
 348                         compatible = "fsl,ns16550", "ns16550";
 349                         reg = <0x4600 0x100>;
 350                         clock-frequency = <0>;
 351                         current-speed = <9600>;
 352                         interrupts = <42 2>;
 353                         interrupt-parent = <&mpic>;
 354                 };
 355
 356                 global-utilities@e0000 {        // global utilities reg
 357                         compatible = "fsl,mpc8548-guts";
 358                         reg = <0xe0000 0x1000>;
 359                         fsl,has-rstcr;
 360                 };
 361
 362                 mpic: pic@40000 {
 363                         interrupt-controller;
 364                         #address-cells = <0>;
 365                         #interrupt-cells = <2>;
 366                         reg = <0x40000 0x40000>;
 367                         compatible = "chrp,open-pic";
 368                         device_type = "open-pic";
 369                 };
 370         };
 371
 372         localbus@ef005000 {
 373                 compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus",
 374                              "simple-bus";
 375                 #address-cells = <2>;
 376                 #size-cells = <1>;
 377                 reg = <0xef005000 0x100>;       // BRx, ORx, etc.
 378                 interrupt-parent = <&mpic>;
 379                 interrupts = <19 2>;
 380
 381                 ranges = <
 382                         0 0x0 0xf8000000 0x08000000     // NOR boot flash
 383                         1 0x0 0xf0000000 0x08000000     // NOR expansion flash
 384                         2 0x0 0xe8000000 0x00010000     // NAND CE1
 385                         3 0x0 0xe8010000 0x00010000     // NAND CE2
 386                 >;
 387
 388                 nor-boot@0,0 {
 389                         #address-cells = <1>;
 390                         #size-cells = <1>;
 391                         compatible = "cfi-flash";
 392                         reg = <0 0x0 0x4000000>;
 393                         bank-width = <2>;
 394
 395                         partition@0 {
 396                                 label = "Primary OS";
 397                                 reg = <0x00000000 0x180000>;
 398                         };
 399                         partition@180000 {
 400                                 label = "Secondary OS";
 401                                 reg = <0x00180000 0x180000>;
 402                         };
 403                         partition@300000 {
 404                                 label = "User";
 405                                 reg = <0x00300000 0x3c80000>;
 406                         };
 407                         partition@3f80000 {
 408                                 label = "Boot firmware";
 409                                 reg = <0x03f80000 0x80000>;
 410                         };
 411                 };
 412
 413                 nor-alternate@1,0 {
 414                         #address-cells = <1>;
 415                         #size-cells = <1>;
 416                         compatible = "cfi-flash";
 417                         reg = <1 0x0 0x4000000>;
 418                         bank-width = <2>;
 419
 420                         partition@0 {
 421                                 label = "Filesystem";
 422                                 reg = <0x00000000 0x3f80000>;
 423                         };
 424                         partition@3f80000 {
 425                                 label = "Alternate boot firmware";
 426                                 reg = <0x03f80000 0x80000>;
 427                         };
 428                 };
 429
 430                 nand@2,0 {
 431                         #address-cells = <1>;
 432                         #size-cells = <1>;
 433                         compatible = "xes,address-ctl-nand";
 434                         reg = <2 0x0 0x10000>;
 435                         cle-line = <0x8>;       /* CLE tied to A3 */
 436                         ale-line = <0x10>;      /* ALE tied to A4 */
 437
 438                         partition@0 {
 439                                 label = "NAND Filesystem";
 440                                 reg = <0 0x40000000>;
 441                         };
 442                 };
 443         };
 444
 445         /* PMC interface */
 446         pci0: pci@ef008000 {
 447                 #interrupt-cells = <1>;
 448                 #size-cells = <2>;
 449                 #address-cells = <3>;
 450                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
 451                 device_type = "pci";
 452                 reg = <0xef008000 0x1000>;
 453                 clock-frequency = <33333333>;
 454                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 455                 interrupt-map = <
 456                                 /* IDSEL */
 457                                  0xe000 0 0 1 &mpic 2 1
 458                                  0xe000 0 0 2 &mpic 3 1>;
 459
 460                 interrupt-parent = <&mpic>;
 461                 interrupts = <24 2>;
 462                 bus-range = <0 0>;
 463                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
 464                           0x01000000 0 0x00000000 0xd0000000 0 0x01000000>;
 465         };
 466
 467         /* XMC PCIe */
 468         pci1: pcie@ef00a000 {
 469                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 470                 interrupt-map = <
 471                         /* IDSEL 0x0 */
 472                         0x00000 0 0 1 &mpic 0 1
 473                         0x00000 0 0 2 &mpic 1 1
 474                         0x00000 0 0 3 &mpic 2 1
 475                         0x00000 0 0 4 &mpic 3 1>;
 476
 477                 interrupt-parent = <&mpic>;
 478                 interrupts = <26 2>;
 479                 bus-range = <0 0xff>;
 480                 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
 481                           0x01000000 0 0x00000000 0xd1000000 0 0x01000000>;
 482                 clock-frequency = <33333333>;
 483                 #interrupt-cells = <1>;
 484                 #size-cells = <2>;
 485                 #address-cells = <3>;
 486                 reg = <0xef00a000 0x1000>;
 487                 compatible = "fsl,mpc8548-pcie";
 488                 device_type = "pci";
 489                 pcie@0 {
 490                         reg = <0 0 0 0 0>;
 491                         #size-cells = <2>;
 492                         #address-cells = <3>;
 493                         device_type = "pci";
 494                         ranges = <0x02000000 0 0xc0000000 0x02000000 0
 495                                   0xc0000000 0 0x20000000
 496                                   0x01000000 0 0x00000000 0x01000000 0
 497                                   0x00000000 0 0x08000000>;
 498                 };
 499         };
 500
 501         /* Needed for dtbImage boot wrapper compatibility */
 502         chosen {
 503                 stdout-path = &serial0;
 504         };
 505 };