2 * Device Tree Source for Emerson KSI8560
4 * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
6 * Based on mpc8560ads.dts
8 * 2008 (c) MontaVista, Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License version 2. This program
10 * is licensed "as is" without any warranty of any kind, whether express
17 /include/ "fsl/e500v1_power_isa.dtsi"
21 compatible = "emerson,KSI8560";
38 d-cache-line-size = <32>;
39 i-cache-line-size = <32>;
40 d-cache-size = <0x8000>; /* L1, 32K */
41 i-cache-size = <0x8000>; /* L1, 32K */
42 timebase-frequency = <0>; /* From U-boot */
43 bus-frequency = <0>; /* From U-boot */
44 clock-frequency = <0>; /* From U-boot */
45 next-level-cache = <&L2>;
50 device_type = "memory";
51 reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
58 ranges = <0x00000000 0xfdf00000 0x00100000>;
59 bus-frequency = <0>; /* Fixed by bootwrapper */
62 compatible = "fsl,ecm-law";
68 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
69 reg = <0x1000 0x1000>;
71 interrupt-parent = <&mpic>;
74 memory-controller@2000 {
75 compatible = "fsl,mpc8540-memory-controller";
76 reg = <0x2000 0x1000>;
77 interrupt-parent = <&mpic>;
78 interrupts = <0x12 0x2>;
81 L2: l2-cache-controller@20000 {
82 compatible = "fsl,mpc8540-l2-cache-controller";
83 reg = <0x20000 0x1000>;
84 cache-line-size = <0x20>; /* 32 bytes */
85 cache-size = <0x40000>; /* L2, 256K */
86 interrupt-parent = <&mpic>;
87 interrupts = <0x10 0x2>;
94 compatible = "fsl-i2c";
96 interrupts = <0x2b 0x2>;
97 interrupt-parent = <&mpic>;
102 #address-cells = <1>;
104 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
106 ranges = <0x0 0x21100 0x200>;
109 compatible = "fsl,mpc8560-dma-channel",
110 "fsl,eloplus-dma-channel";
113 interrupt-parent = <&mpic>;
117 compatible = "fsl,mpc8560-dma-channel",
118 "fsl,eloplus-dma-channel";
121 interrupt-parent = <&mpic>;
125 compatible = "fsl,mpc8560-dma-channel",
126 "fsl,eloplus-dma-channel";
129 interrupt-parent = <&mpic>;
133 compatible = "fsl,mpc8560-dma-channel",
134 "fsl,eloplus-dma-channel";
137 interrupt-parent = <&mpic>;
142 enet0: ethernet@24000 {
143 #address-cells = <1>;
145 device_type = "network";
147 compatible = "gianfar";
148 reg = <0x24000 0x1000>;
149 ranges = <0x0 0x24000 0x1000>;
150 /* Mac address filled in by bootwrapper */
151 local-mac-address = [ 00 00 00 00 00 00 ];
152 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
153 interrupt-parent = <&mpic>;
154 tbi-handle = <&tbi0>;
155 phy-handle = <&PHY1>;
157 mdio@520 { /* For TSECs */
158 #address-cells = <1>;
160 compatible = "fsl,gianfar-mdio";
163 PHY1: ethernet-phy@1 {
164 interrupt-parent = <&mpic>;
168 PHY2: ethernet-phy@2 {
169 interrupt-parent = <&mpic>;
175 device_type = "tbi-phy";
180 enet1: ethernet@25000 {
181 #address-cells = <1>;
183 device_type = "network";
185 compatible = "gianfar";
186 reg = <0x25000 0x1000>;
187 ranges = <0x0 0x25000 0x1000>;
188 /* Mac address filled in by bootwrapper */
189 local-mac-address = [ 00 00 00 00 00 00 ];
190 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
191 interrupt-parent = <&mpic>;
192 tbi-handle = <&tbi1>;
193 phy-handle = <&PHY2>;
196 #address-cells = <1>;
198 compatible = "fsl,gianfar-tbi";
203 device_type = "tbi-phy";
209 #address-cells = <0>;
210 #interrupt-cells = <2>;
211 interrupt-controller;
212 reg = <0x40000 0x40000>;
213 device_type = "open-pic";
217 #address-cells = <1>;
219 compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
220 reg = <0x919c0 0x30>;
224 #address-cells = <1>;
226 ranges = <0x0 0x80000 0x10000>;
229 compatible = "fsl,cpm-muram-data";
230 reg = <0x0 0x4000 0x9000 0x2000>;
235 compatible = "fsl,mpc8560-brg",
238 reg = <0x919f0 0x10 0x915f0 0x10>;
239 clock-frequency = <165000000>; /* 166MHz */
243 #address-cells = <0>;
244 #interrupt-cells = <2>;
245 interrupt-controller;
246 interrupts = <0x2e 0x2>;
247 interrupt-parent = <&mpic>;
248 reg = <0x90c00 0x80>;
249 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
253 device_type = "serial";
254 compatible = "fsl,mpc8560-scc-uart",
256 reg = <0x91a00 0x20 0x88000 0x100>;
258 fsl,cpm-command = <0x800000>;
259 current-speed = <0x1c200>;
260 interrupts = <0x28 0x8>;
261 interrupt-parent = <&CPMPIC>;
265 device_type = "serial";
266 compatible = "fsl,mpc8560-scc-uart",
268 reg = <0x91a20 0x20 0x88100 0x100>;
270 fsl,cpm-command = <0x4a00000>;
271 current-speed = <0x1c200>;
272 interrupts = <0x29 0x8>;
273 interrupt-parent = <&CPMPIC>;
276 mdio@90d00 { /* For FCCs */
277 #address-cells = <1>;
279 compatible = "fsl,cpm2-mdio-bitbang";
280 reg = <0x90d00 0x14>;
284 PHY0: ethernet-phy@0 {
285 interrupt-parent = <&mpic>;
290 enet2: ethernet@91300 {
291 device_type = "network";
292 compatible = "fsl,mpc8560-fcc-enet",
294 reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>;
295 /* Mac address filled in by bootwrapper */
296 local-mac-address = [ 00 00 00 00 00 00 ];
297 fsl,cpm-command = <0x12000300>;
298 interrupts = <0x20 0x8>;
299 interrupt-parent = <&CPMPIC>;
300 phy-handle = <&PHY0>;
306 #address-cells = <2>;
308 compatible = "fsl,mpc8560-localbus", "simple-bus";
309 reg = <0xfdf05000 0x68>;
311 ranges = <0x0 0x0 0xe0000000 0x00800000
312 0x4 0x0 0xe8080000 0x00080000>;
315 #address-cells = <1>;
317 compatible = "jedec-flash";
318 reg = <0x0 0x0 0x800000>;
322 label = "Primary Kernel";
323 reg = <0x0 0x180000>;
326 label = "Primary Filesystem";
327 reg = <0x180000 0x580000>;
331 reg = <0x300000 0x100000>;
337 compatible = "emerson,KSI8560-cpld";
338 reg = <0x4 0x0 0x80000>;
344 stdout-path = "/soc/cpm/serial@91a00";