1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC8572 DS Core1 Device Tree Source in CAMP mode.
5 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
6 * can be shared, all the other devices must be assigned to one core only.
7 * This dts allows core1 to have l2, dma2, eth2, eth3, pci2, msi.
9 * Please note to add "-b 1" for core1's dts compiling.
11 * Copyright 2007-2009 Freescale Semiconductor Inc.
14 /include/ "mpc8572ds.dts"
17 model = "fsl,MPC8572DS";
18 compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
39 memory-controller@2000 {
42 memory-controller@6000 {
54 gpio-controller@f000 {
57 l2-cache-controller@20000 {
58 cache-size = <0x80000>; // L2, 512K
80 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */
81 29 30 34 35 36 40 /* enet0 enet1 */
82 24 25 20 21 22 23 /* pci0 pci1 dma1 */
84 0x1 0x2 0x3 0x4 /* pci slot */
85 0x9 0xa 0xb 0xc /* usb */
86 0x6 0x7 0xe 0x5 /* Audio elgacy SATA */
87 0xe0 0xe1 0xe2 0xe3 /* msi */
94 msi-available-ranges = <0x80 0x80>;
101 global-utilities@e0000 {