1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
6 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
8 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
11 /include/ "t104xsi-pre.dtsi"
14 model = "keymile,kmcent2";
15 compatible = "keymile,kmcent2";
18 front_phy = &front_phy;
26 bman_fbpr: bman-fbpr {
28 alignment = <0 0x1000000>;
32 alignment = <0 0x400000>;
34 qman_pfdr: qman-pfdr {
36 alignment = <0 0x2000000>;
40 ifc: localbus@ffe124000 {
41 reg = <0xf 0xfe124000 0 0x2000>;
42 ranges = <0 0 0xf 0xe8000000 0x04000000
43 1 0 0xf 0xfa000000 0x00010000
44 2 0 0xf 0xfb000000 0x00010000
45 4 0 0xf 0xc0000000 0x08000000
46 6 0 0xf 0xd0000000 0x08000000
47 7 0 0xf 0xd8000000 0x08000000>;
52 compatible = "cfi-flash";
53 reg = <0x0 0x0 0x04000000>;
61 compatible = "fsl,ifc-nand";
62 reg = <0x1 0x0 0x10000>;
66 compatible = "keymile,qriox";
71 compatible = "keymile,bfticu";
74 interrupt-parent = <&mpic>;
75 interrupts = <11 1 0 0>;
76 #interrupt-cells = <1>;
82 device_type = "memory";
85 dcsr: dcsr@f00000000 {
86 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
89 bportals: bman-portals@ff4000000 {
90 ranges = <0x0 0xf 0xf4000000 0x2000000>;
93 qportals: qman-portals@ff6000000 {
94 ranges = <0x0 0xf 0xf6000000 0x2000000>;
98 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
99 reg = <0xf 0xfe000000 0 0x00001000>;
103 compatible = "zarlink,zl30364";
105 spi-max-frequency = <1000000>;
114 clock-frequency = <100000>;
117 compatible = "nxp,pca9547";
119 #address-cells = <1>;
121 i2c-mux-idle-disconnect;
125 #address-cells = <1>;
129 compatible = "atmel,24c02";
139 #address-cells = <1>;
143 compatible = "national,lm75";
148 compatible = "national,lm75";
153 compatible = "national,lm75";
162 clock-frequency = <100000>;
165 compatible = "atmel,24c08";
171 compatible = "atmel,24c08";
185 serial2: serial@11d500 {
189 serial3: serial@11d600 {
213 fixed-link = <0 1 1000 0 0>;
214 phy-connection-type = "sgmii";
218 fixed-link = <1 1 1000 0 0>;
219 phy-connection-type = "sgmii";
231 phy-handle = <&front_phy>;
232 phy-connection-type = "rgmii";
236 front_phy: ethernet-phy@11 {
244 pci0: pcie@ffe240000 {
245 reg = <0xf 0xfe240000 0 0x10000>;
246 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
247 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
249 ranges = <0x02000000 0 0xe0000000
250 0x02000000 0 0xe0000000
253 0x01000000 0 0x00000000
254 0x01000000 0 0x00000000
259 pci1: pcie@ffe250000 {
263 pci2: pcie@ffe260000 {
267 pci3: pcie@ffe270000 {
272 ranges = <0x0 0xf 0xfe140000 0x40000>;
273 reg = <0xf 0xfe140000 0 0x480>;
278 compatible = "fsl,t1040-qe-si";
283 compatible = "fsl,t1040-qe-siram";
284 reg = <0x1000 0x800>;
288 device_type = "hdlc";
289 compatible = "fsl,ucc-hdlc";
290 rx-clock-name = "clk9";
291 tx-clock-name = "clk9";
297 #include "t1040si-post.dtsi"