arch/powerpc/boot/dts/fsl/gef_ppc9a.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * GE PPC9A Device Tree Source
   4  *
   5  * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
   6  *
   7  * Based on: SBS CM6 Device Tree Source
   8  * Copyright 2007 SBS Technologies GmbH & Co. KG
   9  * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
  10  * Copyright 2006 Freescale Semiconductor Inc.
  11  */
  12
  13 /*
  14  * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts
  15  */
  16
  17 /include/ "mpc8641si-pre.dtsi"
  18
  19 / {
  20         model = "GEF_PPC9A";
  21         compatible = "gef,ppc9a";
  22
  23         memory {
  24                 device_type = "memory";
  25                 reg = <0x0 0x40000000>; // set by uboot
  26         };
  27
  28         lbc: localbus@fef05000 {
  29                 reg = <0xfef05000 0x1000>;
  30
  31                 ranges = <0 0 0xff000000 0x01000000     // 16MB Boot flash
  32                           1 0 0xe8000000 0x08000000     // Paged Flash 0
  33                           2 0 0xe0000000 0x08000000     // Paged Flash 1
  34                           3 0 0xfc100000 0x00020000     // NVRAM
  35                           4 0 0xfc000000 0x00008000     // FPGA
  36                           5 0 0xfc008000 0x00008000     // AFIX FPGA
  37                           6 0 0xfd000000 0x00800000     // IO FPGA (8-bit)
  38                           7 0 0xfd800000 0x00800000>;   // IO FPGA (32-bit)
  39
  40                 /* flash@0,0 is a mirror of part of the memory in flash@1,0
  41                 flash@0,0 {
  42                         compatible = "gef,ppc9a-firmware-mirror", "cfi-flash";
  43                         reg = <0x0 0x0 0x1000000>;
  44                         bank-width = <4>;
  45                         device-width = <2>;
  46                         #address-cells = <1>;
  47                         #size-cells = <1>;
  48                         partition@0 {
  49                                 label = "firmware";
  50                                 reg = <0x0 0x1000000>;
  51                                 read-only;
  52                         };
  53                 };
  54                 */
  55
  56                 flash@1,0 {
  57                         compatible = "gef,ppc9a-paged-flash", "cfi-flash";
  58                         reg = <0x1 0x0 0x8000000>;
  59                         bank-width = <4>;
  60                         device-width = <2>;
  61                         #address-cells = <1>;
  62                         #size-cells = <1>;
  63                         partition@0 {
  64                                 label = "user";
  65                                 reg = <0x0 0x7800000>;
  66                         };
  67                         partition@7800000 {
  68                                 label = "firmware";
  69                                 reg = <0x7800000 0x800000>;
  70                                 read-only;
  71                         };
  72                 };
  73
  74                 nvram@3,0 {
  75                         device_type = "nvram";
  76                         compatible = "simtek,stk14ca8";
  77                         reg = <0x3 0x0 0x20000>;
  78                 };
  79
  80                 fpga@4,0 {
  81                         compatible = "gef,ppc9a-fpga-regs";
  82                         reg = <0x4 0x0 0x40>;
  83                 };
  84
  85                 wdt@4,2000 {
  86                         compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
  87                                 "gef,fpga-wdt";
  88                         reg = <0x4 0x2000 0x8>;
  89                         interrupts = <0x1a 0x4>;
  90                         interrupt-parent = <&gef_pic>;
  91                 };
  92                 /* Second watchdog available, driver currently supports one.
  93                 wdt@4,2010 {
  94                         compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
  95                                 "gef,fpga-wdt";
  96                         reg = <0x4 0x2010 0x8>;
  97                         interrupts = <0x1b 0x4>;
  98                         interrupt-parent = <&gef_pic>;
  99                 };
 100                 */
 101                 gef_pic: pic@4,4000 {
 102                         #interrupt-cells = <1>;
 103                         interrupt-controller;
 104                         compatible = "gef,ppc9a-fpga-pic", "gef,fpga-pic-1.00";
 105                         reg = <0x4 0x4000 0x20>;
 106                         interrupts = <0x8 0x9 0 0>;
 107
 108                 };
 109                 gef_gpio: gpio@7,14000 {
 110                         #gpio-cells = <2>;
 111                         compatible = "gef,ppc9a-gpio", "gef,sbc610-gpio";
 112                         reg = <0x7 0x14000 0x24>;
 113                         gpio-controller;
 114                 };
 115         };
 116
 117         soc: soc@fef00000 {
 118                 ranges = <0x0 0xfef00000 0x00100000>;
 119
 120                 i2c@3000 {
 121                         hwmon@48 {
 122                                 compatible = "national,lm92";
 123                                 reg = <0x48>;
 124                         };
 125
 126                         hwmon@4c {
 127                                 compatible = "adi,adt7461";
 128                                 reg = <0x4c>;
 129                         };
 130
 131                         rtc@51 {
 132                                 compatible = "epson,rx8581";
 133                                 reg = <0x00000051>;
 134                         };
 135
 136                         eti@6b {
 137                                 compatible = "dallas,ds1682";
 138                                 reg = <0x6b>;
 139                         };
 140                 };
 141
 142                 enet0: ethernet@24000 {
 143                         tbi-handle = <&tbi0>;
 144                         phy-handle = <&phy0>;
 145                         phy-connection-type = "gmii";
 146                 };
 147
 148                 mdio@24520 {
 149                         phy0: ethernet-phy@0 {
 150                                 interrupt-parent = <&gef_pic>;
 151                                 interrupts = <0x9 0x4>;
 152                                 reg = <1>;
 153                         };
 154                         phy2: ethernet-phy@2 {
 155                                 interrupt-parent = <&gef_pic>;
 156                                 interrupts = <0x8 0x4>;
 157                                 reg = <3>;
 158                         };
 159                         tbi0: tbi-phy@11 {
 160                                 reg = <0x11>;
 161                                 device_type = "tbi-phy";
 162                         };
 163                 };
 164
 165                 enet1: ethernet@26000 {
 166                         tbi-handle = <&tbi2>;
 167                         phy-handle = <&phy2>;
 168                         phy-connection-type = "gmii";
 169                 };
 170
 171                 mdio@26520 {
 172                         tbi2: tbi-phy@11 {
 173                                 reg = <0x11>;
 174                                 device_type = "tbi-phy";
 175                         };
 176                 };
 177
 178                 enet2: ethernet@25000 {
 179                         status = "disabled";
 180                 };
 181
 182                 mdio@25520 {
 183                         status = "disabled";
 184                 };
 185
 186                 enet3: ethernet@27000 {
 187                         status = "disabled";
 188                 };
 189
 190                 mdio@27520 {
 191                         status = "disabled";
 192                 };
 193         };
 194
 195         pci0: pcie@fef08000 {
 196                 reg = <0xfef08000 0x1000>;
 197                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
 198                           0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
 199
 200                 pcie@0 {
 201                         ranges = <0x02000000 0x0 0x80000000
 202                                   0x02000000 0x0 0x80000000
 203                                   0x0 0x40000000
 204
 205                                   0x01000000 0x0 0x00000000
 206                                   0x01000000 0x0 0x00000000
 207                                   0x0 0x00400000>;
 208                 };
 209         };
 210
 211         pci1: pcie@fef09000 {
 212                 status = "disabled";
 213         };
 214 };
 215
 216 /include/ "mpc8641si-post.dtsi"