1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Digsy MTC board Device Tree Source
5 * Copyright (C) 2009 Semihalf
7 * Based on the CM5200 by M. Balakowicz
10 /include/ "mpc5200b.dtsi"
12 &gpt0 { gpio-controller; fsl,has-wdt; };
13 &gpt1 { gpio-controller; };
16 model = "intercontrol,digsy-mtc";
17 compatible = "intercontrol,digsy-mtc";
20 reg = <0x00000000 0x02000000>; // 32MB
41 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
45 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
57 phy0: ethernet-phy@0 {
64 compatible = "atmel,24c08";
69 compatible = "microcrystal,rv3029";
74 compatible = "dallas,ds1339";
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
87 0xc000 0 0 2 &mpc5200_pic 0 0 3
88 0xc000 0 0 3 &mpc5200_pic 0 0 3
89 0xc000 0 0 4 &mpc5200_pic 0 0 3>;
90 clock-frequency = <0>; // From boot loader
91 interrupts = <2 8 0 2 9 0 2 10 0>;
93 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000>,
94 <0x02000000 0 0x90000000 0x90000000 0 0x10000000>,
95 <0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
99 ranges = <0 0 0xff000000 0x1000000
100 4 0 0x60000000 0x0001000>;
102 // 16-bit flash device at LocalPlus Bus CS0
104 compatible = "cfi-flash";
105 reg = <0 0 0x1000000>;
109 #address-cells = <1>;
113 reg = <0x0 0x00200000>;
117 reg = <0x00200000 0x00300000>;
121 reg = <0x00500000 0x00a00000>;
125 reg = <0x00f00000 0x100000>;
130 compatible = "nxp,sja1000";
131 reg = <4 0x000 0x80>;
132 nxp,external-clock-frequency = <24000000>;
133 interrupts = <1 2 3>; // Level-low
137 compatible = "nxp,sja1000";
138 reg = <4 0x100 0x80>;
139 nxp,external-clock-frequency = <24000000>;
140 interrupts = <1 2 3>; // Level-low
144 compatible = "nxp,sc28l92";
145 reg = <4 0x200 0x10>;
146 interrupts = <1 3 3>;