1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/parisc/traps.c
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Copyright (C) 1999, 2000 Philipp Rumpf <prumpf@tux.org>
10 * 'Traps.c' handles hardware traps and faults after we have saved some
14 #include <linux/sched.h>
15 #include <linux/sched/debug.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/ptrace.h>
20 #include <linux/timer.h>
21 #include <linux/delay.h>
23 #include <linux/module.h>
24 #include <linux/smp.h>
25 #include <linux/spinlock.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/console.h>
29 #include <linux/bug.h>
30 #include <linux/ratelimit.h>
31 #include <linux/uaccess.h>
32 #include <linux/kdebug.h>
33 #include <linux/kfence.h>
35 #include <asm/assembly.h>
38 #include <asm/traps.h>
39 #include <asm/unaligned.h>
40 #include <linux/atomic.h>
43 #include <asm/pdc_chassis.h>
44 #include <asm/unwind.h>
45 #include <asm/tlbflush.h>
46 #include <asm/cacheflush.h>
47 #include <linux/kgdb.h>
48 #include <linux/kprobes.h>
50 #if defined(CONFIG_LIGHTWEIGHT_SPINLOCK_CHECK)
51 #include <asm/spinlock.h>
54 #include "../math-emu/math-emu.h" /* for handle_fpe() */
56 static void parisc_show_stack(struct task_struct *task,
57 struct pt_regs *regs, const char *loglvl);
59 static int printbinary(char *buf, unsigned long x, int nbits)
61 unsigned long mask = 1UL << (nbits - 1);
63 *buf++ = (mask & x ? '1' : '0');
76 #define FFMT "%016llx" /* fpregs are 64-bit always */
78 #define PRINTREGS(lvl,r,f,fmt,x) \
79 printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \
80 lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \
81 (r)[(x)+2], (r)[(x)+3])
83 static void print_gr(const char *level, struct pt_regs *regs)
88 printk("%s\n", level);
89 printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level);
90 printbinary(buf, regs->gr[0], 32);
91 printk("%sPSW: %s %s\n", level, buf, print_tainted());
93 for (i = 0; i < 32; i += 4)
94 PRINTREGS(level, regs->gr, "r", RFMT, i);
97 static void print_fr(const char *level, struct pt_regs *regs)
101 struct { u32 sw[2]; } s;
103 /* FR are 64bit everywhere. Need to use asm to get the content
104 * of fpsr/fper1, and we assume that we won't have a FP Identify
105 * in our way, otherwise we're screwed.
106 * The fldd is used to restore the T-bit if there was one, as the
107 * store clears it anyway.
108 * PA2.0 book says "thou shall not use fstw on FPSR/FPERs" - T-Bone */
109 asm volatile ("fstd %%fr0,0(%1) \n\t"
110 "fldd 0(%1),%%fr0 \n\t"
111 : "=m" (s) : "r" (&s) : "r0");
113 printk("%s\n", level);
114 printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level);
115 printbinary(buf, s.sw[0], 32);
116 printk("%sFPSR: %s\n", level, buf);
117 printk("%sFPER1: %08x\n", level, s.sw[1]);
119 /* here we'll print fr0 again, tho it'll be meaningless */
120 for (i = 0; i < 32; i += 4)
121 PRINTREGS(level, regs->fr, "fr", FFMT, i);
124 void show_regs(struct pt_regs *regs)
128 unsigned long cr30, cr31;
130 user = user_mode(regs);
131 level = user ? KERN_DEBUG : KERN_CRIT;
133 show_regs_print_info(level);
135 print_gr(level, regs);
137 for (i = 0; i < 8; i += 4)
138 PRINTREGS(level, regs->sr, "sr", RFMT, i);
141 print_fr(level, regs);
145 printk("%s\n", level);
146 printk("%sIASQ: " RFMT " " RFMT " IAOQ: " RFMT " " RFMT "\n",
147 level, regs->iasq[0], regs->iasq[1], regs->iaoq[0], regs->iaoq[1]);
148 printk("%s IIR: %08lx ISR: " RFMT " IOR: " RFMT "\n",
149 level, regs->iir, regs->isr, regs->ior);
150 printk("%s CPU: %8d CR30: " RFMT " CR31: " RFMT "\n",
151 level, task_cpu(current), cr30, cr31);
152 printk("%s ORIG_R28: " RFMT "\n", level, regs->orig_r28);
155 printk("%s IAOQ[0]: " RFMT "\n", level, regs->iaoq[0]);
156 printk("%s IAOQ[1]: " RFMT "\n", level, regs->iaoq[1]);
157 printk("%s RP(r2): " RFMT "\n", level, regs->gr[2]);
159 printk("%s IAOQ[0]: %pS\n", level, (void *) regs->iaoq[0]);
160 printk("%s IAOQ[1]: %pS\n", level, (void *) regs->iaoq[1]);
161 printk("%s RP(r2): %pS\n", level, (void *) regs->gr[2]);
163 parisc_show_stack(current, regs, KERN_DEFAULT);
167 static DEFINE_RATELIMIT_STATE(_hppa_rs,
168 DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST);
170 #define parisc_printk_ratelimited(critical, regs, fmt, ...) { \
171 if ((critical || show_unhandled_signals) && __ratelimit(&_hppa_rs)) { \
172 printk(fmt, ##__VA_ARGS__); \
178 static void do_show_stack(struct unwind_frame_info *info, const char *loglvl)
182 printk("%sBacktrace:\n", loglvl);
183 while (i <= MAX_UNWIND_ENTRIES) {
184 if (unwind_once(info) < 0 || info->ip == 0)
187 if (__kernel_text_address(info->ip)) {
188 printk("%s [<" RFMT ">] %pS\n",
189 loglvl, info->ip, (void *) info->ip);
193 printk("%s\n", loglvl);
196 static void parisc_show_stack(struct task_struct *task,
197 struct pt_regs *regs, const char *loglvl)
199 struct unwind_frame_info info;
201 unwind_frame_init_task(&info, task, regs);
203 do_show_stack(&info, loglvl);
206 void show_stack(struct task_struct *t, unsigned long *sp, const char *loglvl)
208 parisc_show_stack(t, NULL, loglvl);
211 int is_valid_bugaddr(unsigned long iaoq)
216 void die_if_kernel(char *str, struct pt_regs *regs, long err)
218 if (user_mode(regs)) {
222 parisc_printk_ratelimited(1, regs,
223 KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n",
224 current->comm, task_pid_nr(current), str, err, regs->iaoq[0]);
233 /* Amuse the user in a SPARC fashion */
234 if (err) printk(KERN_CRIT
235 " _______________________________ \n"
236 " < Your System ate a SPARC! Gah! >\n"
237 " ------------------------------- \n"
243 /* unlock the pdc lock if necessary */
244 pdc_emergency_unlock();
247 printk(KERN_CRIT "%s (pid %d): %s (code %ld)\n",
248 current->comm, task_pid_nr(current), str, err);
250 /* Wot's wrong wif bein' racy? */
251 if (current->thread.flags & PARISC_KERNEL_DEATH) {
252 printk(KERN_CRIT "%s() recursion detected.\n", __func__);
256 current->thread.flags |= PARISC_KERNEL_DEATH;
260 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
263 panic("Fatal exception in interrupt");
266 panic("Fatal exception");
269 make_task_dead(SIGSEGV);
272 /* gdb uses break 4,8 */
273 #define GDB_BREAK_INSN 0x10004
274 static void handle_gdb_break(struct pt_regs *regs, int wot)
276 force_sig_fault(SIGTRAP, wot,
277 (void __user *) (regs->iaoq[0] & ~3));
280 static void handle_break(struct pt_regs *regs)
282 unsigned iir = regs->iir;
284 if (unlikely(iir == PARISC_BUG_BREAK_INSN && !user_mode(regs))) {
285 /* check if a BUG() or WARN() trapped here. */
286 enum bug_trap_type tt;
287 tt = report_bug(regs->iaoq[0] & ~3, regs);
288 if (tt == BUG_TRAP_TYPE_WARN) {
291 return; /* return to next instruction when WARN_ON(). */
293 die_if_kernel("Unknown kernel breakpoint", regs,
294 (tt == BUG_TRAP_TYPE_NONE) ? 9 : 0);
297 #ifdef CONFIG_KPROBES
298 if (unlikely(iir == PARISC_KPROBES_BREAK_INSN && !user_mode(regs))) {
299 parisc_kprobe_break_handler(regs);
302 if (unlikely(iir == PARISC_KPROBES_BREAK_INSN2 && !user_mode(regs))) {
303 parisc_kprobe_ss_handler(regs);
309 if (unlikely((iir == PARISC_KGDB_COMPILED_BREAK_INSN ||
310 iir == PARISC_KGDB_BREAK_INSN)) && !user_mode(regs)) {
311 kgdb_handle_exception(9, SIGTRAP, 0, regs);
316 #ifdef CONFIG_LIGHTWEIGHT_SPINLOCK_CHECK
317 if ((iir == SPINLOCK_BREAK_INSN) && !user_mode(regs)) {
318 die_if_kernel("Spinlock was trashed", regs, 1);
322 if (unlikely(iir != GDB_BREAK_INSN))
323 parisc_printk_ratelimited(0, regs,
324 KERN_DEBUG "break %d,%d: pid=%d command='%s'\n",
325 iir & 31, (iir>>13) & ((1<<13)-1),
326 task_pid_nr(current), current->comm);
328 /* send standard GDB signal */
329 handle_gdb_break(regs, TRAP_BRKPT);
332 static void default_trap(int code, struct pt_regs *regs)
334 printk(KERN_ERR "Trap %d on CPU %d\n", code, smp_processor_id());
338 void (*cpu_lpmc) (int code, struct pt_regs *regs) __read_mostly = default_trap;
341 static void transfer_pim_to_trap_frame(struct pt_regs *regs)
344 extern unsigned int hpmc_pim_data[];
345 struct pdc_hpmc_pim_11 *pim_narrow;
346 struct pdc_hpmc_pim_20 *pim_wide;
348 if (boot_cpu_data.cpu_type >= pcxu) {
350 pim_wide = (struct pdc_hpmc_pim_20 *)hpmc_pim_data;
353 * Note: The following code will probably generate a
354 * bunch of truncation error warnings from the compiler.
355 * Could be handled with an ifdef, but perhaps there
359 regs->gr[0] = pim_wide->cr[22];
361 for (i = 1; i < 32; i++)
362 regs->gr[i] = pim_wide->gr[i];
364 for (i = 0; i < 32; i++)
365 regs->fr[i] = pim_wide->fr[i];
367 for (i = 0; i < 8; i++)
368 regs->sr[i] = pim_wide->sr[i];
370 regs->iasq[0] = pim_wide->cr[17];
371 regs->iasq[1] = pim_wide->iasq_back;
372 regs->iaoq[0] = pim_wide->cr[18];
373 regs->iaoq[1] = pim_wide->iaoq_back;
375 regs->sar = pim_wide->cr[11];
376 regs->iir = pim_wide->cr[19];
377 regs->isr = pim_wide->cr[20];
378 regs->ior = pim_wide->cr[21];
381 pim_narrow = (struct pdc_hpmc_pim_11 *)hpmc_pim_data;
383 regs->gr[0] = pim_narrow->cr[22];
385 for (i = 1; i < 32; i++)
386 regs->gr[i] = pim_narrow->gr[i];
388 for (i = 0; i < 32; i++)
389 regs->fr[i] = pim_narrow->fr[i];
391 for (i = 0; i < 8; i++)
392 regs->sr[i] = pim_narrow->sr[i];
394 regs->iasq[0] = pim_narrow->cr[17];
395 regs->iasq[1] = pim_narrow->iasq_back;
396 regs->iaoq[0] = pim_narrow->cr[18];
397 regs->iaoq[1] = pim_narrow->iaoq_back;
399 regs->sar = pim_narrow->cr[11];
400 regs->iir = pim_narrow->cr[19];
401 regs->isr = pim_narrow->cr[20];
402 regs->ior = pim_narrow->cr[21];
406 * The following fields only have meaning if we came through
407 * another path. So just zero them here.
417 * This routine is called as a last resort when everything else
418 * has gone clearly wrong. We get called for faults in kernel space,
421 void parisc_terminate(char *msg, struct pt_regs *regs, int code, unsigned long offset)
423 static DEFINE_SPINLOCK(terminate_lock);
425 (void)notify_die(DIE_OOPS, msg, regs, 0, code, SIGTRAP);
430 spin_lock(&terminate_lock);
432 /* unlock the pdc lock if necessary */
433 pdc_emergency_unlock();
435 /* Not all paths will gutter the processor... */
439 transfer_pim_to_trap_frame(regs);
448 /* show_stack(NULL, (unsigned long *)regs->gr[30]); */
449 struct unwind_frame_info info;
450 unwind_frame_init(&info, current, regs);
451 do_show_stack(&info, KERN_CRIT);
455 pr_crit("%s: Code=%d (%s) at addr " RFMT "\n",
456 msg, code, trap_name(code), offset);
459 spin_unlock(&terminate_lock);
461 /* put soft power button back under hardware control;
462 * if the user had pressed it once at any time, the
463 * system will shut down immediately right here. */
464 pdc_soft_power_button(0);
466 /* Call kernel panic() so reboot timeouts work properly
467 * FIXME: This function should be on the list of
468 * panic notifiers, and we should call panic
469 * directly from the location that we wish.
470 * e.g. We should not call panic from
471 * parisc_terminate, but rather the other way around.
472 * This hack works, prints the panic message twice,
473 * and it enables reboot timers!
478 void notrace handle_interruption(int code, struct pt_regs *regs)
480 unsigned long fault_address = 0;
481 unsigned long fault_space = 0;
484 if (!irqs_disabled_flags(regs->gr[0]))
488 * If the priority level is still user, and the
489 * faulting space is not equal to the active space
490 * then the user is attempting something in a space
491 * that does not belong to them. Kill the process.
493 * This is normally the situation when the user
494 * attempts to jump into the kernel space at the
495 * wrong offset, be it at the gateway page or a
498 * We cannot normally signal the process because it
499 * could *be* on the gateway page, and processes
500 * executing on the gateway page can't have signals
503 * We merely readjust the address into the users
504 * space, at a destination address of zero, and
505 * allow processing to continue.
507 if (((unsigned long)regs->iaoq[0] & 3) &&
508 ((unsigned long)regs->iasq[0] != (unsigned long)regs->sr[7])) {
509 /* Kill the user process later */
510 regs->iaoq[0] = 0 | 3;
511 regs->iaoq[1] = regs->iaoq[0] + 4;
512 regs->iasq[0] = regs->iasq[1] = regs->sr[7];
513 regs->gr[0] &= ~PSW_B;
518 printk(KERN_CRIT "Interruption # %d\n", code);
524 /* High-priority machine check (HPMC) */
526 /* set up a new led state on systems shipped with a LED State panel */
527 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_HPMC);
529 parisc_terminate("High Priority Machine Check (HPMC)",
534 /* Power failure interrupt */
535 printk(KERN_CRIT "Power failure interrupt !\n");
539 /* Recovery counter trap */
540 regs->gr[0] &= ~PSW_R;
543 if (kgdb_single_step) {
544 kgdb_handle_exception(0, SIGTRAP, 0, regs);
549 if (user_space(regs))
550 handle_gdb_break(regs, TRAP_TRACE);
551 /* else this must be the start of a syscall - just let it run */
555 /* Low-priority machine check */
556 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_LPMC);
563 case PARISC_ITLB_TRAP:
564 /* Instruction TLB miss fault/Instruction page fault */
565 fault_address = regs->iaoq[0];
566 fault_space = regs->iasq[0];
570 /* Illegal instruction trap */
571 die_if_kernel("Illegal instruction", regs, code);
572 si_code = ILL_ILLOPC;
576 /* Break instruction trap */
581 /* Privileged operation trap */
582 die_if_kernel("Privileged operation", regs, code);
583 si_code = ILL_PRVOPC;
587 /* Privileged register trap */
588 if ((regs->iir & 0xffdfffe0) == 0x034008a0) {
590 /* This is a MFCTL cr26/cr27 to gr instruction.
591 * PCXS traps on this, so we need to emulate it.
594 if (regs->iir & 0x00200000)
595 regs->gr[regs->iir & 0x1f] = mfctl(27);
597 regs->gr[regs->iir & 0x1f] = mfctl(26);
599 regs->iaoq[0] = regs->iaoq[1];
601 regs->iasq[0] = regs->iasq[1];
605 die_if_kernel("Privileged register usage", regs, code);
606 si_code = ILL_PRVREG;
608 force_sig_fault(SIGILL, si_code,
609 (void __user *) regs->iaoq[0]);
613 /* Overflow Trap, let the userland signal handler do the cleanup */
614 force_sig_fault(SIGFPE, FPE_INTOVF,
615 (void __user *) regs->iaoq[0]);
620 The condition succeeds in an instruction which traps
623 /* Let userspace app figure it out from the insn pointed
626 force_sig_fault(SIGFPE, FPE_CONDTRAP,
627 (void __user *) regs->iaoq[0]);
630 /* The kernel doesn't want to handle condition codes */
634 /* Assist Exception Trap, i.e. floating point exception. */
635 die_if_kernel("Floating point exception", regs, 0); /* quiet */
636 __inc_irq_stat(irq_fpassist_count);
641 /* Data TLB miss fault/Data page fault */
644 /* Non-access instruction TLB miss fault */
645 /* The instruction TLB entry needed for the target address of the FIC
646 is absent, and hardware can't find it, so we get to cleanup */
649 /* Non-access data TLB miss fault/Non-access data page fault */
651 Still need to add slow path emulation code here!
652 If the insn used a non-shadow register, then the tlb
653 handlers could not have their side-effect (e.g. probe
654 writing to a target register) emulated since rfir would
655 erase the changes to said register. Instead we have to
656 setup everything, call this function we are in, and emulate
657 by hand. Technically we need to emulate:
658 fdc,fdce,pdc,"fic,4f",prober,probeir,probew, probeiw
660 if (code == 17 && handle_nadtlb_fault(regs))
662 fault_address = regs->ior;
663 fault_space = regs->isr;
667 /* PCXS only -- later cpu's split this into types 26,27 & 28 */
668 /* Check for unaligned access */
669 if (check_unaligned(regs)) {
670 handle_unaligned(regs);
675 /* PCXL: Data memory access rights trap */
676 fault_address = regs->ior;
677 fault_space = regs->isr;
681 /* Data memory break trap */
682 regs->gr[0] |= PSW_X; /* So we can single-step over the trap */
685 /* Page reference trap */
686 handle_gdb_break(regs, TRAP_HWBKPT);
690 /* Taken branch trap */
691 regs->gr[0] &= ~PSW_T;
692 if (user_space(regs))
693 handle_gdb_break(regs, TRAP_BRANCH);
694 /* else this must be the start of a syscall - just let it
700 /* Instruction access rights */
701 /* PCXL: Instruction memory protection trap */
704 * This could be caused by either: 1) a process attempting
705 * to execute within a vma that does not have execute
706 * permission, or 2) an access rights violation caused by a
707 * flush only translation set up by ptep_get_and_clear().
708 * So we check the vma permissions to differentiate the two.
709 * If the vma indicates we have execute permission, then
710 * the cause is the latter one. In this case, we need to
711 * call do_page_fault() to fix the problem.
714 if (user_mode(regs)) {
715 struct vm_area_struct *vma;
717 mmap_read_lock(current->mm);
718 vma = find_vma(current->mm,regs->iaoq[0]);
719 if (vma && (regs->iaoq[0] >= vma->vm_start)
720 && (vma->vm_flags & VM_EXEC)) {
722 fault_address = regs->iaoq[0];
723 fault_space = regs->iasq[0];
725 mmap_read_unlock(current->mm);
726 break; /* call do_page_fault() */
728 mmap_read_unlock(current->mm);
730 /* CPU could not fetch instruction, so clear stale IIR value. */
731 regs->iir = 0xbaadf00d;
734 /* Data memory protection ID trap */
735 if (code == 27 && !user_mode(regs) &&
736 fixup_exception(regs))
739 die_if_kernel("Protection id trap", regs, code);
740 force_sig_fault(SIGSEGV, SEGV_MAPERR,
742 ((void __user *) regs->iaoq[0]) :
743 ((void __user *) regs->ior));
747 /* Unaligned data reference trap */
748 handle_unaligned(regs);
752 if (user_mode(regs)) {
753 parisc_printk_ratelimited(0, regs, KERN_DEBUG
754 "handle_interruption() pid=%d command='%s'\n",
755 task_pid_nr(current), current->comm);
756 /* SIGBUS, for lack of a better one. */
757 force_sig_fault(SIGBUS, BUS_OBJERR,
758 (void __user *)regs->ior);
761 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
763 parisc_terminate("Unexpected interruption", regs, code, 0);
767 if (user_mode(regs)) {
768 if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) {
769 parisc_printk_ratelimited(0, regs, KERN_DEBUG
770 "User fault %d on space 0x%08lx, pid=%d command='%s'\n",
772 task_pid_nr(current), current->comm);
773 force_sig_fault(SIGSEGV, SEGV_MAPERR,
774 (void __user *)regs->ior);
781 * The kernel should never fault on its own address space,
782 * unless pagefault_disable() was called before.
785 if (faulthandler_disabled() || fault_space == 0)
787 /* Clean up and return if in exception table. */
788 if (fixup_exception(regs))
790 /* Clean up and return if handled by kfence. */
791 if (kfence_handle_page_fault(fault_address,
792 parisc_acctyp(code, regs->iir) == VM_WRITE, regs))
794 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
795 parisc_terminate("Kernel Fault", regs, code, fault_address);
799 do_page_fault(regs, code, fault_address);
803 static void __init initialize_ivt(const void *iva)
805 extern const u32 os_hpmc[];
812 if (strcmp((const char *)iva, "cows can fly"))
813 panic("IVT invalid");
817 for (i = 0; i < 8; i++)
821 * Use PDC_INSTR firmware function to get instruction that invokes
822 * PDCE_CHECK in HPMC handler. See programming note at page 1-31 of
823 * the PA 1.1 Firmware Architecture document.
825 if (pdc_instr(&instr) == PDC_OK)
829 * Rules for the checksum of the HPMC handler:
830 * 1. The IVA does not point to PDC/PDH space (ie: the OS has installed
832 * 2. The word at IVA + 32 is nonzero.
833 * 3. If Length (IVA + 60) is not zero, then Length (IVA + 60) and
834 * Address (IVA + 56) are word-aligned.
835 * 4. The checksum of the 8 words starting at IVA + 32 plus the sum of
836 * the Length/4 words starting at Address is zero.
839 /* Setup IVA and compute checksum for HPMC handler */
840 ivap[6] = (u32)__pa(os_hpmc);
846 pr_debug("initialize_ivt: IVA[6] = 0x%08x\n", ivap[6]);
850 /* early_trap_init() is called before we set up kernel mappings and
851 * write-protect the kernel */
852 void __init early_trap_init(void)
854 extern const void fault_vector_20;
857 extern const void fault_vector_11;
858 initialize_ivt(&fault_vector_11);
861 initialize_ivt(&fault_vector_20);