1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_PARISC_FUTEX_H
3 #define _ASM_PARISC_FUTEX_H
7 #include <linux/futex.h>
8 #include <linux/uaccess.h>
9 #include <asm/atomic.h>
10 #include <asm/errno.h>
12 /* The following has to match the LWS code in syscall.S. We have
13 sixteen four-word locks. */
16 _futex_spin_lock_irqsave(u32 __user *uaddr, unsigned long int *flags)
18 extern u32 lws_lock_start[];
19 long index = ((long)uaddr & 0xf0) >> 2;
20 arch_spinlock_t *s = (arch_spinlock_t *)&lws_lock_start[index];
21 local_irq_save(*flags);
26 _futex_spin_unlock_irqrestore(u32 __user *uaddr, unsigned long int *flags)
28 extern u32 lws_lock_start[];
29 long index = ((long)uaddr & 0xf0) >> 2;
30 arch_spinlock_t *s = (arch_spinlock_t *)&lws_lock_start[index];
32 local_irq_restore(*flags);
36 arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
38 unsigned long int flags;
42 _futex_spin_lock_irqsave(uaddr, &flags);
46 if (unlikely(get_user(oldval, uaddr) != 0))
47 goto out_pagefault_enable;
72 if (ret == 0 && unlikely(put_user(tmp, uaddr) != 0))
77 _futex_spin_unlock_irqrestore(uaddr, &flags);
86 futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
87 u32 oldval, u32 newval)
92 /* futex.c wants to do a cmpxchg_inatomic on kernel NULL, which is
93 * our gateway page, and causes no end of trouble...
95 if (uaccess_kernel() && !uaddr)
98 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
101 /* HPPA has no cmpxchg in hardware and therefore the
102 * best we can do here is use an array of locks. The
103 * lock selected is based on a hash of the userspace
104 * address. This should scale to a couple of CPUs.
107 _futex_spin_lock_irqsave(uaddr, &flags);
108 if (unlikely(get_user(val, uaddr) != 0)) {
109 _futex_spin_unlock_irqrestore(uaddr, &flags);
113 if (val == oldval && unlikely(put_user(newval, uaddr) != 0)) {
114 _futex_spin_unlock_irqrestore(uaddr, &flags);
119 _futex_spin_unlock_irqrestore(uaddr, &flags);
124 #endif /*__KERNEL__*/
125 #endif /*_ASM_PARISC_FUTEX_H*/