1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Linux architectural port borrowing liberally from similar works of
6 * others. All original copyrights apply as per the original source
9 * Modifications for the OpenRISC architecture:
10 * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
11 * Copyright (C) 2005 Gyorgy Jeney <nog@bsemi.com>
12 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
15 #include <linux/linkage.h>
16 #include <linux/pgtable.h>
18 #include <asm/processor.h>
19 #include <asm/unistd.h>
20 #include <asm/thread_info.h>
21 #include <asm/errno.h>
22 #include <asm/spr_defs.h>
25 #include <asm/asm-offsets.h>
27 #define DISABLE_INTERRUPTS(t1,t2) \
28 l.mfspr t2,r0,SPR_SR ;\
29 l.movhi t1,hi(~(SPR_SR_IEE|SPR_SR_TEE)) ;\
30 l.ori t1,t1,lo(~(SPR_SR_IEE|SPR_SR_TEE)) ;\
34 #define ENABLE_INTERRUPTS(t1) \
35 l.mfspr t1,r0,SPR_SR ;\
36 l.ori t1,t1,lo(SPR_SR_IEE|SPR_SR_TEE) ;\
39 /* =========================================================[ macros ]=== */
41 #ifdef CONFIG_TRACE_IRQFLAGS
43 * Trace irq on/off creating a stack frame.
45 #define TRACE_IRQS_OP(trace_op) \
46 l.sw -8(r1),r2 /* store frame pointer */ ;\
47 l.sw -4(r1),r9 /* store return address */ ;\
48 l.addi r2,r1,0 /* move sp to fp */ ;\
51 l.ori r1,r2,0 /* restore sp */ ;\
52 l.lwz r9,-4(r1) /* restore return address */ ;\
53 l.lwz r2,-8(r1) /* restore fp */ ;\
55 * Trace irq on/off and save registers we need that would otherwise be
58 #define TRACE_IRQS_SAVE(t1,trace_op) \
59 l.sw -12(r1),t1 /* save extra reg */ ;\
60 l.sw -8(r1),r2 /* store frame pointer */ ;\
61 l.sw -4(r1),r9 /* store return address */ ;\
62 l.addi r2,r1,0 /* move sp to fp */ ;\
65 l.ori r1,r2,0 /* restore sp */ ;\
66 l.lwz r9,-4(r1) /* restore return address */ ;\
67 l.lwz r2,-8(r1) /* restore fp */ ;\
68 l.lwz t1,-12(r1) /* restore extra reg */
70 #define TRACE_IRQS_OFF TRACE_IRQS_OP(trace_hardirqs_off)
71 #define TRACE_IRQS_ON TRACE_IRQS_OP(trace_hardirqs_on)
72 #define TRACE_IRQS_ON_SYSCALL \
73 TRACE_IRQS_SAVE(r10,trace_hardirqs_on) ;\
74 l.lwz r3,PT_GPR3(r1) ;\
75 l.lwz r4,PT_GPR4(r1) ;\
76 l.lwz r5,PT_GPR5(r1) ;\
77 l.lwz r6,PT_GPR6(r1) ;\
78 l.lwz r7,PT_GPR7(r1) ;\
79 l.lwz r8,PT_GPR8(r1) ;\
80 l.lwz r11,PT_GPR11(r1)
81 #define TRACE_IRQS_OFF_ENTRY \
83 l.andi r3,r5,(SPR_SR_IEE|SPR_SR_TEE) ;\
84 l.sfeq r5,r0 /* skip trace if irqs were already off */;\
87 TRACE_IRQS_SAVE(r4,trace_hardirqs_off) ;\
90 #define TRACE_IRQS_OFF
92 #define TRACE_IRQS_OFF_ENTRY
93 #define TRACE_IRQS_ON_SYSCALL
97 * We need to disable interrupts at beginning of RESTORE_ALL
98 * since interrupt might come in after we've loaded EPC return address
99 * and overwrite EPC with address somewhere in RESTORE_ALL
100 * which is of course wrong!
103 #define RESTORE_ALL \
104 DISABLE_INTERRUPTS(r3,r4) ;\
105 l.lwz r3,PT_PC(r1) ;\
106 l.mtspr r0,r3,SPR_EPCR_BASE ;\
107 l.lwz r3,PT_SR(r1) ;\
108 l.mtspr r0,r3,SPR_ESR_BASE ;\
109 l.lwz r2,PT_GPR2(r1) ;\
110 l.lwz r3,PT_GPR3(r1) ;\
111 l.lwz r4,PT_GPR4(r1) ;\
112 l.lwz r5,PT_GPR5(r1) ;\
113 l.lwz r6,PT_GPR6(r1) ;\
114 l.lwz r7,PT_GPR7(r1) ;\
115 l.lwz r8,PT_GPR8(r1) ;\
116 l.lwz r9,PT_GPR9(r1) ;\
117 l.lwz r10,PT_GPR10(r1) ;\
118 l.lwz r11,PT_GPR11(r1) ;\
119 l.lwz r12,PT_GPR12(r1) ;\
120 l.lwz r13,PT_GPR13(r1) ;\
121 l.lwz r14,PT_GPR14(r1) ;\
122 l.lwz r15,PT_GPR15(r1) ;\
123 l.lwz r16,PT_GPR16(r1) ;\
124 l.lwz r17,PT_GPR17(r1) ;\
125 l.lwz r18,PT_GPR18(r1) ;\
126 l.lwz r19,PT_GPR19(r1) ;\
127 l.lwz r20,PT_GPR20(r1) ;\
128 l.lwz r21,PT_GPR21(r1) ;\
129 l.lwz r22,PT_GPR22(r1) ;\
130 l.lwz r23,PT_GPR23(r1) ;\
131 l.lwz r24,PT_GPR24(r1) ;\
132 l.lwz r25,PT_GPR25(r1) ;\
133 l.lwz r26,PT_GPR26(r1) ;\
134 l.lwz r27,PT_GPR27(r1) ;\
135 l.lwz r28,PT_GPR28(r1) ;\
136 l.lwz r29,PT_GPR29(r1) ;\
137 l.lwz r30,PT_GPR30(r1) ;\
138 l.lwz r31,PT_GPR31(r1) ;\
139 l.lwz r1,PT_SP(r1) ;\
143 #define EXCEPTION_ENTRY(handler) \
146 /* r1, EPCR, ESR a already saved */ ;\
147 l.sw PT_GPR2(r1),r2 ;\
148 l.sw PT_GPR3(r1),r3 ;\
149 /* r4 already save */ ;\
150 l.sw PT_GPR5(r1),r5 ;\
151 l.sw PT_GPR6(r1),r6 ;\
152 l.sw PT_GPR7(r1),r7 ;\
153 l.sw PT_GPR8(r1),r8 ;\
154 l.sw PT_GPR9(r1),r9 ;\
155 /* r10 already saved */ ;\
156 l.sw PT_GPR11(r1),r11 ;\
157 /* r12 already saved */ ;\
158 l.sw PT_GPR13(r1),r13 ;\
159 l.sw PT_GPR14(r1),r14 ;\
160 l.sw PT_GPR15(r1),r15 ;\
161 l.sw PT_GPR16(r1),r16 ;\
162 l.sw PT_GPR17(r1),r17 ;\
163 l.sw PT_GPR18(r1),r18 ;\
164 l.sw PT_GPR19(r1),r19 ;\
165 l.sw PT_GPR20(r1),r20 ;\
166 l.sw PT_GPR21(r1),r21 ;\
167 l.sw PT_GPR22(r1),r22 ;\
168 l.sw PT_GPR23(r1),r23 ;\
169 l.sw PT_GPR24(r1),r24 ;\
170 l.sw PT_GPR25(r1),r25 ;\
171 l.sw PT_GPR26(r1),r26 ;\
172 l.sw PT_GPR27(r1),r27 ;\
173 l.sw PT_GPR28(r1),r28 ;\
174 l.sw PT_GPR29(r1),r29 ;\
175 /* r30 already save */ ;\
176 l.sw PT_GPR31(r1),r31 ;\
177 TRACE_IRQS_OFF_ENTRY ;\
178 /* Store -1 in orig_gpr11 for non-syscall exceptions */ ;\
180 l.sw PT_ORIG_GPR11(r1),r30
182 #define UNHANDLED_EXCEPTION(handler,vector) \
185 /* r1, EPCR, ESR already saved */ ;\
186 l.sw PT_GPR2(r1),r2 ;\
187 l.sw PT_GPR3(r1),r3 ;\
188 l.sw PT_GPR5(r1),r5 ;\
189 l.sw PT_GPR6(r1),r6 ;\
190 l.sw PT_GPR7(r1),r7 ;\
191 l.sw PT_GPR8(r1),r8 ;\
192 l.sw PT_GPR9(r1),r9 ;\
193 /* r10 already saved */ ;\
194 l.sw PT_GPR11(r1),r11 ;\
195 /* r12 already saved */ ;\
196 l.sw PT_GPR13(r1),r13 ;\
197 l.sw PT_GPR14(r1),r14 ;\
198 l.sw PT_GPR15(r1),r15 ;\
199 l.sw PT_GPR16(r1),r16 ;\
200 l.sw PT_GPR17(r1),r17 ;\
201 l.sw PT_GPR18(r1),r18 ;\
202 l.sw PT_GPR19(r1),r19 ;\
203 l.sw PT_GPR20(r1),r20 ;\
204 l.sw PT_GPR21(r1),r21 ;\
205 l.sw PT_GPR22(r1),r22 ;\
206 l.sw PT_GPR23(r1),r23 ;\
207 l.sw PT_GPR24(r1),r24 ;\
208 l.sw PT_GPR25(r1),r25 ;\
209 l.sw PT_GPR26(r1),r26 ;\
210 l.sw PT_GPR27(r1),r27 ;\
211 l.sw PT_GPR28(r1),r28 ;\
212 l.sw PT_GPR29(r1),r29 ;\
213 /* r30 already saved */ ;\
214 l.sw PT_GPR31(r1),r31 ;\
215 /* Store -1 in orig_gpr11 for non-syscall exceptions */ ;\
217 l.sw PT_ORIG_GPR11(r1),r30 ;\
219 /* r4 is exception EA */ ;\
220 l.addi r5,r0,vector ;\
221 l.jal unhandled_exception ;\
223 l.j _ret_from_exception ;\
227 #define CLEAR_LWA_FLAG(reg) \
228 l.movhi reg,hi(lwa_flag) ;\
229 l.ori reg,reg,lo(lwa_flag) ;\
232 * NOTE: one should never assume that SPR_EPC, SPR_ESR, SPR_EEAR
233 * contain the same values as when exception we're handling
234 * occured. in fact they never do. if you need them use
235 * values saved on stack (for SPR_EPC, SPR_ESR) or content
236 * of r4 (for SPR_EEAR). for details look at EXCEPTION_HANDLE()
237 * in 'arch/openrisc/kernel/head.S'
240 /* =====================================================[ exceptions] === */
242 /* ---[ 0x100: RESET exception ]----------------------------------------- */
244 EXCEPTION_ENTRY(_tng_kernel_start)
248 /* ---[ 0x200: BUS exception ]------------------------------------------- */
250 EXCEPTION_ENTRY(_bus_fault_handler)
252 /* r4: EA of fault (set by EXCEPTION_HANDLE) */
254 l.addi r3,r1,0 /* pt_regs */
256 l.j _ret_from_exception
259 /* ---[ 0x300: Data Page Fault exception ]------------------------------- */
260 EXCEPTION_ENTRY(_dtlb_miss_page_fault_handler)
266 EXCEPTION_ENTRY(_data_page_fault_handler)
268 /* set up parameters for do_page_fault */
269 l.ori r5,r0,0x300 // exception vector
271 l.addi r3,r1,0 // pt_regs
272 /* r4 set be EXCEPTION_HANDLE */ // effective address of fault
274 #ifdef CONFIG_OPENRISC_NO_SPR_SR_DSX
275 l.lwz r6,PT_PC(r3) // address of an offending insn
276 l.lwz r6,0(r6) // instruction that caused pf
278 l.srli r6,r6,26 // check opcode for jump insn
281 l.sfeqi r6,1 // l.jal
283 l.sfeqi r6,3 // l.bnf
287 l.sfeqi r6,0x11 // l.jr
289 l.sfeqi r6,0x12 // l.jalr
296 8: // offending insn is in delay slot
297 l.lwz r6,PT_PC(r3) // address of an offending insn
299 l.lwz r6,0(r6) // instruction that caused pf
300 l.srli r6,r6,26 // get opcode
301 9: // offending instruction opcode loaded in r6
305 l.mfspr r6,r0,SPR_SR // SR
306 l.andi r6,r6,SPR_SR_DSX // check for delay slot exception
307 l.sfne r6,r0 // exception happened in delay slot
309 l.lwz r6,PT_PC(r3) // address of an offending insn
311 l.addi r6,r6,4 // offending insn is in delay slot
313 l.lwz r6,0(r6) // instruction that caused pf
314 l.srli r6,r6,26 // check opcode for write access
317 l.sfgeui r6,0x33 // check opcode for write access
321 l.ori r6,r0,0x1 // write access
324 1: l.ori r6,r0,0x0 // !write access
327 /* call fault.c handler in or32/mm/fault.c */
330 l.j _ret_from_exception
333 /* ---[ 0x400: Insn Page Fault exception ]------------------------------- */
334 EXCEPTION_ENTRY(_itlb_miss_page_fault_handler)
340 EXCEPTION_ENTRY(_insn_page_fault_handler)
342 /* set up parameters for do_page_fault */
343 l.ori r5,r0,0x400 // exception vector
345 l.addi r3,r1,0 // pt_regs
346 /* r4 set be EXCEPTION_HANDLE */ // effective address of fault
347 l.ori r6,r0,0x0 // !write access
349 /* call fault.c handler in or32/mm/fault.c */
352 l.j _ret_from_exception
356 /* ---[ 0x500: Timer exception ]----------------------------------------- */
358 EXCEPTION_ENTRY(_timer_handler)
360 l.jal timer_interrupt
361 l.addi r3,r1,0 /* pt_regs */
366 /* ---[ 0x600: Alignment exception ]-------------------------------------- */
368 EXCEPTION_ENTRY(_alignment_handler)
370 /* r4: EA of fault (set by EXCEPTION_HANDLE) */
371 l.jal do_unaligned_access
372 l.addi r3,r1,0 /* pt_regs */
374 l.j _ret_from_exception
378 EXCEPTION_ENTRY(_alignment_handler)
379 // l.mfspr r2,r0,SPR_EEAR_BASE /* Load the effective address */
381 // l.mfspr r5,r0,SPR_EPCR_BASE /* Load the insn address */
384 l.lwz r3,0(r5) /* Load insn */
385 l.srli r4,r3,26 /* Shift left to get the insn opcode */
387 l.sfeqi r4,0x00 /* Check if the load/store insn is in delay slot */
401 l.addi r5,r5,4 /* Increment PC to get return insn address */
404 l.slli r4,r3,6 /* Get the signed extended jump length */
407 l.lwz r3,4(r5) /* Load the real load/store insn */
409 l.add r5,r5,r4 /* Calculate jump target address */
412 l.srli r4,r3,26 /* Shift left to get the insn opcode */
415 l.slli r4,r3,9 /* Shift to get the reg nb */
418 l.lwz r3,4(r5) /* Load the real load/store insn */
420 l.add r4,r4,r1 /* Load the jump register value from the stack */
423 l.srli r4,r3,26 /* Shift left to get the insn opcode */
427 // l.mtspr r0,r5,SPR_EPCR_BASE
444 1: l.j 1b /* I don't know what to do */
528 /* ---[ 0x700: Illegal insn exception ]---------------------------------- */
530 EXCEPTION_ENTRY(_illegal_instruction_handler)
531 /* r4: EA of fault (set by EXCEPTION_HANDLE) */
532 l.jal do_illegal_instruction
533 l.addi r3,r1,0 /* pt_regs */
535 l.j _ret_from_exception
538 /* ---[ 0x800: External interrupt exception ]---------------------------- */
540 EXCEPTION_ENTRY(_external_irq_handler)
541 #ifdef CONFIG_OPENRISC_ESR_EXCEPTION_BUG_CHECK
542 l.lwz r4,PT_SR(r1) // were interrupts enabled ?
543 l.andi r4,r4,SPR_SR_IEE
545 l.bnf 1f // ext irq enabled, all ok.
557 .section .rodata, "a"
559 .string "\n\rESR interrupt bug: in _external_irq_handler (ESR %x)\n\r"
564 l.ori r4,r4,SPR_SR_IEE // fix the bug
570 l.movhi r8,hi(do_IRQ)
571 l.ori r8,r8,lo(do_IRQ)
577 /* ---[ 0x900: DTLB miss exception ]------------------------------------- */
580 /* ---[ 0xa00: ITLB miss exception ]------------------------------------- */
583 /* ---[ 0xb00: Range exception ]----------------------------------------- */
585 UNHANDLED_EXCEPTION(_vector_0xb00,0xb00)
587 /* ---[ 0xc00: Syscall exception ]--------------------------------------- */
590 * Syscalls are a special type of exception in that they are
591 * _explicitly_ invoked by userspace and can therefore be
592 * held to conform to the same ABI as normal functions with
593 * respect to whether registers are preserved across the call
597 /* Upon syscall entry we just save the callee-saved registers
598 * and not the call-clobbered ones.
601 _string_syscall_return:
602 .string "syscall return %ld \n\r\0"
605 ENTRY(_sys_call_handler)
606 /* r1, EPCR, ESR a already saved */
608 /* r3-r8 must be saved because syscall restart relies
609 * on us being able to restart the syscall args... technically
610 * they should be clobbered, otherwise
615 * r4 holds the EEAR address of the fault, use it as screatch reg and
616 * then load the original r4
625 /* r10 already saved */
626 l.sw PT_GPR11(r1),r11
627 /* orig_gpr11 must be set for syscalls */
628 l.sw PT_ORIG_GPR11(r1),r11
629 /* r12,r13 already saved */
631 /* r14-r28 (even) aren't touched by the syscall fast path below
632 * so we don't need to save them. However, the functions that return
633 * to userspace via a call to switch() DO need to save these because
634 * switch() effectively clobbers them... saving these registers for
635 * such functions is handled in their syscall wrappers (see fork, vfork,
638 /* r30 is the only register we clobber in the fast path */
639 /* r30 already saved */
640 /* l.sw PT_GPR30(r1),r30 */
642 _syscall_check_trace_enter:
643 /* syscalls run with interrupts enabled */
644 TRACE_IRQS_ON_SYSCALL
645 ENABLE_INTERRUPTS(r29) // enable interrupts, r29 is temp
647 /* If TIF_SYSCALL_TRACE is set, then we want to do syscall tracing */
648 l.lwz r30,TI_FLAGS(r10)
649 l.andi r30,r30,_TIF_SYSCALL_TRACE
651 l.bf _syscall_trace_enter
655 /* Ensure that the syscall number is reasonable */
656 l.sfgeui r11,__NR_syscalls
661 l.movhi r29,hi(sys_call_table)
662 l.ori r29,r29,lo(sys_call_table)
671 /* All syscalls return here... just pay attention to ret_from_fork
672 * which does it in a round-about way.
674 l.sw PT_GPR11(r1),r11 // save return value
678 l.movhi r3,hi(_string_syscall_return)
679 l.ori r3,r3,lo(_string_syscall_return)
684 l.movhi r27,hi(printk)
685 l.ori r27,r27,lo(printk)
691 _syscall_check_trace_leave:
692 /* r30 is a callee-saved register so this should still hold the
693 * _TIF_SYSCALL_TRACE flag from _syscall_check_trace_enter above...
694 * _syscall_trace_leave expects syscall result to be in pt_regs->r11.
697 l.bf _syscall_trace_leave
700 /* This is where the exception-return code begins... interrupts need to be
701 * disabled the rest of the way here because we can't afford to miss any
702 * interrupts that set NEED_RESCHED or SIGNALPENDING... really true? */
705 /* Here we need to disable interrupts */
706 DISABLE_INTERRUPTS(r27,r29)
708 l.lwz r30,TI_FLAGS(r10)
709 l.andi r30,r30,_TIF_WORK_MASK
712 l.bnf _syscall_resume_userspace
715 /* Work pending follows a different return path, so we need to
716 * make sure that all the call-saved registers get into pt_regs
717 * before branching...
719 l.sw PT_GPR14(r1),r14
720 l.sw PT_GPR16(r1),r16
721 l.sw PT_GPR18(r1),r18
722 l.sw PT_GPR20(r1),r20
723 l.sw PT_GPR22(r1),r22
724 l.sw PT_GPR24(r1),r24
725 l.sw PT_GPR26(r1),r26
726 l.sw PT_GPR28(r1),r28
728 /* _work_pending needs to be called with interrupts disabled */
732 _syscall_resume_userspace:
733 // ENABLE_INTERRUPTS(r29)
736 /* This is the hot path for returning to userspace from a syscall. If there's
737 * work to be done and the branch to _work_pending was taken above, then the
738 * return to userspace will be done via the normal exception return path...
739 * that path restores _all_ registers and will overwrite the "clobbered"
740 * registers with whatever garbage is in pt_regs -- that's OK because those
741 * registers are clobbered anyway and because the extra work is insignificant
742 * in the context of the extra work that _work_pending is doing.
744 /* Once again, syscalls are special and only guarantee to preserve the
745 * same registers as a normal function call */
747 /* The assumption here is that the registers r14-r28 (even) are untouched and
748 * don't need to be restored... be sure that that's really the case!
751 /* This is still too much... we should only be restoring what we actually
752 * clobbered... we should even be using 'scratch' (odd) regs above so that
753 * we don't need to restore anything, hardly...
759 /* r3-r8 are technically clobbered, but syscall restart needs these
770 l.lwz r10,PT_GPR10(r1)
771 l.lwz r11,PT_GPR11(r1)
773 /* r30 is the only register we clobber in the fast path */
774 l.lwz r30,PT_GPR30(r1)
776 /* Here we use r13-r19 (odd) as scratch regs */
780 /* Interrupts need to be disabled for setting EPCR and ESR
781 * so that another interrupt doesn't come in here and clobber
782 * them before we can use them for our l.rfe */
783 DISABLE_INTERRUPTS(r17,r19)
784 l.mtspr r0,r13,SPR_EPCR_BASE
785 l.mtspr r0,r15,SPR_ESR_BASE
789 * Keep the below tracing and error handling out of the hot path...
792 _syscall_trace_enter:
793 /* Here we pass pt_regs to do_syscall_trace_enter. Make sure
794 * that function is really getting all the info it needs as
795 * pt_regs isn't a complete set of userspace regs, just the
796 * ones relevant to the syscall...
798 * Note use of delay slot for setting argument.
800 l.jal do_syscall_trace_enter
803 /* Restore arguments (not preserved across do_syscall_trace_enter)
804 * so that we can do the syscall for real and return to the syscall
807 l.lwz r11,PT_GPR11(r1)
817 _syscall_trace_leave:
818 l.jal do_syscall_trace_leave
821 l.j _syscall_check_work
825 /* Here we effectively pretend to have executed an imaginary
826 * syscall that returns -ENOSYS and then return to the regular
828 * Note that "return value" is set in the delay slot...
831 l.addi r11,r0,-ENOSYS
833 /******* END SYSCALL HANDLING *******/
835 /* ---[ 0xd00: Trap exception ]------------------------------------------ */
837 UNHANDLED_EXCEPTION(_vector_0xd00,0xd00)
839 /* ---[ 0xe00: Trap exception ]------------------------------------------ */
841 EXCEPTION_ENTRY(_trap_handler)
843 /* r4: EA of fault (set by EXCEPTION_HANDLE) */
845 l.addi r3,r1,0 /* pt_regs */
847 l.j _ret_from_exception
850 /* ---[ 0xf00: Reserved exception ]-------------------------------------- */
852 UNHANDLED_EXCEPTION(_vector_0xf00,0xf00)
854 /* ---[ 0x1000: Reserved exception ]------------------------------------- */
856 UNHANDLED_EXCEPTION(_vector_0x1000,0x1000)
858 /* ---[ 0x1100: Reserved exception ]------------------------------------- */
860 UNHANDLED_EXCEPTION(_vector_0x1100,0x1100)
862 /* ---[ 0x1200: Reserved exception ]------------------------------------- */
864 UNHANDLED_EXCEPTION(_vector_0x1200,0x1200)
866 /* ---[ 0x1300: Reserved exception ]------------------------------------- */
868 UNHANDLED_EXCEPTION(_vector_0x1300,0x1300)
870 /* ---[ 0x1400: Reserved exception ]------------------------------------- */
872 UNHANDLED_EXCEPTION(_vector_0x1400,0x1400)
874 /* ---[ 0x1500: Reserved exception ]------------------------------------- */
876 UNHANDLED_EXCEPTION(_vector_0x1500,0x1500)
878 /* ---[ 0x1600: Reserved exception ]------------------------------------- */
880 UNHANDLED_EXCEPTION(_vector_0x1600,0x1600)
882 /* ---[ 0x1700: Reserved exception ]------------------------------------- */
884 UNHANDLED_EXCEPTION(_vector_0x1700,0x1700)
886 /* ---[ 0x1800: Reserved exception ]------------------------------------- */
888 UNHANDLED_EXCEPTION(_vector_0x1800,0x1800)
890 /* ---[ 0x1900: Reserved exception ]------------------------------------- */
892 UNHANDLED_EXCEPTION(_vector_0x1900,0x1900)
894 /* ---[ 0x1a00: Reserved exception ]------------------------------------- */
896 UNHANDLED_EXCEPTION(_vector_0x1a00,0x1a00)
898 /* ---[ 0x1b00: Reserved exception ]------------------------------------- */
900 UNHANDLED_EXCEPTION(_vector_0x1b00,0x1b00)
902 /* ---[ 0x1c00: Reserved exception ]------------------------------------- */
904 UNHANDLED_EXCEPTION(_vector_0x1c00,0x1c00)
906 /* ---[ 0x1d00: Reserved exception ]------------------------------------- */
908 UNHANDLED_EXCEPTION(_vector_0x1d00,0x1d00)
910 /* ---[ 0x1e00: Reserved exception ]------------------------------------- */
912 UNHANDLED_EXCEPTION(_vector_0x1e00,0x1e00)
914 /* ---[ 0x1f00: Reserved exception ]------------------------------------- */
916 UNHANDLED_EXCEPTION(_vector_0x1f00,0x1f00)
918 /* ========================================================[ return ] === */
921 DISABLE_INTERRUPTS(r3,r4)
923 l.lwz r4,TI_FLAGS(r10)
924 l.andi r13,r4,_TIF_WORK_MASK
930 l.lwz r5,PT_ORIG_GPR11(r1)
936 l.jal do_work_pending
937 l.ori r3,r1,0 /* pt_regs */
946 l.ori r11,r11,__NR_restart_syscall
947 l.j _syscall_check_trace_enter
950 l.lwz r11,PT_ORIG_GPR11(r1)
951 /* Restore arg registers */
957 l.j _syscall_check_trace_enter
961 #ifdef CONFIG_TRACE_IRQFLAGS
963 l.andi r3,r4,(SPR_SR_IEE|SPR_SR_TEE)
964 l.sfeq r3,r0 /* skip trace if irqs were off */
965 l.bf skip_hardirqs_on
971 /* This returns to userspace code */
974 ENTRY(_ret_from_intr)
975 ENTRY(_ret_from_exception)
977 l.andi r3,r4,SPR_SR_SM
981 l.j _resume_userspace
988 /* Check if we are a kernel thread */
993 /* ...we are a kernel thread so invoke the requested callback */
998 /* _syscall_returns expect r11 to contain return value */
999 l.lwz r11,PT_GPR11(r1)
1001 /* The syscall fast path return expects call-saved registers
1002 * r12-r28 to be untouched, so we restore them here as they
1003 * will have been effectively clobbered when arriving here
1004 * via the call to switch()
1006 l.lwz r12,PT_GPR12(r1)
1007 l.lwz r14,PT_GPR14(r1)
1008 l.lwz r16,PT_GPR16(r1)
1009 l.lwz r18,PT_GPR18(r1)
1010 l.lwz r20,PT_GPR20(r1)
1011 l.lwz r22,PT_GPR22(r1)
1012 l.lwz r24,PT_GPR24(r1)
1013 l.lwz r26,PT_GPR26(r1)
1014 l.lwz r28,PT_GPR28(r1)
1019 /* ========================================================[ switch ] === */
1022 * This routine switches between two different tasks. The process
1023 * state of one is saved on its kernel stack. Then the state
1024 * of the other is restored from its kernel stack. The memory
1025 * management hardware is updated to the second process's state.
1026 * Finally, we can return to the second process, via the 'return'.
1028 * Note: there are two ways to get to the "going out" portion
1029 * of this code; either by coming in via the entry (_switch)
1030 * or via "fork" which must set up an environment equivalent
1031 * to the "_switch" path. If you change this (or in particular, the
1032 * SAVE_REGS macro), you'll have to change the fork code also.
1036 /* _switch MUST never lay on page boundry, cause it runs from
1037 * effective addresses and beeing interrupted by iTLB miss would kill it.
1038 * dTLB miss seams to never accour in the bad place since data accesses
1039 * are from task structures which are always page aligned.
1041 * The problem happens in RESTORE_ALL_NO_R11 where we first set the EPCR
1042 * register, then load the previous register values and only at the end call
1043 * the l.rfe instruction. If get TLB miss in beetwen the EPCR register gets
1044 * garbled and we end up calling l.rfe with the wrong EPCR. (same probably
1047 * To avoid this problems it is sufficient to align _switch to
1048 * some nice round number smaller than it's size...
1051 /* ABI rules apply here... we either enter _switch via schedule() or via
1052 * an imaginary call to which we shall return at return_from_fork. Either
1053 * way, we are a function call and only need to preserve the callee-saved
1054 * registers when we return. As such, we don't need to save the registers
1055 * on the stack that we won't be returning as they were...
1060 /* We don't store SR as _switch only gets called in a context where
1061 * the SR will be the same going in and coming out... */
1063 /* Set up new pt_regs struct for saving task state */
1064 l.addi r1,r1,-(INT_FRAME_SIZE)
1066 /* No need to store r1/PT_SP as it goes into KSP below */
1069 /* This is wrong, r12 shouldn't be here... but GCC is broken for the time being
1070 * and expects r12 to be callee-saved... */
1071 l.sw PT_GPR12(r1),r12
1072 l.sw PT_GPR14(r1),r14
1073 l.sw PT_GPR16(r1),r16
1074 l.sw PT_GPR18(r1),r18
1075 l.sw PT_GPR20(r1),r20
1076 l.sw PT_GPR22(r1),r22
1077 l.sw PT_GPR24(r1),r24
1078 l.sw PT_GPR26(r1),r26
1079 l.sw PT_GPR28(r1),r28
1080 l.sw PT_GPR30(r1),r30
1082 l.addi r11,r10,0 /* Save old 'current' to 'last' return value*/
1084 /* We use thread_info->ksp for storing the address of the above
1085 * structure so that we can get back to it later... we don't want
1086 * to lose the value of thread_info->ksp, though, so store it as
1087 * pt_regs->sp so that we can easily restore it when we are made
1091 /* Save the old value of thread_info->ksp as pt_regs->sp */
1092 l.lwz r29,TI_KSP(r10)
1095 /* Swap kernel stack pointers */
1096 l.sw TI_KSP(r10),r1 /* Save old stack pointer */
1097 l.or r10,r4,r0 /* Set up new current_thread_info */
1098 l.lwz r1,TI_KSP(r10) /* Load new stack pointer */
1100 /* Restore the old value of thread_info->ksp */
1102 l.sw TI_KSP(r10),r29
1104 /* ...and restore the registers, except r11 because the return value
1105 * has already been set above.
1107 l.lwz r2,PT_GPR2(r1)
1108 l.lwz r9,PT_GPR9(r1)
1109 /* No need to restore r10 */
1110 /* ...and do not restore r11 */
1112 /* This is wrong, r12 shouldn't be here... but GCC is broken for the time being
1113 * and expects r12 to be callee-saved... */
1114 l.lwz r12,PT_GPR12(r1)
1115 l.lwz r14,PT_GPR14(r1)
1116 l.lwz r16,PT_GPR16(r1)
1117 l.lwz r18,PT_GPR18(r1)
1118 l.lwz r20,PT_GPR20(r1)
1119 l.lwz r22,PT_GPR22(r1)
1120 l.lwz r24,PT_GPR24(r1)
1121 l.lwz r26,PT_GPR26(r1)
1122 l.lwz r28,PT_GPR28(r1)
1123 l.lwz r30,PT_GPR30(r1)
1125 /* Unwind stack to pre-switch state */
1126 l.addi r1,r1,(INT_FRAME_SIZE)
1128 /* Return via the link-register back to where we 'came from', where
1129 * that may be either schedule(), ret_from_fork(), or
1130 * ret_from_kernel_thread(). If we are returning to a new thread,
1131 * we are expected to have set up the arg to schedule_tail already,
1132 * hence we do so here unconditionally:
1134 l.lwz r3,TI_TASK(r3) /* Load 'prev' as schedule_tail arg */
1138 /* ==================================================================== */
1140 /* These all use the delay slot for setting the argument register, so the
1141 * jump is always happening after the l.addi instruction.
1143 * These are all just wrappers that don't touch the link-register r9, so the
1144 * return from the "real" syscall function will return back to the syscall
1145 * code that did the l.jal that brought us here.
1148 /* fork requires that we save all the callee-saved registers because they
1149 * are all effectively clobbered by the call to _switch. Here we store
1150 * all the registers that aren't touched by the syscall fast path and thus
1151 * weren't saved there.
1154 _fork_save_extra_regs_and_call:
1155 l.sw PT_GPR14(r1),r14
1156 l.sw PT_GPR16(r1),r16
1157 l.sw PT_GPR18(r1),r18
1158 l.sw PT_GPR20(r1),r20
1159 l.sw PT_GPR22(r1),r22
1160 l.sw PT_GPR24(r1),r24
1161 l.sw PT_GPR26(r1),r26
1163 l.sw PT_GPR28(r1),r28
1166 l.movhi r29,hi(sys_clone)
1167 l.ori r29,r29,lo(sys_clone)
1168 l.j _fork_save_extra_regs_and_call
1172 l.movhi r29,hi(sys_clone3)
1173 l.j _fork_save_extra_regs_and_call
1174 l.ori r29,r29,lo(sys_clone3)
1177 l.movhi r29,hi(sys_fork)
1178 l.ori r29,r29,lo(sys_fork)
1179 l.j _fork_save_extra_regs_and_call
1182 ENTRY(sys_rt_sigreturn)
1183 l.jal _sys_rt_sigreturn
1186 l.bnf _no_syscall_trace
1188 l.jal do_syscall_trace_leave
1191 l.j _resume_userspace
1194 /* This is a catch-all syscall for atomic instructions for the OpenRISC 1000.
1195 * The functions takes a variable number of parameters depending on which
1196 * particular flavour of atomic you want... parameter 1 is a flag identifying
1197 * the atomic in question. Currently, this function implements the
1198 * following variants:
1204 * Atomically exchange the values in pointers 1 and 2.
1208 ENTRY(sys_or1k_atomic)
1209 /* FIXME: This ignores r3 and always does an XCHG */
1210 DISABLE_INTERRUPTS(r17,r19)
1215 ENABLE_INTERRUPTS(r17)
1219 /* ============================================================[ EOF ]=== */