1 // SPDX-License-Identifier: GPL-2.0
4 compatible = "opencores,or1ksim";
7 interrupt-parent = <&pic>;
10 bootargs = "console=uart,mmio,0x90000000,115200";
14 device_type = "memory";
15 reg = <0x00000000 0x02000000>;
22 compatible = "opencores,or1200-rtlsvn481";
24 clock-frequency = <20000000>;
29 * OR1K PIC is built into CPU and accessed via special purpose
30 * registers. It is not addressable and, hence, has no 'reg'
34 compatible = "opencores,or1k-pic";
35 #interrupt-cells = <1>;
39 serial0: serial@90000000 {
40 compatible = "opencores,uart16550-rtlsvn105", "ns16550a";
41 reg = <0x90000000 0x100>;
43 clock-frequency = <20000000>;
46 enet0: ethoc@92000000 {
47 compatible = "opencores,ethmac-rtlsvn338";
48 reg = <0x92000000 0x100>;