1 # SPDX-License-Identifier: GPL-2.0
3 # For a description of the syntax of this configuration file,
4 # see Documentation/kbuild/kconfig-language.txt.
10 select OF_EARLY_FLATTREE
12 select HANDLE_DOMAIN_IRQ
15 select HAVE_ARCH_TRACEHOOK
17 select GENERIC_IRQ_CHIP
18 select GENERIC_IRQ_PROBE
19 select GENERIC_IRQ_SHOW
21 select GENERIC_CPU_DEVICES
23 select GENERIC_ATOMIC64
24 select GENERIC_CLOCKEVENTS
25 select GENERIC_STRNCPY_FROM_USER
26 select GENERIC_STRNLEN_USER
27 select MODULES_USE_ELF_RELA
28 select HAVE_DEBUG_STACKOVERFLOW
30 select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1
39 config RWSEM_GENERIC_SPINLOCK
42 config RWSEM_XCHGADD_ALGORITHM
45 config GENERIC_HWEIGHT
51 config TRACE_IRQFLAGS_SUPPORT
54 # For now, use generic checksum functions
55 #These can be reimplemented in assembly later if so inclined
61 source "kernel/Kconfig.freezer"
63 menu "Processor type and features"
66 prompt "Subarchitecture"
72 Generic OpenRISC 1200 architecture
76 config OPENRISC_BUILTIN_DTB
80 menu "Class II Instructions"
82 config OPENRISC_HAVE_INST_FF1
83 bool "Have instruction l.ff1"
86 Select this if your implementation has the Class II instruction l.ff1
88 config OPENRISC_HAVE_INST_FL1
89 bool "Have instruction l.fl1"
92 Select this if your implementation has the Class II instruction l.fl1
94 config OPENRISC_HAVE_INST_MUL
95 bool "Have instruction l.mul for hardware multiply"
98 Select this if your implementation has a hardware multiply instruction
100 config OPENRISC_HAVE_INST_DIV
101 bool "Have instruction l.div for hardware divide"
104 Select this if your implementation has a hardware divide instruction
111 source kernel/Kconfig.hz
112 source kernel/Kconfig.preempt
115 config OPENRISC_NO_SPR_SR_DSX
116 bool "use SPR_SR_DSX software emulation" if OR1K_1200
119 SPR_SR_DSX bit is status register bit indicating whether
120 the last exception has happened in delay slot.
122 OpenRISC architecture makes it optional to have it implemented
123 in hardware and the OR1200 does not have it.
125 Say N here if you know that your OpenRISC processor has
126 SPR_SR_DSX bit implemented. Say Y if you are unsure.
129 string "Default kernel command string"
132 On some architectures there is currently no way for the boot loader
133 to pass arguments to the kernel. For these architectures, you should
134 supply some command-line options at build time by entering them
137 menu "Debugging options"
139 config JUMP_UPON_UNHANDLED_EXCEPTION
140 bool "Try to die gracefully"
143 Now this puts kernel into infinite loop after first oops. Till
144 your kernel crashes this doesn't have any influence.
146 Say Y if you are unsure.
148 config OPENRISC_ESR_EXCEPTION_BUG_CHECK
149 bool "Check for possible ESR exception bug"
152 This option enables some checks that might expose some problems
155 Say N if you are unsure.
161 menu "Executable file formats"
163 source "fs/Kconfig.binfmt"
169 source "drivers/Kconfig"
173 source "security/Kconfig"
175 source "crypto/Kconfig"
179 menu "Kernel hacking"
181 source "lib/Kconfig.debug"