1 /* Support for the SMSC911x NIC
3 * Copyright (C) 2006 Matsushita Electric Industrial Co., Ltd.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 #ifndef _ASM_UNIT_SMSC911X_H
12 #define _ASM_UNIT_SMSC911X_H
14 #include <linux/netdevice.h>
16 #include <unit/fpga-regs.h>
18 #define MN10300_USE_EXT_EEPROM
21 #define SMSC911X_BASE 0xA8000000UL
22 #define SMSC911X_BASE_END 0xA8000100UL
23 #define SMSC911X_IRQ FPGA_LAN_IRQ
26 * Allow the FPGA to be initialised by the SMSC911x driver
28 #undef SMSC_INITIALIZE
29 #define SMSC_INITIALIZE() \
32 ASB2364_FPGA_REG_RESET_LAN = 0x0001; \
36 #ifdef MN10300_USE_EXT_EEPROM
37 #include <linux/delay.h>
38 #include <unit/clock.h>
40 #define EEPROM_ADDRESS 0xA0
41 #define MAC_OFFSET 0x0008
42 #define USE_IIC_CH 0 /* 0 or 1 */
43 #define IIC_OFFSET (0x80000 * USE_IIC_CH)
44 #define IIC_DTRM __SYSREG(0xd8400000 + IIC_OFFSET, u32)
45 #define IIC_DREC __SYSREG(0xd8400004 + IIC_OFFSET, u32)
46 #define IIC_MYADD __SYSREG(0xd8400008 + IIC_OFFSET, u32)
47 #define IIC_CLK __SYSREG(0xd840000c + IIC_OFFSET, u32)
48 #define IIC_BRST __SYSREG(0xd8400010 + IIC_OFFSET, u32)
49 #define IIC_HOLD __SYSREG(0xd8400014 + IIC_OFFSET, u32)
50 #define IIC_BSTS __SYSREG(0xd8400018 + IIC_OFFSET, u32)
51 #define IIC_ICR __SYSREG(0xd4000080 + 4 * USE_IIC_CH, u16)
53 #define IIC_CLK_PLS ((unsigned short)(MN10300_IOCLK / 100000 - 1))
54 #define IIC_CLK_LOW ((unsigned short)(IIC_CLK_PLS / 2))
56 #define SYS_IIC_DTRM_Bit_STA ((unsigned short)0x0400)
57 #define SYS_IIC_DTRM_Bit_STO ((unsigned short)0x0200)
58 #define SYS_IIC_DTRM_Bit_ACK ((unsigned short)0x0100)
59 #define SYS_IIC_DTRM_Bit_DATA ((unsigned short)0x00FF)
61 static inline void POLL_INT_REQ(volatile u16 *icr)
66 while (!(*icr & GxICR_REQUEST))
68 flags = arch_local_cli_save();
70 *icr = (tmp & GxICR_LEVEL) | GxICR_DETECT;
72 arch_local_irq_restore(flags);
76 * Implement the SMSC911x hook for MAC address retrieval
79 static inline int smsc_get_mac(struct net_device *dev)
81 unsigned char *mac_buf = dev->dev_addr;
90 /* save original GnICR and clear GnICR.IE */
91 flags = arch_local_cli_save();
93 IIC_ICR = orig_gicr & GxICR_LEVEL;
95 arch_local_irq_restore(flags);
97 IIC_MYADD = 0x00000008;
98 IIC_CLK = (IIC_CLK_LOW << 16) + (IIC_CLK_PLS);
99 /* bus hung recovery */
103 for (i = 0; i < 3; i++) {
104 if ((IIC_BSTS & 0x00000003) == 0x00000003)
110 IIC_BRST = 0x00000003;
113 for (i = 0; i < 3; i++) {
114 IIC_BRST = 0x00000002;
116 IIC_BRST = 0x00000003;
122 IIC_BRST = 0x00000002;
123 IIC_BRST = 0x00000003;
125 value = SYS_IIC_DTRM_Bit_STA | SYS_IIC_DTRM_Bit_ACK;
126 value |= (((unsigned short)EEPROM_ADDRESS & SYS_IIC_DTRM_Bit_DATA) |
127 (unsigned short)0x0000);
129 POLL_INT_REQ(&IIC_ICR);
131 /** send offset of MAC address in EEPROM **/
132 IIC_DTRM = (unsigned char)((MAC_OFFSET & 0xFF00) >> 8);
133 POLL_INT_REQ(&IIC_ICR);
135 IIC_DTRM = (unsigned char)(MAC_OFFSET & 0x00FF);
136 POLL_INT_REQ(&IIC_ICR);
140 value = SYS_IIC_DTRM_Bit_STA;
141 value |= (((unsigned short)EEPROM_ADDRESS & SYS_IIC_DTRM_Bit_DATA) |
142 (unsigned short)0x0001);
144 POLL_INT_REQ(&IIC_ICR);
146 IIC_DTRM = 0x00000000;
147 while (mac_length > 0) {
148 POLL_INT_REQ(&IIC_ICR);
153 value = 0x00000300; /* stop IIC bus */
154 else if (mac_length == 1)
155 value = 0x00000100; /* no ack */
157 value = 0x00000000; /* ack */
159 *mac_buf++ = (unsigned char)(data & 0xff);
162 /* restore GnICR.LV and GnICR.IE */
163 flags = arch_local_cli_save();
164 IIC_ICR = (orig_gicr & (GxICR_LEVEL | GxICR_ENABLE));
166 arch_local_irq_restore(flags);
170 #endif /* MN10300_USE_EXT_EEPROM */
171 #endif /* _ASM_UNIT_SMSC911X_H */