1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Interrupt handing routines for NEC VR4100 series.
5 * Copyright (C) 2005-2007 Yoichi Yuasa <yuasa@linux-mips.org>
7 #include <linux/export.h>
8 #include <linux/interrupt.h>
11 #include <asm/irq_cpu.h>
12 #include <asm/vr41xx/irq.h>
14 typedef struct irq_cascade {
15 int (*get_irq)(unsigned int);
18 static irq_cascade_t irq_cascade[NR_IRQS] __cacheline_aligned;
20 static struct irqaction cascade_irqaction = {
23 .flags = IRQF_NO_THREAD,
26 int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int))
33 if (irq_cascade[irq].get_irq != NULL)
36 irq_cascade[irq].get_irq = get_irq;
38 if (get_irq != NULL) {
39 retval = setup_irq(irq, &cascade_irqaction);
41 irq_cascade[irq].get_irq = NULL;
47 EXPORT_SYMBOL_GPL(cascade_irq);
49 static void irq_dispatch(unsigned int irq)
51 irq_cascade_t *cascade;
54 atomic_inc(&irq_err_count);
58 cascade = irq_cascade + irq;
59 if (cascade->get_irq != NULL) {
60 struct irq_desc *desc = irq_to_desc(irq);
61 struct irq_data *idata = irq_desc_get_irq_data(desc);
62 struct irq_chip *chip = irq_desc_get_chip(desc);
65 if (chip->irq_mask_ack)
66 chip->irq_mask_ack(idata);
68 chip->irq_mask(idata);
71 ret = cascade->get_irq(irq);
74 atomic_inc(&irq_err_count);
77 if (!irqd_irq_disabled(idata) && chip->irq_unmask)
78 chip->irq_unmask(idata);
83 asmlinkage void plat_irq_dispatch(void)
85 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
87 if (pending & CAUSEF_IP7)
89 else if (pending & 0x7800) {
90 if (pending & CAUSEF_IP3)
91 irq_dispatch(INT1_IRQ);
92 else if (pending & CAUSEF_IP4)
93 irq_dispatch(INT2_IRQ);
94 else if (pending & CAUSEF_IP5)
95 irq_dispatch(INT3_IRQ);
96 else if (pending & CAUSEF_IP6)
97 irq_dispatch(INT4_IRQ);
98 } else if (pending & CAUSEF_IP2)
99 irq_dispatch(INT0_IRQ);
100 else if (pending & CAUSEF_IP0)
101 do_IRQ(MIPS_SOFTINT0_IRQ);
102 else if (pending & CAUSEF_IP1)
103 do_IRQ(MIPS_SOFTINT1_IRQ);
105 spurious_interrupt();
108 void __init arch_init_irq(void)