GNU Linux-libre 4.19.286-gnu1
[releases.git] / arch / mips / math-emu / sp_sub.c
1 /* IEEE754 floating point arithmetic
2  * single precision
3  */
4 /*
5  * MIPS floating point support
6  * Copyright (C) 1994-2000 Algorithmics Ltd.
7  *
8  *  This program is free software; you can distribute it and/or modify it
9  *  under the terms of the GNU General Public License (Version 2) as
10  *  published by the Free Software Foundation.
11  *
12  *  This program is distributed in the hope it will be useful, but WITHOUT
13  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
15  *  for more details.
16  *
17  *  You should have received a copy of the GNU General Public License along
18  *  with this program; if not, write to the Free Software Foundation, Inc.,
19  *  51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA.
20  */
21
22 #include "ieee754sp.h"
23
24 union ieee754sp ieee754sp_sub(union ieee754sp x, union ieee754sp y)
25 {
26         int s;
27
28         COMPXSP;
29         COMPYSP;
30
31         EXPLODEXSP;
32         EXPLODEYSP;
33
34         ieee754_clearcx();
35
36         FLUSHXSP;
37         FLUSHYSP;
38
39         switch (CLPAIR(xc, yc)) {
40         case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
41         case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
42         case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
43         case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
44         case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
45                 return ieee754sp_nanxcpt(y);
46
47         case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
48         case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
49         case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
50         case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
51         case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
52         case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
53                 return ieee754sp_nanxcpt(x);
54
55         case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
56         case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
57         case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
58         case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
59                 return y;
60
61         case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
62         case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
63         case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
64         case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
65         case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
66                 return x;
67
68
69         /*
70          * Infinity handling
71          */
72         case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
73                 if (xs != ys)
74                         return x;
75                 ieee754_setcx(IEEE754_INVALID_OPERATION);
76                 return ieee754sp_indef();
77
78         case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
79         case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
80         case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
81                 return ieee754sp_inf(ys ^ 1);
82
83         case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
84         case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
85         case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
86                 return x;
87
88         /*
89          * Zero handling
90          */
91         case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
92                 if (xs != ys)
93                         return x;
94                 else
95                         return ieee754sp_zero(ieee754_csr.rm == FPU_CSR_RD);
96
97         case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
98         case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
99                 return x;
100
101         case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
102         case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
103                 /* quick fix up */
104                 SPSIGN(y) ^= 1;
105                 return y;
106
107         case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
108                 SPDNORMX;
109                 /* fall through */
110
111         case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
112                 SPDNORMY;
113                 break;
114
115         case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
116                 SPDNORMX;
117                 break;
118
119         case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
120                 break;
121         }
122         /* flip sign of y and handle as add */
123         ys ^= 1;
124
125         assert(xm & SP_HIDDEN_BIT);
126         assert(ym & SP_HIDDEN_BIT);
127
128
129         /* provide guard,round and stick bit space */
130         xm <<= 3;
131         ym <<= 3;
132
133         if (xe > ye) {
134                 /*
135                  * have to shift y fraction right to align
136                  */
137                 s = xe - ye;
138                 ym = XSPSRS(ym, s);
139                 ye += s;
140         } else if (ye > xe) {
141                 /*
142                  * have to shift x fraction right to align
143                  */
144                 s = ye - xe;
145                 xm = XSPSRS(xm, s);
146                 xe += s;
147         }
148         assert(xe == ye);
149         assert(xe <= SP_EMAX);
150
151         if (xs == ys) {
152                 /* generate 28 bit result of adding two 27 bit numbers
153                  */
154                 xm = xm + ym;
155
156                 if (xm >> (SP_FBITS + 1 + 3)) { /* carry out */
157                         SPXSRSX1();     /* shift preserving sticky */
158                 }
159         } else {
160                 if (xm >= ym) {
161                         xm = xm - ym;
162                 } else {
163                         xm = ym - xm;
164                         xs = ys;
165                 }
166                 if (xm == 0) {
167                         if (ieee754_csr.rm == FPU_CSR_RD)
168                                 return ieee754sp_zero(1);       /* round negative inf. => sign = -1 */
169                         else
170                                 return ieee754sp_zero(0);       /* other round modes   => sign = 1 */
171                 }
172                 /* normalize to rounding precision
173                  */
174                 while ((xm >> (SP_FBITS + 3)) == 0) {
175                         xm <<= 1;
176                         xe--;
177                 }
178         }
179
180         return ieee754sp_format(xs, xe, xm);
181 }