3 #include <linux/interrupt.h>
4 #include <linux/module.h>
6 #include <asm/irq_cpu.h>
8 #include <asm/mipsregs.h>
12 unsigned int ht_irq[] = {0, 1, 3, 4, 5, 6, 7, 8, 12, 14, 15};
14 static void ht_irqdispatch(void)
18 irq = LOONGSON_HT1_INT_VECTOR(0);
19 LOONGSON_HT1_INT_VECTOR(0) = irq; /* Acknowledge the IRQs */
21 for (i = 0; i < ARRAY_SIZE(ht_irq); i++) {
22 if (irq & (0x1 << ht_irq[i]))
27 void mach_irq_dispatch(unsigned int pending)
29 if (pending & CAUSEF_IP7)
30 do_IRQ(LOONGSON_TIMER_IRQ);
31 #if defined(CONFIG_SMP)
32 else if (pending & CAUSEF_IP6)
33 loongson3_ipi_interrupt(NULL);
35 else if (pending & CAUSEF_IP3)
37 else if (pending & CAUSEF_IP2)
38 do_IRQ(LOONGSON_UART_IRQ);
40 pr_err("%s : spurious interrupt\n", __func__);
45 static inline void mask_loongson_irq(struct irq_data *d) { }
46 static inline void unmask_loongson_irq(struct irq_data *d) { }
48 /* For MIPS IRQs which shared by all cores */
49 static struct irq_chip loongson_irq_chip = {
51 .irq_ack = mask_loongson_irq,
52 .irq_mask = mask_loongson_irq,
53 .irq_mask_ack = mask_loongson_irq,
54 .irq_unmask = unmask_loongson_irq,
55 .irq_eoi = unmask_loongson_irq,
58 void irq_router_init(void)
62 /* route LPC int to cpu core0 int 0 */
63 LOONGSON_INT_ROUTER_LPC =
64 LOONGSON_INT_COREx_INTy(loongson_sysconf.boot_cpu_id, 0);
65 /* route HT1 int0 ~ int7 to cpu core0 INT1*/
66 for (i = 0; i < 8; i++)
67 LOONGSON_INT_ROUTER_HT1(i) =
68 LOONGSON_INT_COREx_INTy(loongson_sysconf.boot_cpu_id, 1);
69 /* enable HT1 interrupt */
70 LOONGSON_HT1_INTN_EN(0) = 0xffffffff;
71 /* enable router interrupt intenset */
72 LOONGSON_INT_ROUTER_INTENSET =
73 LOONGSON_INT_ROUTER_INTEN | (0xffff << 16) | 0x1 << 10;
76 void __init mach_init_irq(void)
78 clear_c0_status(ST0_IM | ST0_BEV);
83 irq_set_chip_and_handler(LOONGSON_UART_IRQ,
84 &loongson_irq_chip, handle_percpu_irq);
85 irq_set_chip_and_handler(LOONGSON_BRIDGE_IRQ,
86 &loongson_irq_chip, handle_percpu_irq);
88 set_c0_status(STATUSF_IP2 | STATUSF_IP3 | STATUSF_IP6);
91 #ifdef CONFIG_HOTPLUG_CPU
96 clear_c0_status(ST0_IM);