1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
4 * Author: Fuxin Zhang, zhangfx@lemote.com
6 #include <linux/interrupt.h>
8 #include <asm/irq_cpu.h>
13 static void i8259_irqdispatch(void)
24 asmlinkage void mach_irq_dispatch(unsigned int pending)
26 if (pending & CAUSEF_IP7)
27 do_IRQ(MIPS_CPU_IRQ_BASE + 7);
28 else if (pending & CAUSEF_IP6) /* perf counter loverflow */
30 else if (pending & CAUSEF_IP5)
32 else if (pending & CAUSEF_IP2)
38 static struct irqaction cascade_irqaction = {
41 .flags = IRQF_NO_THREAD,
44 void __init mach_init_irq(void)
46 /* init all controller
47 * 0-15 ------> i8259 interrupt
48 * 16-23 ------> mips cpu interrupt
49 * 32-63 ------> bonito irq
52 /* most bonito irq should be level triggered */
53 LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR |
54 LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES;
56 /* Sets the first-level interrupt dispatcher. */
61 /* bonito irq at IP2 */
62 setup_irq(MIPS_CPU_IRQ_BASE + 2, &cascade_irqaction);
64 setup_irq(MIPS_CPU_IRQ_BASE + 5, &cascade_irqaction);