2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
6 * Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com>
7 * Copyright (C) 2010 John Crispin <john@phrozen.org>
10 #include <linux/export.h>
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/clk.h>
15 #include <linux/clkdev.h>
16 #include <linux/err.h>
17 #include <linux/list.h>
21 #include <asm/div64.h>
23 #include <lantiq_soc.h>
28 /* lantiq socs have 3 static clocks */
29 static struct clk cpu_clk_generic[4];
31 void clkdev_add_static(unsigned long cpu, unsigned long fpi,
32 unsigned long io, unsigned long ppe)
34 cpu_clk_generic[0].rate = cpu;
35 cpu_clk_generic[1].rate = fpi;
36 cpu_clk_generic[2].rate = io;
37 cpu_clk_generic[3].rate = ppe;
40 struct clk *clk_get_cpu(void)
42 return &cpu_clk_generic[0];
45 struct clk *clk_get_fpi(void)
47 return &cpu_clk_generic[1];
49 EXPORT_SYMBOL_GPL(clk_get_fpi);
51 struct clk *clk_get_io(void)
53 return &cpu_clk_generic[2];
55 EXPORT_SYMBOL_GPL(clk_get_io);
57 struct clk *clk_get_ppe(void)
59 return &cpu_clk_generic[3];
61 EXPORT_SYMBOL_GPL(clk_get_ppe);
63 static inline int clk_good(struct clk *clk)
65 return clk && !IS_ERR(clk);
68 unsigned long clk_get_rate(struct clk *clk)
70 if (unlikely(!clk_good(clk)))
76 if (clk->get_rate != NULL)
77 return clk->get_rate();
81 EXPORT_SYMBOL(clk_get_rate);
83 int clk_set_rate(struct clk *clk, unsigned long rate)
85 if (unlikely(!clk_good(clk)))
87 if (clk->rates && *clk->rates) {
88 unsigned long *r = clk->rates;
90 while (*r && (*r != rate))
93 pr_err("clk %s.%s: trying to set invalid rate %ld\n",
94 clk->cl.dev_id, clk->cl.con_id, rate);
101 EXPORT_SYMBOL(clk_set_rate);
103 long clk_round_rate(struct clk *clk, unsigned long rate)
105 if (unlikely(!clk_good(clk)))
107 if (clk->rates && *clk->rates) {
108 unsigned long *r = clk->rates;
110 while (*r && (*r != rate))
118 EXPORT_SYMBOL(clk_round_rate);
120 int clk_enable(struct clk *clk)
122 if (unlikely(!clk_good(clk)))
126 return clk->enable(clk);
130 EXPORT_SYMBOL(clk_enable);
132 void clk_disable(struct clk *clk)
134 if (unlikely(!clk_good(clk)))
140 EXPORT_SYMBOL(clk_disable);
142 int clk_activate(struct clk *clk)
144 if (unlikely(!clk_good(clk)))
148 return clk->activate(clk);
152 EXPORT_SYMBOL(clk_activate);
154 void clk_deactivate(struct clk *clk)
156 if (unlikely(!clk_good(clk)))
160 clk->deactivate(clk);
162 EXPORT_SYMBOL(clk_deactivate);
164 struct clk *clk_get_parent(struct clk *clk)
168 EXPORT_SYMBOL(clk_get_parent);
170 int clk_set_parent(struct clk *clk, struct clk *parent)
174 EXPORT_SYMBOL(clk_set_parent);
176 static inline u32 get_counter_resolution(void)
180 __asm__ __volatile__(
192 void __init plat_time_init(void)
199 mips_hpt_frequency = clk_get_rate(clk) / get_counter_resolution();
200 write_c0_compare(read_c0_count());
201 pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);