arch/mips/lantiq/clk.c

   1 /*
   2  *  This program is free software; you can redistribute it and/or modify it
   3  *  under the terms of the GNU General Public License version 2 as published
   4  *  by the Free Software Foundation.
   5  *
   6  * Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com>
   7  * Copyright (C) 2010 John Crispin <john@phrozen.org>
   8  */
   9 #include <linux/io.h>
  10 #include <linux/export.h>
  11 #include <linux/init.h>
  12 #include <linux/kernel.h>
  13 #include <linux/types.h>
  14 #include <linux/clk.h>
  15 #include <linux/clkdev.h>
  16 #include <linux/err.h>
  17 #include <linux/list.h>
  18
  19 #include <asm/time.h>
  20 #include <asm/irq.h>
  21 #include <asm/div64.h>
  22
  23 #include <lantiq_soc.h>
  24
  25 #include "clk.h"
  26 #include "prom.h"
  27
  28 /* lantiq socs have 3 static clocks */
  29 static struct clk cpu_clk_generic[4];
  30
  31 void clkdev_add_static(unsigned long cpu, unsigned long fpi,
  32                         unsigned long io, unsigned long ppe)
  33 {
  34         cpu_clk_generic[0].rate = cpu;
  35         cpu_clk_generic[1].rate = fpi;
  36         cpu_clk_generic[2].rate = io;
  37         cpu_clk_generic[3].rate = ppe;
  38 }
  39
  40 struct clk *clk_get_cpu(void)
  41 {
  42         return &cpu_clk_generic[0];
  43 }
  44
  45 struct clk *clk_get_fpi(void)
  46 {
  47         return &cpu_clk_generic[1];
  48 }
  49 EXPORT_SYMBOL_GPL(clk_get_fpi);
  50
  51 struct clk *clk_get_io(void)
  52 {
  53         return &cpu_clk_generic[2];
  54 }
  55 EXPORT_SYMBOL_GPL(clk_get_io);
  56
  57 struct clk *clk_get_ppe(void)
  58 {
  59         return &cpu_clk_generic[3];
  60 }
  61 EXPORT_SYMBOL_GPL(clk_get_ppe);
  62
  63 static inline int clk_good(struct clk *clk)
  64 {
  65         return clk && !IS_ERR(clk);
  66 }
  67
  68 unsigned long clk_get_rate(struct clk *clk)
  69 {
  70         if (unlikely(!clk_good(clk)))
  71                 return 0;
  72
  73         if (clk->rate != 0)
  74                 return clk->rate;
  75
  76         if (clk->get_rate != NULL)
  77                 return clk->get_rate();
  78
  79         return 0;
  80 }
  81 EXPORT_SYMBOL(clk_get_rate);
  82
  83 int clk_set_rate(struct clk *clk, unsigned long rate)
  84 {
  85         if (unlikely(!clk_good(clk)))
  86                 return 0;
  87         if (clk->rates && *clk->rates) {
  88                 unsigned long *r = clk->rates;
  89
  90                 while (*r && (*r != rate))
  91                         r++;
  92                 if (!*r) {
  93                         pr_err("clk %s.%s: trying to set invalid rate %ld\n",
  94                                 clk->cl.dev_id, clk->cl.con_id, rate);
  95                         return -1;
  96                 }
  97         }
  98         clk->rate = rate;
  99         return 0;
 100 }
 101 EXPORT_SYMBOL(clk_set_rate);
 102
 103 long clk_round_rate(struct clk *clk, unsigned long rate)
 104 {
 105         if (unlikely(!clk_good(clk)))
 106                 return 0;
 107         if (clk->rates && *clk->rates) {
 108                 unsigned long *r = clk->rates;
 109
 110                 while (*r && (*r != rate))
 111                         r++;
 112                 if (!*r) {
 113                         return clk->rate;
 114                 }
 115         }
 116         return rate;
 117 }
 118 EXPORT_SYMBOL(clk_round_rate);
 119
 120 int clk_enable(struct clk *clk)
 121 {
 122         if (unlikely(!clk_good(clk)))
 123                 return -1;
 124
 125         if (clk->enable)
 126                 return clk->enable(clk);
 127
 128         return -1;
 129 }
 130 EXPORT_SYMBOL(clk_enable);
 131
 132 void clk_disable(struct clk *clk)
 133 {
 134         if (unlikely(!clk_good(clk)))
 135                 return;
 136
 137         if (clk->disable)
 138                 clk->disable(clk);
 139 }
 140 EXPORT_SYMBOL(clk_disable);
 141
 142 int clk_activate(struct clk *clk)
 143 {
 144         if (unlikely(!clk_good(clk)))
 145                 return -1;
 146
 147         if (clk->activate)
 148                 return clk->activate(clk);
 149
 150         return -1;
 151 }
 152 EXPORT_SYMBOL(clk_activate);
 153
 154 void clk_deactivate(struct clk *clk)
 155 {
 156         if (unlikely(!clk_good(clk)))
 157                 return;
 158
 159         if (clk->deactivate)
 160                 clk->deactivate(clk);
 161 }
 162 EXPORT_SYMBOL(clk_deactivate);
 163
 164 struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
 165 {
 166         return NULL;
 167 }
 168
 169 int clk_set_parent(struct clk *clk, struct clk *parent)
 170 {
 171         return 0;
 172 }
 173 EXPORT_SYMBOL(clk_set_parent);
 174
 175 static inline u32 get_counter_resolution(void)
 176 {
 177         u32 res;
 178
 179         __asm__ __volatile__(
 180                 ".set   push\n"
 181                 ".set   mips32r2\n"
 182                 "rdhwr  %0, $3\n"
 183                 ".set pop\n"
 184                 : "=&r" (res)
 185                 : /* no input */
 186                 : "memory");
 187
 188         return res;
 189 }
 190
 191 void __init plat_time_init(void)
 192 {
 193         struct clk *clk;
 194
 195         ltq_soc_init();
 196
 197         clk = clk_get_cpu();
 198         mips_hpt_frequency = clk_get_rate(clk) / get_counter_resolution();
 199         write_c0_compare(read_c0_count());
 200         pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
 201         clk_put(clk);
 202 }