2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1992 Ross Biro
7 * Copyright (C) Linus Torvalds
8 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9 * Copyright (C) 1996 David S. Miller
10 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11 * Copyright (C) 1999 MIPS Technologies, Inc.
12 * Copyright (C) 2000 Ulf Carlsson
14 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
17 #include <linux/compiler.h>
18 #include <linux/context_tracking.h>
19 #include <linux/elf.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
23 #include <linux/errno.h>
24 #include <linux/ptrace.h>
25 #include <linux/regset.h>
26 #include <linux/smp.h>
27 #include <linux/security.h>
28 #include <linux/stddef.h>
29 #include <linux/tracehook.h>
30 #include <linux/audit.h>
31 #include <linux/seccomp.h>
32 #include <linux/ftrace.h>
34 #include <asm/byteorder.h>
36 #include <asm/cpu-info.h>
39 #include <asm/mipsregs.h>
40 #include <asm/mipsmtregs.h>
41 #include <asm/pgtable.h>
43 #include <asm/syscall.h>
44 #include <asm/uaccess.h>
45 #include <asm/bootinfo.h>
48 #define CREATE_TRACE_POINTS
49 #include <trace/events/syscalls.h>
51 static void init_fp_ctx(struct task_struct *target)
53 /* If FP has been used then the target already has context */
54 if (tsk_used_math(target))
57 /* Begin with data registers set to all 1s... */
58 memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
60 /* FCSR has been preset by `mips_set_personality_nan'. */
63 * Record that the target has "used" math, such that the context
64 * just initialised, and any modifications made by the caller,
67 set_stopped_child_used_math(target);
71 * Called by kernel/ptrace.c when detaching..
73 * Make sure single step bits etc are not set.
75 void ptrace_disable(struct task_struct *child)
77 /* Don't load the watchpoint registers for the ex-child. */
78 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
82 * Poke at FCSR according to its mask. Set the Cause bits even
83 * if a corresponding Enable bit is set. This will be noticed at
84 * the time the thread is switched to and SIGFPE thrown accordingly.
86 static void ptrace_setfcr31(struct task_struct *child, u32 value)
91 fcr31 = child->thread.fpu.fcr31;
92 mask = boot_cpu_data.fpu_msk31;
93 child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
97 * Read a general register set. We always use the 64-bit format, even
98 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
99 * Registers are sign extended to fill the available space.
101 int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data)
103 struct pt_regs *regs;
106 if (!access_ok(VERIFY_WRITE, data, 38 * 8))
109 regs = task_pt_regs(child);
111 for (i = 0; i < 32; i++)
112 __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]);
113 __put_user((long)regs->lo, (__s64 __user *)&data->lo);
114 __put_user((long)regs->hi, (__s64 __user *)&data->hi);
115 __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
116 __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr);
117 __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status);
118 __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause);
124 * Write a general register set. As for PTRACE_GETREGS, we always use
125 * the 64-bit format. On a 32-bit kernel only the lower order half
126 * (according to endianness) will be used.
128 int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
130 struct pt_regs *regs;
133 if (!access_ok(VERIFY_READ, data, 38 * 8))
136 regs = task_pt_regs(child);
138 for (i = 0; i < 32; i++)
139 __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]);
140 __get_user(regs->lo, (__s64 __user *)&data->lo);
141 __get_user(regs->hi, (__s64 __user *)&data->hi);
142 __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
144 /* badvaddr, status, and cause may not be written. */
149 int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
153 if (!access_ok(VERIFY_WRITE, data, 33 * 8))
156 if (tsk_used_math(child)) {
157 union fpureg *fregs = get_fpu_regs(child);
158 for (i = 0; i < 32; i++)
159 __put_user(get_fpr64(&fregs[i], 0),
160 i + (__u64 __user *)data);
162 for (i = 0; i < 32; i++)
163 __put_user((__u64) -1, i + (__u64 __user *) data);
166 __put_user(child->thread.fpu.fcr31, data + 64);
167 __put_user(boot_cpu_data.fpu_id, data + 65);
172 int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
179 if (!access_ok(VERIFY_READ, data, 33 * 8))
183 fregs = get_fpu_regs(child);
185 for (i = 0; i < 32; i++) {
186 __get_user(fpr_val, i + (__u64 __user *)data);
187 set_fpr64(&fregs[i], 0, fpr_val);
190 __get_user(value, data + 64);
191 ptrace_setfcr31(child, value);
193 /* FIR may not be written. */
198 int ptrace_get_watch_regs(struct task_struct *child,
199 struct pt_watch_regs __user *addr)
201 enum pt_watch_style style;
204 if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
206 if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
210 style = pt_watch_style_mips32;
211 #define WATCH_STYLE mips32
213 style = pt_watch_style_mips64;
214 #define WATCH_STYLE mips64
217 __put_user(style, &addr->style);
218 __put_user(boot_cpu_data.watch_reg_use_cnt,
219 &addr->WATCH_STYLE.num_valid);
220 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
221 __put_user(child->thread.watch.mips3264.watchlo[i],
222 &addr->WATCH_STYLE.watchlo[i]);
223 __put_user(child->thread.watch.mips3264.watchhi[i] &
224 (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW),
225 &addr->WATCH_STYLE.watchhi[i]);
226 __put_user(boot_cpu_data.watch_reg_masks[i],
227 &addr->WATCH_STYLE.watch_masks[i]);
230 __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
231 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
232 __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
238 int ptrace_set_watch_regs(struct task_struct *child,
239 struct pt_watch_regs __user *addr)
242 int watch_active = 0;
243 unsigned long lt[NUM_WATCH_REGS];
244 u16 ht[NUM_WATCH_REGS];
246 if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
248 if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
250 /* Check the values. */
251 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
252 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
254 if (lt[i] & __UA_LIMIT)
257 if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
258 if (lt[i] & 0xffffffff80000000UL)
261 if (lt[i] & __UA_LIMIT)
265 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
266 if (ht[i] & ~MIPS_WATCHHI_MASK)
270 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
271 if (lt[i] & MIPS_WATCHLO_IRW)
273 child->thread.watch.mips3264.watchlo[i] = lt[i];
275 child->thread.watch.mips3264.watchhi[i] = ht[i];
279 set_tsk_thread_flag(child, TIF_LOAD_WATCH);
281 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
286 /* regset get/set implementations */
288 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
290 static int gpr32_get(struct task_struct *target,
291 const struct user_regset *regset,
292 unsigned int pos, unsigned int count,
293 void *kbuf, void __user *ubuf)
295 struct pt_regs *regs = task_pt_regs(target);
296 u32 uregs[ELF_NGREG] = {};
299 for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
300 /* k0/k1 are copied as zero. */
301 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
304 uregs[i] = regs->regs[i - MIPS32_EF_R0];
307 uregs[MIPS32_EF_LO] = regs->lo;
308 uregs[MIPS32_EF_HI] = regs->hi;
309 uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
310 uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
311 uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
312 uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
314 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
318 static int gpr32_set(struct task_struct *target,
319 const struct user_regset *regset,
320 unsigned int pos, unsigned int count,
321 const void *kbuf, const void __user *ubuf)
323 struct pt_regs *regs = task_pt_regs(target);
324 u32 uregs[ELF_NGREG];
325 unsigned start, num_regs, i;
328 start = pos / sizeof(u32);
329 num_regs = count / sizeof(u32);
331 if (start + num_regs > ELF_NGREG)
334 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
339 for (i = start; i < num_regs; i++) {
341 * Cast all values to signed here so that if this is a 64-bit
342 * kernel, the supplied 32-bit values will be sign extended.
345 case MIPS32_EF_R1 ... MIPS32_EF_R25:
346 /* k0/k1 are ignored. */
347 case MIPS32_EF_R28 ... MIPS32_EF_R31:
348 regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i];
351 regs->lo = (s32)uregs[i];
354 regs->hi = (s32)uregs[i];
356 case MIPS32_EF_CP0_EPC:
357 regs->cp0_epc = (s32)uregs[i];
365 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
369 static int gpr64_get(struct task_struct *target,
370 const struct user_regset *regset,
371 unsigned int pos, unsigned int count,
372 void *kbuf, void __user *ubuf)
374 struct pt_regs *regs = task_pt_regs(target);
375 u64 uregs[ELF_NGREG] = {};
378 for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
379 /* k0/k1 are copied as zero. */
380 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
383 uregs[i] = regs->regs[i - MIPS64_EF_R0];
386 uregs[MIPS64_EF_LO] = regs->lo;
387 uregs[MIPS64_EF_HI] = regs->hi;
388 uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
389 uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
390 uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
391 uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
393 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
397 static int gpr64_set(struct task_struct *target,
398 const struct user_regset *regset,
399 unsigned int pos, unsigned int count,
400 const void *kbuf, const void __user *ubuf)
402 struct pt_regs *regs = task_pt_regs(target);
403 u64 uregs[ELF_NGREG];
404 unsigned start, num_regs, i;
407 start = pos / sizeof(u64);
408 num_regs = count / sizeof(u64);
410 if (start + num_regs > ELF_NGREG)
413 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
418 for (i = start; i < num_regs; i++) {
420 case MIPS64_EF_R1 ... MIPS64_EF_R25:
421 /* k0/k1 are ignored. */
422 case MIPS64_EF_R28 ... MIPS64_EF_R31:
423 regs->regs[i - MIPS64_EF_R0] = uregs[i];
431 case MIPS64_EF_CP0_EPC:
432 regs->cp0_epc = uregs[i];
440 #endif /* CONFIG_64BIT */
443 * Copy the floating-point context to the supplied NT_PRFPREG buffer,
444 * !CONFIG_CPU_HAS_MSA variant. FP context's general register slots
445 * correspond 1:1 to buffer slots. Only general registers are copied.
447 static int fpr_get_fpa(struct task_struct *target,
448 unsigned int *pos, unsigned int *count,
449 void **kbuf, void __user **ubuf)
451 return user_regset_copyout(pos, count, kbuf, ubuf,
453 0, NUM_FPU_REGS * sizeof(elf_fpreg_t));
457 * Copy the floating-point context to the supplied NT_PRFPREG buffer,
458 * CONFIG_CPU_HAS_MSA variant. Only lower 64 bits of FP context's
459 * general register slots are copied to buffer slots. Only general
460 * registers are copied.
462 static int fpr_get_msa(struct task_struct *target,
463 unsigned int *pos, unsigned int *count,
464 void **kbuf, void __user **ubuf)
470 BUILD_BUG_ON(sizeof(fpr_val) != sizeof(elf_fpreg_t));
471 for (i = 0; i < NUM_FPU_REGS; i++) {
472 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
473 err = user_regset_copyout(pos, count, kbuf, ubuf,
474 &fpr_val, i * sizeof(elf_fpreg_t),
475 (i + 1) * sizeof(elf_fpreg_t));
484 * Copy the floating-point context to the supplied NT_PRFPREG buffer.
485 * Choose the appropriate helper for general registers, and then copy
486 * the FCSR and FIR registers separately.
488 static int fpr_get(struct task_struct *target,
489 const struct user_regset *regset,
490 unsigned int pos, unsigned int count,
491 void *kbuf, void __user *ubuf)
493 const int fcr31_pos = NUM_FPU_REGS * sizeof(elf_fpreg_t);
494 const int fir_pos = fcr31_pos + sizeof(u32);
497 if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t))
498 err = fpr_get_fpa(target, &pos, &count, &kbuf, &ubuf);
500 err = fpr_get_msa(target, &pos, &count, &kbuf, &ubuf);
504 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
505 &target->thread.fpu.fcr31,
506 fcr31_pos, fcr31_pos + sizeof(u32));
510 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
511 &boot_cpu_data.fpu_id,
512 fir_pos, fir_pos + sizeof(u32));
518 * Copy the supplied NT_PRFPREG buffer to the floating-point context,
519 * !CONFIG_CPU_HAS_MSA variant. Buffer slots correspond 1:1 to FP
520 * context's general register slots. Only general registers are copied.
522 static int fpr_set_fpa(struct task_struct *target,
523 unsigned int *pos, unsigned int *count,
524 const void **kbuf, const void __user **ubuf)
526 return user_regset_copyin(pos, count, kbuf, ubuf,
528 0, NUM_FPU_REGS * sizeof(elf_fpreg_t));
532 * Copy the supplied NT_PRFPREG buffer to the floating-point context,
533 * CONFIG_CPU_HAS_MSA variant. Buffer slots are copied to lower 64
534 * bits only of FP context's general register slots. Only general
535 * registers are copied.
537 static int fpr_set_msa(struct task_struct *target,
538 unsigned int *pos, unsigned int *count,
539 const void **kbuf, const void __user **ubuf)
545 BUILD_BUG_ON(sizeof(fpr_val) != sizeof(elf_fpreg_t));
546 for (i = 0; i < NUM_FPU_REGS && *count > 0; i++) {
547 err = user_regset_copyin(pos, count, kbuf, ubuf,
548 &fpr_val, i * sizeof(elf_fpreg_t),
549 (i + 1) * sizeof(elf_fpreg_t));
552 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
559 * Copy the supplied NT_PRFPREG buffer to the floating-point context.
560 * Choose the appropriate helper for general registers, and then copy
561 * the FCSR register separately. Ignore the incoming FIR register
562 * contents though, as the register is read-only.
564 * We optimize for the case where `count % sizeof(elf_fpreg_t) == 0',
565 * which is supposed to have been guaranteed by the kernel before
566 * calling us, e.g. in `ptrace_regset'. We enforce that requirement,
567 * so that we can safely avoid preinitializing temporaries for
568 * partial register writes.
570 static int fpr_set(struct task_struct *target,
571 const struct user_regset *regset,
572 unsigned int pos, unsigned int count,
573 const void *kbuf, const void __user *ubuf)
575 const int fcr31_pos = NUM_FPU_REGS * sizeof(elf_fpreg_t);
576 const int fir_pos = fcr31_pos + sizeof(u32);
580 BUG_ON(count % sizeof(elf_fpreg_t));
582 if (pos + count > sizeof(elf_fpregset_t))
587 if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t))
588 err = fpr_set_fpa(target, &pos, &count, &kbuf, &ubuf);
590 err = fpr_set_msa(target, &pos, &count, &kbuf, &ubuf);
595 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
597 fcr31_pos, fcr31_pos + sizeof(u32));
601 ptrace_setfcr31(target, fcr31);
605 err = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
607 fir_pos + sizeof(u32));
617 struct pt_regs_offset {
622 #define REG_OFFSET_NAME(reg, r) { \
624 .offset = offsetof(struct pt_regs, r) \
627 #define REG_OFFSET_END { \
632 static const struct pt_regs_offset regoffset_table[] = {
633 REG_OFFSET_NAME(r0, regs[0]),
634 REG_OFFSET_NAME(r1, regs[1]),
635 REG_OFFSET_NAME(r2, regs[2]),
636 REG_OFFSET_NAME(r3, regs[3]),
637 REG_OFFSET_NAME(r4, regs[4]),
638 REG_OFFSET_NAME(r5, regs[5]),
639 REG_OFFSET_NAME(r6, regs[6]),
640 REG_OFFSET_NAME(r7, regs[7]),
641 REG_OFFSET_NAME(r8, regs[8]),
642 REG_OFFSET_NAME(r9, regs[9]),
643 REG_OFFSET_NAME(r10, regs[10]),
644 REG_OFFSET_NAME(r11, regs[11]),
645 REG_OFFSET_NAME(r12, regs[12]),
646 REG_OFFSET_NAME(r13, regs[13]),
647 REG_OFFSET_NAME(r14, regs[14]),
648 REG_OFFSET_NAME(r15, regs[15]),
649 REG_OFFSET_NAME(r16, regs[16]),
650 REG_OFFSET_NAME(r17, regs[17]),
651 REG_OFFSET_NAME(r18, regs[18]),
652 REG_OFFSET_NAME(r19, regs[19]),
653 REG_OFFSET_NAME(r20, regs[20]),
654 REG_OFFSET_NAME(r21, regs[21]),
655 REG_OFFSET_NAME(r22, regs[22]),
656 REG_OFFSET_NAME(r23, regs[23]),
657 REG_OFFSET_NAME(r24, regs[24]),
658 REG_OFFSET_NAME(r25, regs[25]),
659 REG_OFFSET_NAME(r26, regs[26]),
660 REG_OFFSET_NAME(r27, regs[27]),
661 REG_OFFSET_NAME(r28, regs[28]),
662 REG_OFFSET_NAME(r29, regs[29]),
663 REG_OFFSET_NAME(r30, regs[30]),
664 REG_OFFSET_NAME(r31, regs[31]),
665 REG_OFFSET_NAME(c0_status, cp0_status),
666 REG_OFFSET_NAME(hi, hi),
667 REG_OFFSET_NAME(lo, lo),
668 #ifdef CONFIG_CPU_HAS_SMARTMIPS
669 REG_OFFSET_NAME(acx, acx),
671 REG_OFFSET_NAME(c0_badvaddr, cp0_badvaddr),
672 REG_OFFSET_NAME(c0_cause, cp0_cause),
673 REG_OFFSET_NAME(c0_epc, cp0_epc),
674 #ifdef CONFIG_CPU_CAVIUM_OCTEON
675 REG_OFFSET_NAME(mpl0, mpl[0]),
676 REG_OFFSET_NAME(mpl1, mpl[1]),
677 REG_OFFSET_NAME(mpl2, mpl[2]),
678 REG_OFFSET_NAME(mtp0, mtp[0]),
679 REG_OFFSET_NAME(mtp1, mtp[1]),
680 REG_OFFSET_NAME(mtp2, mtp[2]),
686 * regs_query_register_offset() - query register offset from its name
687 * @name: the name of a register
689 * regs_query_register_offset() returns the offset of a register in struct
690 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
692 int regs_query_register_offset(const char *name)
694 const struct pt_regs_offset *roff;
695 for (roff = regoffset_table; roff->name != NULL; roff++)
696 if (!strcmp(roff->name, name))
701 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
703 static const struct user_regset mips_regsets[] = {
705 .core_note_type = NT_PRSTATUS,
707 .size = sizeof(unsigned int),
708 .align = sizeof(unsigned int),
713 .core_note_type = NT_PRFPREG,
715 .size = sizeof(elf_fpreg_t),
716 .align = sizeof(elf_fpreg_t),
722 static const struct user_regset_view user_mips_view = {
724 .e_machine = ELF_ARCH,
725 .ei_osabi = ELF_OSABI,
726 .regsets = mips_regsets,
727 .n = ARRAY_SIZE(mips_regsets),
730 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
734 static const struct user_regset mips64_regsets[] = {
736 .core_note_type = NT_PRSTATUS,
738 .size = sizeof(unsigned long),
739 .align = sizeof(unsigned long),
744 .core_note_type = NT_PRFPREG,
746 .size = sizeof(elf_fpreg_t),
747 .align = sizeof(elf_fpreg_t),
753 static const struct user_regset_view user_mips64_view = {
755 .e_machine = ELF_ARCH,
756 .ei_osabi = ELF_OSABI,
757 .regsets = mips64_regsets,
758 .n = ARRAY_SIZE(mips64_regsets),
761 #ifdef CONFIG_MIPS32_N32
763 static const struct user_regset_view user_mipsn32_view = {
765 .e_flags = EF_MIPS_ABI2,
766 .e_machine = ELF_ARCH,
767 .ei_osabi = ELF_OSABI,
768 .regsets = mips64_regsets,
769 .n = ARRAY_SIZE(mips64_regsets),
772 #endif /* CONFIG_MIPS32_N32 */
774 #endif /* CONFIG_64BIT */
776 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
779 return &user_mips_view;
781 #ifdef CONFIG_MIPS32_O32
782 if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
783 return &user_mips_view;
785 #ifdef CONFIG_MIPS32_N32
786 if (test_tsk_thread_flag(task, TIF_32BIT_ADDR))
787 return &user_mipsn32_view;
789 return &user_mips64_view;
793 long arch_ptrace(struct task_struct *child, long request,
794 unsigned long addr, unsigned long data)
797 void __user *addrp = (void __user *) addr;
798 void __user *datavp = (void __user *) data;
799 unsigned long __user *datalp = (void __user *) data;
802 /* when I and D space are separate, these will need to be fixed. */
803 case PTRACE_PEEKTEXT: /* read word at location addr. */
804 case PTRACE_PEEKDATA:
805 ret = generic_ptrace_peekdata(child, addr, data);
808 /* Read the word at location addr in the USER area. */
809 case PTRACE_PEEKUSR: {
810 struct pt_regs *regs;
812 unsigned long tmp = 0;
814 regs = task_pt_regs(child);
815 ret = 0; /* Default return value. */
819 tmp = regs->regs[addr];
821 case FPR_BASE ... FPR_BASE + 31:
822 if (!tsk_used_math(child)) {
823 /* FP not yet used */
827 fregs = get_fpu_regs(child);
830 if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
832 * The odd registers are actually the high
833 * order bits of the values stored in the even
834 * registers - unless we're using r2k_switch.S.
836 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
841 tmp = get_fpr64(&fregs[addr - FPR_BASE], 0);
847 tmp = regs->cp0_cause;
850 tmp = regs->cp0_badvaddr;
858 #ifdef CONFIG_CPU_HAS_SMARTMIPS
864 tmp = child->thread.fpu.fcr31;
867 /* implementation / version register */
868 tmp = boot_cpu_data.fpu_id;
870 case DSP_BASE ... DSP_BASE + 5: {
878 dregs = __get_dsp_regs(child);
879 tmp = dregs[addr - DSP_BASE];
888 tmp = child->thread.dsp.dspcontrol;
895 ret = put_user(tmp, datalp);
899 /* when I and D space are separate, this will have to be fixed. */
900 case PTRACE_POKETEXT: /* write the word at location addr. */
901 case PTRACE_POKEDATA:
902 ret = generic_ptrace_pokedata(child, addr, data);
905 case PTRACE_POKEUSR: {
906 struct pt_regs *regs;
908 regs = task_pt_regs(child);
912 regs->regs[addr] = data;
914 case FPR_BASE ... FPR_BASE + 31: {
915 union fpureg *fregs = get_fpu_regs(child);
919 if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
921 * The odd registers are actually the high
922 * order bits of the values stored in the even
923 * registers - unless we're using r2k_switch.S.
925 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
930 set_fpr64(&fregs[addr - FPR_BASE], 0, data);
934 regs->cp0_epc = data;
942 #ifdef CONFIG_CPU_HAS_SMARTMIPS
949 ptrace_setfcr31(child, data);
951 case DSP_BASE ... DSP_BASE + 5: {
959 dregs = __get_dsp_regs(child);
960 dregs[addr - DSP_BASE] = data;
968 child->thread.dsp.dspcontrol = data;
971 /* The rest are not allowed. */
979 ret = ptrace_getregs(child, datavp);
983 ret = ptrace_setregs(child, datavp);
986 case PTRACE_GETFPREGS:
987 ret = ptrace_getfpregs(child, datavp);
990 case PTRACE_SETFPREGS:
991 ret = ptrace_setfpregs(child, datavp);
994 case PTRACE_GET_THREAD_AREA:
995 ret = put_user(task_thread_info(child)->tp_value, datalp);
998 case PTRACE_GET_WATCH_REGS:
999 ret = ptrace_get_watch_regs(child, addrp);
1002 case PTRACE_SET_WATCH_REGS:
1003 ret = ptrace_set_watch_regs(child, addrp);
1007 ret = ptrace_request(child, request, addr, data);
1015 * Notification of system call entry/exit
1016 * - triggered by current->work.syscall_trace
1018 asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
1022 current_thread_info()->syscall = syscall;
1024 if (test_thread_flag(TIF_SYSCALL_TRACE) &&
1025 tracehook_report_syscall_entry(regs))
1028 if (secure_computing(NULL) == -1)
1031 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1032 trace_sys_enter(regs, regs->regs[2]);
1034 audit_syscall_entry(syscall, regs->regs[4], regs->regs[5],
1035 regs->regs[6], regs->regs[7]);
1040 * Notification of system call entry/exit
1041 * - triggered by current->work.syscall_trace
1043 asmlinkage void syscall_trace_leave(struct pt_regs *regs)
1046 * We may come here right after calling schedule_user()
1047 * or do_notify_resume(), in which case we can be in RCU
1052 audit_syscall_exit(regs);
1054 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1055 trace_sys_exit(regs, regs_return_value(regs));
1057 if (test_thread_flag(TIF_SYSCALL_TRACE))
1058 tracehook_report_syscall_exit(regs, 0);