arch/mips/kernel/ptrace.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1992 Ross Biro
   7  * Copyright (C) Linus Torvalds
   8  * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
   9  * Copyright (C) 1996 David S. Miller
  10  * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  11  * Copyright (C) 1999 MIPS Technologies, Inc.
  12  * Copyright (C) 2000 Ulf Carlsson
  13  *
  14  * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
  15  * binaries.
  16  */
  17 #include <linux/compiler.h>
  18 #include <linux/context_tracking.h>
  19 #include <linux/elf.h>
  20 #include <linux/kernel.h>
  21 #include <linux/sched.h>
  22 #include <linux/mm.h>
  23 #include <linux/errno.h>
  24 #include <linux/ptrace.h>
  25 #include <linux/regset.h>
  26 #include <linux/smp.h>
  27 #include <linux/security.h>
  28 #include <linux/stddef.h>
  29 #include <linux/tracehook.h>
  30 #include <linux/audit.h>
  31 #include <linux/seccomp.h>
  32 #include <linux/ftrace.h>
  33
  34 #include <asm/byteorder.h>
  35 #include <asm/cpu.h>
  36 #include <asm/cpu-info.h>
  37 #include <asm/dsp.h>
  38 #include <asm/fpu.h>
  39 #include <asm/mipsregs.h>
  40 #include <asm/mipsmtregs.h>
  41 #include <asm/pgtable.h>
  42 #include <asm/page.h>
  43 #include <asm/syscall.h>
  44 #include <asm/uaccess.h>
  45 #include <asm/bootinfo.h>
  46 #include <asm/reg.h>
  47
  48 #define CREATE_TRACE_POINTS
  49 #include <trace/events/syscalls.h>
  50
  51 static void init_fp_ctx(struct task_struct *target)
  52 {
  53         /* If FP has been used then the target already has context */
  54         if (tsk_used_math(target))
  55                 return;
  56
  57         /* Begin with data registers set to all 1s... */
  58         memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
  59
  60         /* FCSR has been preset by `mips_set_personality_nan'.  */
  61
  62         /*
  63          * Record that the target has "used" math, such that the context
  64          * just initialised, and any modifications made by the caller,
  65          * aren't discarded.
  66          */
  67         set_stopped_child_used_math(target);
  68 }
  69
  70 /*
  71  * Called by kernel/ptrace.c when detaching..
  72  *
  73  * Make sure single step bits etc are not set.
  74  */
  75 void ptrace_disable(struct task_struct *child)
  76 {
  77         /* Don't load the watchpoint registers for the ex-child. */
  78         clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
  79 }
  80
  81 /*
  82  * Poke at FCSR according to its mask.  Set the Cause bits even
  83  * if a corresponding Enable bit is set.  This will be noticed at
  84  * the time the thread is switched to and SIGFPE thrown accordingly.
  85  */
  86 static void ptrace_setfcr31(struct task_struct *child, u32 value)
  87 {
  88         u32 fcr31;
  89         u32 mask;
  90
  91         fcr31 = child->thread.fpu.fcr31;
  92         mask = boot_cpu_data.fpu_msk31;
  93         child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
  94 }
  95
  96 /*
  97  * Read a general register set.  We always use the 64-bit format, even
  98  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
  99  * Registers are sign extended to fill the available space.
 100  */
 101 int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data)
 102 {
 103         struct pt_regs *regs;
 104         int i;
 105
 106         if (!access_ok(VERIFY_WRITE, data, 38 * 8))
 107                 return -EIO;
 108
 109         regs = task_pt_regs(child);
 110
 111         for (i = 0; i < 32; i++)
 112                 __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]);
 113         __put_user((long)regs->lo, (__s64 __user *)&data->lo);
 114         __put_user((long)regs->hi, (__s64 __user *)&data->hi);
 115         __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
 116         __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr);
 117         __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status);
 118         __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause);
 119
 120         return 0;
 121 }
 122
 123 /*
 124  * Write a general register set.  As for PTRACE_GETREGS, we always use
 125  * the 64-bit format.  On a 32-bit kernel only the lower order half
 126  * (according to endianness) will be used.
 127  */
 128 int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
 129 {
 130         struct pt_regs *regs;
 131         int i;
 132
 133         if (!access_ok(VERIFY_READ, data, 38 * 8))
 134                 return -EIO;
 135
 136         regs = task_pt_regs(child);
 137
 138         for (i = 0; i < 32; i++)
 139                 __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]);
 140         __get_user(regs->lo, (__s64 __user *)&data->lo);
 141         __get_user(regs->hi, (__s64 __user *)&data->hi);
 142         __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
 143
 144         /* badvaddr, status, and cause may not be written.  */
 145
 146         return 0;
 147 }
 148
 149 int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
 150 {
 151         int i;
 152
 153         if (!access_ok(VERIFY_WRITE, data, 33 * 8))
 154                 return -EIO;
 155
 156         if (tsk_used_math(child)) {
 157                 union fpureg *fregs = get_fpu_regs(child);
 158                 for (i = 0; i < 32; i++)
 159                         __put_user(get_fpr64(&fregs[i], 0),
 160                                    i + (__u64 __user *)data);
 161         } else {
 162                 for (i = 0; i < 32; i++)
 163                         __put_user((__u64) -1, i + (__u64 __user *) data);
 164         }
 165
 166         __put_user(child->thread.fpu.fcr31, data + 64);
 167         __put_user(boot_cpu_data.fpu_id, data + 65);
 168
 169         return 0;
 170 }
 171
 172 int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
 173 {
 174         union fpureg *fregs;
 175         u64 fpr_val;
 176         u32 value;
 177         int i;
 178
 179         if (!access_ok(VERIFY_READ, data, 33 * 8))
 180                 return -EIO;
 181
 182         init_fp_ctx(child);
 183         fregs = get_fpu_regs(child);
 184
 185         for (i = 0; i < 32; i++) {
 186                 __get_user(fpr_val, i + (__u64 __user *)data);
 187                 set_fpr64(&fregs[i], 0, fpr_val);
 188         }
 189
 190         __get_user(value, data + 64);
 191         ptrace_setfcr31(child, value);
 192
 193         /* FIR may not be written.  */
 194
 195         return 0;
 196 }
 197
 198 int ptrace_get_watch_regs(struct task_struct *child,
 199                           struct pt_watch_regs __user *addr)
 200 {
 201         enum pt_watch_style style;
 202         int i;
 203
 204         if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
 205                 return -EIO;
 206         if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
 207                 return -EIO;
 208
 209 #ifdef CONFIG_32BIT
 210         style = pt_watch_style_mips32;
 211 #define WATCH_STYLE mips32
 212 #else
 213         style = pt_watch_style_mips64;
 214 #define WATCH_STYLE mips64
 215 #endif
 216
 217         __put_user(style, &addr->style);
 218         __put_user(boot_cpu_data.watch_reg_use_cnt,
 219                    &addr->WATCH_STYLE.num_valid);
 220         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
 221                 __put_user(child->thread.watch.mips3264.watchlo[i],
 222                            &addr->WATCH_STYLE.watchlo[i]);
 223                 __put_user(child->thread.watch.mips3264.watchhi[i] &
 224                                 (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW),
 225                            &addr->WATCH_STYLE.watchhi[i]);
 226                 __put_user(boot_cpu_data.watch_reg_masks[i],
 227                            &addr->WATCH_STYLE.watch_masks[i]);
 228         }
 229         for (; i < 8; i++) {
 230                 __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
 231                 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
 232                 __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
 233         }
 234
 235         return 0;
 236 }
 237
 238 int ptrace_set_watch_regs(struct task_struct *child,
 239                           struct pt_watch_regs __user *addr)
 240 {
 241         int i;
 242         int watch_active = 0;
 243         unsigned long lt[NUM_WATCH_REGS];
 244         u16 ht[NUM_WATCH_REGS];
 245
 246         if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
 247                 return -EIO;
 248         if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
 249                 return -EIO;
 250         /* Check the values. */
 251         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
 252                 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
 253 #ifdef CONFIG_32BIT
 254                 if (lt[i] & __UA_LIMIT)
 255                         return -EINVAL;
 256 #else
 257                 if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
 258                         if (lt[i] & 0xffffffff80000000UL)
 259                                 return -EINVAL;
 260                 } else {
 261                         if (lt[i] & __UA_LIMIT)
 262                                 return -EINVAL;
 263                 }
 264 #endif
 265                 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
 266                 if (ht[i] & ~MIPS_WATCHHI_MASK)
 267                         return -EINVAL;
 268         }
 269         /* Install them. */
 270         for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
 271                 if (lt[i] & MIPS_WATCHLO_IRW)
 272                         watch_active = 1;
 273                 child->thread.watch.mips3264.watchlo[i] = lt[i];
 274                 /* Set the G bit. */
 275                 child->thread.watch.mips3264.watchhi[i] = ht[i];
 276         }
 277
 278         if (watch_active)
 279                 set_tsk_thread_flag(child, TIF_LOAD_WATCH);
 280         else
 281                 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
 282
 283         return 0;
 284 }
 285
 286 /* regset get/set implementations */
 287
 288 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
 289
 290 static int gpr32_get(struct task_struct *target,
 291                      const struct user_regset *regset,
 292                      unsigned int pos, unsigned int count,
 293                      void *kbuf, void __user *ubuf)
 294 {
 295         struct pt_regs *regs = task_pt_regs(target);
 296         u32 uregs[ELF_NGREG] = {};
 297         unsigned i;
 298
 299         for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
 300                 /* k0/k1 are copied as zero. */
 301                 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
 302                         continue;
 303
 304                 uregs[i] = regs->regs[i - MIPS32_EF_R0];
 305         }
 306
 307         uregs[MIPS32_EF_LO] = regs->lo;
 308         uregs[MIPS32_EF_HI] = regs->hi;
 309         uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
 310         uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
 311         uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
 312         uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
 313
 314         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
 315                                    sizeof(uregs));
 316 }
 317
 318 static int gpr32_set(struct task_struct *target,
 319                      const struct user_regset *regset,
 320                      unsigned int pos, unsigned int count,
 321                      const void *kbuf, const void __user *ubuf)
 322 {
 323         struct pt_regs *regs = task_pt_regs(target);
 324         u32 uregs[ELF_NGREG];
 325         unsigned start, num_regs, i;
 326         int err;
 327
 328         start = pos / sizeof(u32);
 329         num_regs = count / sizeof(u32);
 330
 331         if (start + num_regs > ELF_NGREG)
 332                 return -EIO;
 333
 334         err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
 335                                  sizeof(uregs));
 336         if (err)
 337                 return err;
 338
 339         for (i = start; i < num_regs; i++) {
 340                 /*
 341                  * Cast all values to signed here so that if this is a 64-bit
 342                  * kernel, the supplied 32-bit values will be sign extended.
 343                  */
 344                 switch (i) {
 345                 case MIPS32_EF_R1 ... MIPS32_EF_R25:
 346                         /* k0/k1 are ignored. */
 347                 case MIPS32_EF_R28 ... MIPS32_EF_R31:
 348                         regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i];
 349                         break;
 350                 case MIPS32_EF_LO:
 351                         regs->lo = (s32)uregs[i];
 352                         break;
 353                 case MIPS32_EF_HI:
 354                         regs->hi = (s32)uregs[i];
 355                         break;
 356                 case MIPS32_EF_CP0_EPC:
 357                         regs->cp0_epc = (s32)uregs[i];
 358                         break;
 359                 }
 360         }
 361
 362         return 0;
 363 }
 364
 365 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
 366
 367 #ifdef CONFIG_64BIT
 368
 369 static int gpr64_get(struct task_struct *target,
 370                      const struct user_regset *regset,
 371                      unsigned int pos, unsigned int count,
 372                      void *kbuf, void __user *ubuf)
 373 {
 374         struct pt_regs *regs = task_pt_regs(target);
 375         u64 uregs[ELF_NGREG] = {};
 376         unsigned i;
 377
 378         for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
 379                 /* k0/k1 are copied as zero. */
 380                 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
 381                         continue;
 382
 383                 uregs[i] = regs->regs[i - MIPS64_EF_R0];
 384         }
 385
 386         uregs[MIPS64_EF_LO] = regs->lo;
 387         uregs[MIPS64_EF_HI] = regs->hi;
 388         uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
 389         uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
 390         uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
 391         uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
 392
 393         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
 394                                    sizeof(uregs));
 395 }
 396
 397 static int gpr64_set(struct task_struct *target,
 398                      const struct user_regset *regset,
 399                      unsigned int pos, unsigned int count,
 400                      const void *kbuf, const void __user *ubuf)
 401 {
 402         struct pt_regs *regs = task_pt_regs(target);
 403         u64 uregs[ELF_NGREG];
 404         unsigned start, num_regs, i;
 405         int err;
 406
 407         start = pos / sizeof(u64);
 408         num_regs = count / sizeof(u64);
 409
 410         if (start + num_regs > ELF_NGREG)
 411                 return -EIO;
 412
 413         err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
 414                                  sizeof(uregs));
 415         if (err)
 416                 return err;
 417
 418         for (i = start; i < num_regs; i++) {
 419                 switch (i) {
 420                 case MIPS64_EF_R1 ... MIPS64_EF_R25:
 421                         /* k0/k1 are ignored. */
 422                 case MIPS64_EF_R28 ... MIPS64_EF_R31:
 423                         regs->regs[i - MIPS64_EF_R0] = uregs[i];
 424                         break;
 425                 case MIPS64_EF_LO:
 426                         regs->lo = uregs[i];
 427                         break;
 428                 case MIPS64_EF_HI:
 429                         regs->hi = uregs[i];
 430                         break;
 431                 case MIPS64_EF_CP0_EPC:
 432                         regs->cp0_epc = uregs[i];
 433                         break;
 434                 }
 435         }
 436
 437         return 0;
 438 }
 439
 440 #endif /* CONFIG_64BIT */
 441
 442 /*
 443  * Copy the floating-point context to the supplied NT_PRFPREG buffer,
 444  * !CONFIG_CPU_HAS_MSA variant.  FP context's general register slots
 445  * correspond 1:1 to buffer slots.  Only general registers are copied.
 446  */
 447 static int fpr_get_fpa(struct task_struct *target,
 448                        unsigned int *pos, unsigned int *count,
 449                        void **kbuf, void __user **ubuf)
 450 {
 451         return user_regset_copyout(pos, count, kbuf, ubuf,
 452                                    &target->thread.fpu,
 453                                    0, NUM_FPU_REGS * sizeof(elf_fpreg_t));
 454 }
 455
 456 /*
 457  * Copy the floating-point context to the supplied NT_PRFPREG buffer,
 458  * CONFIG_CPU_HAS_MSA variant.  Only lower 64 bits of FP context's
 459  * general register slots are copied to buffer slots.  Only general
 460  * registers are copied.
 461  */
 462 static int fpr_get_msa(struct task_struct *target,
 463                        unsigned int *pos, unsigned int *count,
 464                        void **kbuf, void __user **ubuf)
 465 {
 466         unsigned int i;
 467         u64 fpr_val;
 468         int err;
 469
 470         BUILD_BUG_ON(sizeof(fpr_val) != sizeof(elf_fpreg_t));
 471         for (i = 0; i < NUM_FPU_REGS; i++) {
 472                 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
 473                 err = user_regset_copyout(pos, count, kbuf, ubuf,
 474                                           &fpr_val, i * sizeof(elf_fpreg_t),
 475                                           (i + 1) * sizeof(elf_fpreg_t));
 476                 if (err)
 477                         return err;
 478         }
 479
 480         return 0;
 481 }
 482
 483 /*
 484  * Copy the floating-point context to the supplied NT_PRFPREG buffer.
 485  * Choose the appropriate helper for general registers, and then copy
 486  * the FCSR and FIR registers separately.
 487  */
 488 static int fpr_get(struct task_struct *target,
 489                    const struct user_regset *regset,
 490                    unsigned int pos, unsigned int count,
 491                    void *kbuf, void __user *ubuf)
 492 {
 493         const int fcr31_pos = NUM_FPU_REGS * sizeof(elf_fpreg_t);
 494         const int fir_pos = fcr31_pos + sizeof(u32);
 495         int err;
 496
 497         if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t))
 498                 err = fpr_get_fpa(target, &pos, &count, &kbuf, &ubuf);
 499         else
 500                 err = fpr_get_msa(target, &pos, &count, &kbuf, &ubuf);
 501         if (err)
 502                 return err;
 503
 504         err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 505                                   &target->thread.fpu.fcr31,
 506                                   fcr31_pos, fcr31_pos + sizeof(u32));
 507         if (err)
 508                 return err;
 509
 510         err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 511                                   &boot_cpu_data.fpu_id,
 512                                   fir_pos, fir_pos + sizeof(u32));
 513
 514         return err;
 515 }
 516
 517 /*
 518  * Copy the supplied NT_PRFPREG buffer to the floating-point context,
 519  * !CONFIG_CPU_HAS_MSA variant.   Buffer slots correspond 1:1 to FP
 520  * context's general register slots.  Only general registers are copied.
 521  */
 522 static int fpr_set_fpa(struct task_struct *target,
 523                        unsigned int *pos, unsigned int *count,
 524                        const void **kbuf, const void __user **ubuf)
 525 {
 526         return user_regset_copyin(pos, count, kbuf, ubuf,
 527                                   &target->thread.fpu,
 528                                   0, NUM_FPU_REGS * sizeof(elf_fpreg_t));
 529 }
 530
 531 /*
 532  * Copy the supplied NT_PRFPREG buffer to the floating-point context,
 533  * CONFIG_CPU_HAS_MSA variant.  Buffer slots are copied to lower 64
 534  * bits only of FP context's general register slots.  Only general
 535  * registers are copied.
 536  */
 537 static int fpr_set_msa(struct task_struct *target,
 538                        unsigned int *pos, unsigned int *count,
 539                        const void **kbuf, const void __user **ubuf)
 540 {
 541         unsigned int i;
 542         u64 fpr_val;
 543         int err;
 544
 545         BUILD_BUG_ON(sizeof(fpr_val) != sizeof(elf_fpreg_t));
 546         for (i = 0; i < NUM_FPU_REGS && *count > 0; i++) {
 547                 err = user_regset_copyin(pos, count, kbuf, ubuf,
 548                                          &fpr_val, i * sizeof(elf_fpreg_t),
 549                                          (i + 1) * sizeof(elf_fpreg_t));
 550                 if (err)
 551                         return err;
 552                 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
 553         }
 554
 555         return 0;
 556 }
 557
 558 /*
 559  * Copy the supplied NT_PRFPREG buffer to the floating-point context.
 560  * Choose the appropriate helper for general registers, and then copy
 561  * the FCSR register separately.  Ignore the incoming FIR register
 562  * contents though, as the register is read-only.
 563  *
 564  * We optimize for the case where `count % sizeof(elf_fpreg_t) == 0',
 565  * which is supposed to have been guaranteed by the kernel before
 566  * calling us, e.g. in `ptrace_regset'.  We enforce that requirement,
 567  * so that we can safely avoid preinitializing temporaries for
 568  * partial register writes.
 569  */
 570 static int fpr_set(struct task_struct *target,
 571                    const struct user_regset *regset,
 572                    unsigned int pos, unsigned int count,
 573                    const void *kbuf, const void __user *ubuf)
 574 {
 575         const int fcr31_pos = NUM_FPU_REGS * sizeof(elf_fpreg_t);
 576         const int fir_pos = fcr31_pos + sizeof(u32);
 577         u32 fcr31;
 578         int err;
 579
 580         BUG_ON(count % sizeof(elf_fpreg_t));
 581
 582         if (pos + count > sizeof(elf_fpregset_t))
 583                 return -EIO;
 584
 585         init_fp_ctx(target);
 586
 587         if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t))
 588                 err = fpr_set_fpa(target, &pos, &count, &kbuf, &ubuf);
 589         else
 590                 err = fpr_set_msa(target, &pos, &count, &kbuf, &ubuf);
 591         if (err)
 592                 return err;
 593
 594         if (count > 0) {
 595                 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 596                                          &fcr31,
 597                                          fcr31_pos, fcr31_pos + sizeof(u32));
 598                 if (err)
 599                         return err;
 600
 601                 ptrace_setfcr31(target, fcr31);
 602         }
 603
 604         if (count > 0)
 605                 err = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
 606                                                 fir_pos,
 607                                                 fir_pos + sizeof(u32));
 608
 609         return err;
 610 }
 611
 612 enum mips_regset {
 613         REGSET_GPR,
 614         REGSET_FPR,
 615 };
 616
 617 struct pt_regs_offset {
 618         const char *name;
 619         int offset;
 620 };
 621
 622 #define REG_OFFSET_NAME(reg, r) {                                       \
 623         .name = #reg,                                                   \
 624         .offset = offsetof(struct pt_regs, r)                           \
 625 }
 626
 627 #define REG_OFFSET_END {                                                \
 628         .name = NULL,                                                   \
 629         .offset = 0                                                     \
 630 }
 631
 632 static const struct pt_regs_offset regoffset_table[] = {
 633         REG_OFFSET_NAME(r0, regs[0]),
 634         REG_OFFSET_NAME(r1, regs[1]),
 635         REG_OFFSET_NAME(r2, regs[2]),
 636         REG_OFFSET_NAME(r3, regs[3]),
 637         REG_OFFSET_NAME(r4, regs[4]),
 638         REG_OFFSET_NAME(r5, regs[5]),
 639         REG_OFFSET_NAME(r6, regs[6]),
 640         REG_OFFSET_NAME(r7, regs[7]),
 641         REG_OFFSET_NAME(r8, regs[8]),
 642         REG_OFFSET_NAME(r9, regs[9]),
 643         REG_OFFSET_NAME(r10, regs[10]),
 644         REG_OFFSET_NAME(r11, regs[11]),
 645         REG_OFFSET_NAME(r12, regs[12]),
 646         REG_OFFSET_NAME(r13, regs[13]),
 647         REG_OFFSET_NAME(r14, regs[14]),
 648         REG_OFFSET_NAME(r15, regs[15]),
 649         REG_OFFSET_NAME(r16, regs[16]),
 650         REG_OFFSET_NAME(r17, regs[17]),
 651         REG_OFFSET_NAME(r18, regs[18]),
 652         REG_OFFSET_NAME(r19, regs[19]),
 653         REG_OFFSET_NAME(r20, regs[20]),
 654         REG_OFFSET_NAME(r21, regs[21]),
 655         REG_OFFSET_NAME(r22, regs[22]),
 656         REG_OFFSET_NAME(r23, regs[23]),
 657         REG_OFFSET_NAME(r24, regs[24]),
 658         REG_OFFSET_NAME(r25, regs[25]),
 659         REG_OFFSET_NAME(r26, regs[26]),
 660         REG_OFFSET_NAME(r27, regs[27]),
 661         REG_OFFSET_NAME(r28, regs[28]),
 662         REG_OFFSET_NAME(r29, regs[29]),
 663         REG_OFFSET_NAME(r30, regs[30]),
 664         REG_OFFSET_NAME(r31, regs[31]),
 665         REG_OFFSET_NAME(c0_status, cp0_status),
 666         REG_OFFSET_NAME(hi, hi),
 667         REG_OFFSET_NAME(lo, lo),
 668 #ifdef CONFIG_CPU_HAS_SMARTMIPS
 669         REG_OFFSET_NAME(acx, acx),
 670 #endif
 671         REG_OFFSET_NAME(c0_badvaddr, cp0_badvaddr),
 672         REG_OFFSET_NAME(c0_cause, cp0_cause),
 673         REG_OFFSET_NAME(c0_epc, cp0_epc),
 674 #ifdef CONFIG_CPU_CAVIUM_OCTEON
 675         REG_OFFSET_NAME(mpl0, mpl[0]),
 676         REG_OFFSET_NAME(mpl1, mpl[1]),
 677         REG_OFFSET_NAME(mpl2, mpl[2]),
 678         REG_OFFSET_NAME(mtp0, mtp[0]),
 679         REG_OFFSET_NAME(mtp1, mtp[1]),
 680         REG_OFFSET_NAME(mtp2, mtp[2]),
 681 #endif
 682         REG_OFFSET_END,
 683 };
 684
 685 /**
 686  * regs_query_register_offset() - query register offset from its name
 687  * @name:       the name of a register
 688  *
 689  * regs_query_register_offset() returns the offset of a register in struct
 690  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
 691  */
 692 int regs_query_register_offset(const char *name)
 693 {
 694         const struct pt_regs_offset *roff;
 695         for (roff = regoffset_table; roff->name != NULL; roff++)
 696                 if (!strcmp(roff->name, name))
 697                         return roff->offset;
 698         return -EINVAL;
 699 }
 700
 701 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
 702
 703 static const struct user_regset mips_regsets[] = {
 704         [REGSET_GPR] = {
 705                 .core_note_type = NT_PRSTATUS,
 706                 .n              = ELF_NGREG,
 707                 .size           = sizeof(unsigned int),
 708                 .align          = sizeof(unsigned int),
 709                 .get            = gpr32_get,
 710                 .set            = gpr32_set,
 711         },
 712         [REGSET_FPR] = {
 713                 .core_note_type = NT_PRFPREG,
 714                 .n              = ELF_NFPREG,
 715                 .size           = sizeof(elf_fpreg_t),
 716                 .align          = sizeof(elf_fpreg_t),
 717                 .get            = fpr_get,
 718                 .set            = fpr_set,
 719         },
 720 };
 721
 722 static const struct user_regset_view user_mips_view = {
 723         .name           = "mips",
 724         .e_machine      = ELF_ARCH,
 725         .ei_osabi       = ELF_OSABI,
 726         .regsets        = mips_regsets,
 727         .n              = ARRAY_SIZE(mips_regsets),
 728 };
 729
 730 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
 731
 732 #ifdef CONFIG_64BIT
 733
 734 static const struct user_regset mips64_regsets[] = {
 735         [REGSET_GPR] = {
 736                 .core_note_type = NT_PRSTATUS,
 737                 .n              = ELF_NGREG,
 738                 .size           = sizeof(unsigned long),
 739                 .align          = sizeof(unsigned long),
 740                 .get            = gpr64_get,
 741                 .set            = gpr64_set,
 742         },
 743         [REGSET_FPR] = {
 744                 .core_note_type = NT_PRFPREG,
 745                 .n              = ELF_NFPREG,
 746                 .size           = sizeof(elf_fpreg_t),
 747                 .align          = sizeof(elf_fpreg_t),
 748                 .get            = fpr_get,
 749                 .set            = fpr_set,
 750         },
 751 };
 752
 753 static const struct user_regset_view user_mips64_view = {
 754         .name           = "mips64",
 755         .e_machine      = ELF_ARCH,
 756         .ei_osabi       = ELF_OSABI,
 757         .regsets        = mips64_regsets,
 758         .n              = ARRAY_SIZE(mips64_regsets),
 759 };
 760
 761 #ifdef CONFIG_MIPS32_N32
 762
 763 static const struct user_regset_view user_mipsn32_view = {
 764         .name           = "mipsn32",
 765         .e_flags        = EF_MIPS_ABI2,
 766         .e_machine      = ELF_ARCH,
 767         .ei_osabi       = ELF_OSABI,
 768         .regsets        = mips64_regsets,
 769         .n              = ARRAY_SIZE(mips64_regsets),
 770 };
 771
 772 #endif /* CONFIG_MIPS32_N32 */
 773
 774 #endif /* CONFIG_64BIT */
 775
 776 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
 777 {
 778 #ifdef CONFIG_32BIT
 779         return &user_mips_view;
 780 #else
 781 #ifdef CONFIG_MIPS32_O32
 782         if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
 783                 return &user_mips_view;
 784 #endif
 785 #ifdef CONFIG_MIPS32_N32
 786         if (test_tsk_thread_flag(task, TIF_32BIT_ADDR))
 787                 return &user_mipsn32_view;
 788 #endif
 789         return &user_mips64_view;
 790 #endif
 791 }
 792
 793 long arch_ptrace(struct task_struct *child, long request,
 794                  unsigned long addr, unsigned long data)
 795 {
 796         int ret;
 797         void __user *addrp = (void __user *) addr;
 798         void __user *datavp = (void __user *) data;
 799         unsigned long __user *datalp = (void __user *) data;
 800
 801         switch (request) {
 802         /* when I and D space are separate, these will need to be fixed. */
 803         case PTRACE_PEEKTEXT: /* read word at location addr. */
 804         case PTRACE_PEEKDATA:
 805                 ret = generic_ptrace_peekdata(child, addr, data);
 806                 break;
 807
 808         /* Read the word at location addr in the USER area. */
 809         case PTRACE_PEEKUSR: {
 810                 struct pt_regs *regs;
 811                 union fpureg *fregs;
 812                 unsigned long tmp = 0;
 813
 814                 regs = task_pt_regs(child);
 815                 ret = 0;  /* Default return value. */
 816
 817                 switch (addr) {
 818                 case 0 ... 31:
 819                         tmp = regs->regs[addr];
 820                         break;
 821                 case FPR_BASE ... FPR_BASE + 31:
 822                         if (!tsk_used_math(child)) {
 823                                 /* FP not yet used */
 824                                 tmp = -1;
 825                                 break;
 826                         }
 827                         fregs = get_fpu_regs(child);
 828
 829 #ifdef CONFIG_32BIT
 830                         if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
 831                                 /*
 832                                  * The odd registers are actually the high
 833                                  * order bits of the values stored in the even
 834                                  * registers - unless we're using r2k_switch.S.
 835                                  */
 836                                 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
 837                                                 addr & 1);
 838                                 break;
 839                         }
 840 #endif
 841                         tmp = get_fpr64(&fregs[addr - FPR_BASE], 0);
 842                         break;
 843                 case PC:
 844                         tmp = regs->cp0_epc;
 845                         break;
 846                 case CAUSE:
 847                         tmp = regs->cp0_cause;
 848                         break;
 849                 case BADVADDR:
 850                         tmp = regs->cp0_badvaddr;
 851                         break;
 852                 case MMHI:
 853                         tmp = regs->hi;
 854                         break;
 855                 case MMLO:
 856                         tmp = regs->lo;
 857                         break;
 858 #ifdef CONFIG_CPU_HAS_SMARTMIPS
 859                 case ACX:
 860                         tmp = regs->acx;
 861                         break;
 862 #endif
 863                 case FPC_CSR:
 864                         tmp = child->thread.fpu.fcr31;
 865                         break;
 866                 case FPC_EIR:
 867                         /* implementation / version register */
 868                         tmp = boot_cpu_data.fpu_id;
 869                         break;
 870                 case DSP_BASE ... DSP_BASE + 5: {
 871                         dspreg_t *dregs;
 872
 873                         if (!cpu_has_dsp) {
 874                                 tmp = 0;
 875                                 ret = -EIO;
 876                                 goto out;
 877                         }
 878                         dregs = __get_dsp_regs(child);
 879                         tmp = dregs[addr - DSP_BASE];
 880                         break;
 881                 }
 882                 case DSP_CONTROL:
 883                         if (!cpu_has_dsp) {
 884                                 tmp = 0;
 885                                 ret = -EIO;
 886                                 goto out;
 887                         }
 888                         tmp = child->thread.dsp.dspcontrol;
 889                         break;
 890                 default:
 891                         tmp = 0;
 892                         ret = -EIO;
 893                         goto out;
 894                 }
 895                 ret = put_user(tmp, datalp);
 896                 break;
 897         }
 898
 899         /* when I and D space are separate, this will have to be fixed. */
 900         case PTRACE_POKETEXT: /* write the word at location addr. */
 901         case PTRACE_POKEDATA:
 902                 ret = generic_ptrace_pokedata(child, addr, data);
 903                 break;
 904
 905         case PTRACE_POKEUSR: {
 906                 struct pt_regs *regs;
 907                 ret = 0;
 908                 regs = task_pt_regs(child);
 909
 910                 switch (addr) {
 911                 case 0 ... 31:
 912                         regs->regs[addr] = data;
 913                         break;
 914                 case FPR_BASE ... FPR_BASE + 31: {
 915                         union fpureg *fregs = get_fpu_regs(child);
 916
 917                         init_fp_ctx(child);
 918 #ifdef CONFIG_32BIT
 919                         if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
 920                                 /*
 921                                  * The odd registers are actually the high
 922                                  * order bits of the values stored in the even
 923                                  * registers - unless we're using r2k_switch.S.
 924                                  */
 925                                 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
 926                                           addr & 1, data);
 927                                 break;
 928                         }
 929 #endif
 930                         set_fpr64(&fregs[addr - FPR_BASE], 0, data);
 931                         break;
 932                 }
 933                 case PC:
 934                         regs->cp0_epc = data;
 935                         break;
 936                 case MMHI:
 937                         regs->hi = data;
 938                         break;
 939                 case MMLO:
 940                         regs->lo = data;
 941                         break;
 942 #ifdef CONFIG_CPU_HAS_SMARTMIPS
 943                 case ACX:
 944                         regs->acx = data;
 945                         break;
 946 #endif
 947                 case FPC_CSR:
 948                         init_fp_ctx(child);
 949                         ptrace_setfcr31(child, data);
 950                         break;
 951                 case DSP_BASE ... DSP_BASE + 5: {
 952                         dspreg_t *dregs;
 953
 954                         if (!cpu_has_dsp) {
 955                                 ret = -EIO;
 956                                 break;
 957                         }
 958
 959                         dregs = __get_dsp_regs(child);
 960                         dregs[addr - DSP_BASE] = data;
 961                         break;
 962                 }
 963                 case DSP_CONTROL:
 964                         if (!cpu_has_dsp) {
 965                                 ret = -EIO;
 966                                 break;
 967                         }
 968                         child->thread.dsp.dspcontrol = data;
 969                         break;
 970                 default:
 971                         /* The rest are not allowed. */
 972                         ret = -EIO;
 973                         break;
 974                 }
 975                 break;
 976                 }
 977
 978         case PTRACE_GETREGS:
 979                 ret = ptrace_getregs(child, datavp);
 980                 break;
 981
 982         case PTRACE_SETREGS:
 983                 ret = ptrace_setregs(child, datavp);
 984                 break;
 985
 986         case PTRACE_GETFPREGS:
 987                 ret = ptrace_getfpregs(child, datavp);
 988                 break;
 989
 990         case PTRACE_SETFPREGS:
 991                 ret = ptrace_setfpregs(child, datavp);
 992                 break;
 993
 994         case PTRACE_GET_THREAD_AREA:
 995                 ret = put_user(task_thread_info(child)->tp_value, datalp);
 996                 break;
 997
 998         case PTRACE_GET_WATCH_REGS:
 999                 ret = ptrace_get_watch_regs(child, addrp);
1000                 break;
1001
1002         case PTRACE_SET_WATCH_REGS:
1003                 ret = ptrace_set_watch_regs(child, addrp);
1004                 break;
1005
1006         default:
1007                 ret = ptrace_request(child, request, addr, data);
1008                 break;
1009         }
1010  out:
1011         return ret;
1012 }
1013
1014 /*
1015  * Notification of system call entry/exit
1016  * - triggered by current->work.syscall_trace
1017  */
1018 asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
1019 {
1020         user_exit();
1021
1022         current_thread_info()->syscall = syscall;
1023
1024         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
1025             tracehook_report_syscall_entry(regs))
1026                 return -1;
1027
1028         if (secure_computing(NULL) == -1)
1029                 return -1;
1030
1031         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1032                 trace_sys_enter(regs, regs->regs[2]);
1033
1034         audit_syscall_entry(syscall, regs->regs[4], regs->regs[5],
1035                             regs->regs[6], regs->regs[7]);
1036         return syscall;
1037 }
1038
1039 /*
1040  * Notification of system call entry/exit
1041  * - triggered by current->work.syscall_trace
1042  */
1043 asmlinkage void syscall_trace_leave(struct pt_regs *regs)
1044 {
1045         /*
1046          * We may come here right after calling schedule_user()
1047          * or do_notify_resume(), in which case we can be in RCU
1048          * user mode.
1049          */
1050         user_exit();
1051
1052         audit_syscall_exit(regs);
1053
1054         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1055                 trace_sys_exit(regs, regs_return_value(regs));
1056
1057         if (test_thread_flag(TIF_SYSCALL_TRACE))
1058                 tracehook_report_syscall_exit(regs, 0);
1059
1060         user_enter();
1061 }