GNU Linux-libre 4.9.333-gnu1
[releases.git] / arch / mips / kernel / process.c
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
7  * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
8  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
9  * Copyright (C) 2004 Thiemo Seufer
10  * Copyright (C) 2013  Imagination Technologies Ltd.
11  */
12 #include <linux/errno.h>
13 #include <linux/sched.h>
14 #include <linux/tick.h>
15 #include <linux/kernel.h>
16 #include <linux/mm.h>
17 #include <linux/stddef.h>
18 #include <linux/unistd.h>
19 #include <linux/export.h>
20 #include <linux/ptrace.h>
21 #include <linux/mman.h>
22 #include <linux/personality.h>
23 #include <linux/sys.h>
24 #include <linux/init.h>
25 #include <linux/completion.h>
26 #include <linux/kallsyms.h>
27 #include <linux/random.h>
28 #include <linux/prctl.h>
29 #include <linux/nmi.h>
30
31 #include <asm/asm.h>
32 #include <asm/bootinfo.h>
33 #include <asm/cpu.h>
34 #include <asm/dsemul.h>
35 #include <asm/dsp.h>
36 #include <asm/fpu.h>
37 #include <asm/irq.h>
38 #include <asm/msa.h>
39 #include <asm/pgtable.h>
40 #include <asm/mipsregs.h>
41 #include <asm/processor.h>
42 #include <asm/reg.h>
43 #include <asm/uaccess.h>
44 #include <asm/io.h>
45 #include <asm/elf.h>
46 #include <asm/isadep.h>
47 #include <asm/inst.h>
48 #include <asm/stacktrace.h>
49 #include <asm/irq_regs.h>
50
51 #ifdef CONFIG_HOTPLUG_CPU
52 void arch_cpu_idle_dead(void)
53 {
54         play_dead();
55 }
56 #endif
57
58 asmlinkage void ret_from_fork(void);
59 asmlinkage void ret_from_kernel_thread(void);
60
61 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
62 {
63         unsigned long status;
64
65         /* New thread loses kernel privileges. */
66         status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
67         status |= KU_USER;
68         regs->cp0_status = status;
69         lose_fpu(0);
70         clear_thread_flag(TIF_MSA_CTX_LIVE);
71         clear_used_math();
72         atomic_set(&current->thread.bd_emu_frame, BD_EMUFRAME_NONE);
73         init_dsp();
74         regs->cp0_epc = pc;
75         regs->regs[29] = sp;
76 }
77
78 void exit_thread(struct task_struct *tsk)
79 {
80         /*
81          * User threads may have allocated a delay slot emulation frame.
82          * If so, clean up that allocation.
83          */
84         if (!(current->flags & PF_KTHREAD))
85                 dsemul_thread_cleanup(tsk);
86 }
87
88 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
89 {
90         /*
91          * Save any process state which is live in hardware registers to the
92          * parent context prior to duplication. This prevents the new child
93          * state becoming stale if the parent is preempted before copy_thread()
94          * gets a chance to save the parent's live hardware registers to the
95          * child context.
96          */
97         preempt_disable();
98
99         if (is_msa_enabled())
100                 save_msa(current);
101         else if (is_fpu_owner())
102                 _save_fp(current);
103
104         save_dsp(current);
105
106         preempt_enable();
107
108         *dst = *src;
109         return 0;
110 }
111
112 /*
113  * Copy architecture-specific thread state
114  */
115 int copy_thread(unsigned long clone_flags, unsigned long usp,
116         unsigned long kthread_arg, struct task_struct *p)
117 {
118         struct thread_info *ti = task_thread_info(p);
119         struct pt_regs *childregs, *regs = current_pt_regs();
120         unsigned long childksp;
121
122         childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
123
124         /* set up new TSS. */
125         childregs = (struct pt_regs *) childksp - 1;
126         /*  Put the stack after the struct pt_regs.  */
127         childksp = (unsigned long) childregs;
128         p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
129         if (unlikely(p->flags & PF_KTHREAD)) {
130                 /* kernel thread */
131                 unsigned long status = p->thread.cp0_status;
132                 memset(childregs, 0, sizeof(struct pt_regs));
133                 ti->addr_limit = KERNEL_DS;
134                 p->thread.reg16 = usp; /* fn */
135                 p->thread.reg17 = kthread_arg;
136                 p->thread.reg29 = childksp;
137                 p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
138 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
139                 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
140                          ((status & (ST0_KUC | ST0_IEC)) << 2);
141 #else
142                 status |= ST0_EXL;
143 #endif
144                 childregs->cp0_status = status;
145                 return 0;
146         }
147
148         /* user thread */
149         *childregs = *regs;
150         childregs->regs[7] = 0; /* Clear error flag */
151         childregs->regs[2] = 0; /* Child gets zero as return value */
152         if (usp)
153                 childregs->regs[29] = usp;
154         ti->addr_limit = USER_DS;
155
156         p->thread.reg29 = (unsigned long) childregs;
157         p->thread.reg31 = (unsigned long) ret_from_fork;
158
159         /*
160          * New tasks lose permission to use the fpu. This accelerates context
161          * switching for most programs since they don't use the fpu.
162          */
163         childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
164
165         clear_tsk_thread_flag(p, TIF_USEDFPU);
166         clear_tsk_thread_flag(p, TIF_USEDMSA);
167         clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
168
169 #ifdef CONFIG_MIPS_MT_FPAFF
170         clear_tsk_thread_flag(p, TIF_FPUBOUND);
171 #endif /* CONFIG_MIPS_MT_FPAFF */
172
173         atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
174
175         if (clone_flags & CLONE_SETTLS)
176                 ti->tp_value = regs->regs[7];
177
178         return 0;
179 }
180
181 #ifdef CONFIG_CC_STACKPROTECTOR
182 #include <linux/stackprotector.h>
183 unsigned long __stack_chk_guard __read_mostly;
184 EXPORT_SYMBOL(__stack_chk_guard);
185 #endif
186
187 struct mips_frame_info {
188         void            *func;
189         unsigned long   func_size;
190         int             frame_size;
191         int             pc_offset;
192 };
193
194 #define J_TARGET(pc,target)     \
195                 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
196
197 static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
198 {
199 #ifdef CONFIG_CPU_MICROMIPS
200         /*
201          * swsp ra,offset
202          * swm16 reglist,offset(sp)
203          * swm32 reglist,offset(sp)
204          * sw32 ra,offset(sp)
205          * jradiussp - NOT SUPPORTED
206          *
207          * microMIPS is way more fun...
208          */
209         if (mm_insn_16bit(ip->halfword[1])) {
210                 switch (ip->mm16_r5_format.opcode) {
211                 case mm_swsp16_op:
212                         if (ip->mm16_r5_format.rt != 31)
213                                 return 0;
214
215                         *poff = ip->mm16_r5_format.imm;
216                         *poff = (*poff << 2) / sizeof(ulong);
217                         return 1;
218
219                 case mm_pool16c_op:
220                         switch (ip->mm16_m_format.func) {
221                         case mm_swm16_op:
222                                 *poff = ip->mm16_m_format.imm;
223                                 *poff += 1 + ip->mm16_m_format.rlist;
224                                 *poff = (*poff << 2) / sizeof(ulong);
225                                 return 1;
226
227                         default:
228                                 return 0;
229                         }
230
231                 default:
232                         return 0;
233                 }
234         }
235
236         switch (ip->i_format.opcode) {
237         case mm_sw32_op:
238                 if (ip->i_format.rs != 29)
239                         return 0;
240                 if (ip->i_format.rt != 31)
241                         return 0;
242
243                 *poff = ip->i_format.simmediate / sizeof(ulong);
244                 return 1;
245
246         case mm_pool32b_op:
247                 switch (ip->mm_m_format.func) {
248                 case mm_swm32_func:
249                         if (ip->mm_m_format.rd < 0x10)
250                                 return 0;
251                         if (ip->mm_m_format.base != 29)
252                                 return 0;
253
254                         *poff = ip->mm_m_format.simmediate;
255                         *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
256                         *poff /= sizeof(ulong);
257                         return 1;
258                 default:
259                         return 0;
260                 }
261
262         default:
263                 return 0;
264         }
265 #else
266         /* sw / sd $ra, offset($sp) */
267         if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
268                 ip->i_format.rs == 29 && ip->i_format.rt == 31) {
269                 *poff = ip->i_format.simmediate / sizeof(ulong);
270                 return 1;
271         }
272
273         return 0;
274 #endif
275 }
276
277 static inline int is_jump_ins(union mips_instruction *ip)
278 {
279 #ifdef CONFIG_CPU_MICROMIPS
280         /*
281          * jr16,jrc,jalr16,jalr16
282          * jal
283          * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
284          * jraddiusp - NOT SUPPORTED
285          *
286          * microMIPS is kind of more fun...
287          */
288         if (mm_insn_16bit(ip->halfword[1])) {
289                 if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
290                     (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
291                         return 1;
292                 return 0;
293         }
294
295         if (ip->j_format.opcode == mm_j32_op)
296                 return 1;
297         if (ip->j_format.opcode == mm_jal32_op)
298                 return 1;
299         if (ip->r_format.opcode != mm_pool32a_op ||
300                         ip->r_format.func != mm_pool32axf_op)
301                 return 0;
302         return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
303 #else
304         if (ip->j_format.opcode == j_op)
305                 return 1;
306         if (ip->j_format.opcode == jal_op)
307                 return 1;
308         if (ip->r_format.opcode != spec_op)
309                 return 0;
310         return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
311 #endif
312 }
313
314 static inline int is_sp_move_ins(union mips_instruction *ip)
315 {
316 #ifdef CONFIG_CPU_MICROMIPS
317         /*
318          * addiusp -imm
319          * addius5 sp,-imm
320          * addiu32 sp,sp,-imm
321          * jradiussp - NOT SUPPORTED
322          *
323          * microMIPS is not more fun...
324          */
325         if (mm_insn_16bit(ip->halfword[1])) {
326                 return (ip->mm16_r3_format.opcode == mm_pool16d_op &&
327                         ip->mm16_r3_format.simmediate && mm_addiusp_func) ||
328                        (ip->mm16_r5_format.opcode == mm_pool16d_op &&
329                         ip->mm16_r5_format.rt == 29);
330         }
331
332         return ip->mm_i_format.opcode == mm_addiu32_op &&
333                ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
334 #else
335         /* addiu/daddiu sp,sp,-imm */
336         if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
337                 return 0;
338         if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
339                 return 1;
340 #endif
341         return 0;
342 }
343
344 static int get_frame_info(struct mips_frame_info *info)
345 {
346         bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
347         union mips_instruction insn, *ip;
348         const unsigned int max_insns = 128;
349         unsigned int last_insn_size = 0;
350         unsigned int i;
351
352         info->pc_offset = -1;
353         info->frame_size = 0;
354
355         ip = (void *)msk_isa16_mode((ulong)info->func);
356         if (!ip)
357                 goto err;
358
359         for (i = 0; i < max_insns; i++) {
360                 ip = (void *)ip + last_insn_size;
361
362                 if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
363                         insn.halfword[0] = 0;
364                         insn.halfword[1] = ip->halfword[0];
365                         last_insn_size = 2;
366                 } else if (is_mmips) {
367                         insn.halfword[0] = ip->halfword[1];
368                         insn.halfword[1] = ip->halfword[0];
369                         last_insn_size = 4;
370                 } else {
371                         insn.word = ip->word;
372                         last_insn_size = 4;
373                 }
374
375                 if (is_jump_ins(&insn))
376                         break;
377
378                 if (!info->frame_size) {
379                         if (is_sp_move_ins(&insn))
380                         {
381 #ifdef CONFIG_CPU_MICROMIPS
382                                 if (mm_insn_16bit(ip->halfword[0]))
383                                 {
384                                         unsigned short tmp;
385
386                                         if (ip->halfword[0] & mm_addiusp_func)
387                                         {
388                                                 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
389                                                 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
390                                         } else {
391                                                 tmp = (ip->halfword[0] >> 1);
392                                                 info->frame_size = -(signed short)(tmp & 0xf);
393                                         }
394                                 } else
395 #endif
396                                 info->frame_size = - ip->i_format.simmediate;
397                         }
398                         continue;
399                 }
400                 if (info->pc_offset == -1 &&
401                     is_ra_save_ins(&insn, &info->pc_offset))
402                         break;
403         }
404         if (info->frame_size && info->pc_offset >= 0) /* nested */
405                 return 0;
406         if (info->pc_offset < 0) /* leaf */
407                 return 1;
408         /* prologue seems bogus... */
409 err:
410         return -1;
411 }
412
413 static struct mips_frame_info schedule_mfi __read_mostly;
414
415 #ifdef CONFIG_KALLSYMS
416 static unsigned long get___schedule_addr(void)
417 {
418         return kallsyms_lookup_name("__schedule");
419 }
420 #else
421 static unsigned long get___schedule_addr(void)
422 {
423         union mips_instruction *ip = (void *)schedule;
424         int max_insns = 8;
425         int i;
426
427         for (i = 0; i < max_insns; i++, ip++) {
428                 if (ip->j_format.opcode == j_op)
429                         return J_TARGET(ip, ip->j_format.target);
430         }
431         return 0;
432 }
433 #endif
434
435 static int __init frame_info_init(void)
436 {
437         unsigned long size = 0;
438 #ifdef CONFIG_KALLSYMS
439         unsigned long ofs;
440 #endif
441         unsigned long addr;
442
443         addr = get___schedule_addr();
444         if (!addr)
445                 addr = (unsigned long)schedule;
446
447 #ifdef CONFIG_KALLSYMS
448         kallsyms_lookup_size_offset(addr, &size, &ofs);
449 #endif
450         schedule_mfi.func = (void *)addr;
451         schedule_mfi.func_size = size;
452
453         get_frame_info(&schedule_mfi);
454
455         /*
456          * Without schedule() frame info, result given by
457          * thread_saved_pc() and get_wchan() are not reliable.
458          */
459         if (schedule_mfi.pc_offset < 0)
460                 printk("Can't analyze schedule() prologue at %p\n", schedule);
461
462         return 0;
463 }
464
465 arch_initcall(frame_info_init);
466
467 /*
468  * Return saved PC of a blocked thread.
469  */
470 unsigned long thread_saved_pc(struct task_struct *tsk)
471 {
472         struct thread_struct *t = &tsk->thread;
473
474         /* New born processes are a special case */
475         if (t->reg31 == (unsigned long) ret_from_fork)
476                 return t->reg31;
477         if (schedule_mfi.pc_offset < 0)
478                 return 0;
479         return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
480 }
481
482
483 #ifdef CONFIG_KALLSYMS
484 /* generic stack unwinding function */
485 unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
486                                               unsigned long *sp,
487                                               unsigned long pc,
488                                               unsigned long *ra)
489 {
490         unsigned long low, high, irq_stack_high;
491         struct mips_frame_info info;
492         unsigned long size, ofs;
493         struct pt_regs *regs;
494         int leaf;
495
496         if (!stack_page)
497                 return 0;
498
499         /*
500          * IRQ stacks start at IRQ_STACK_START
501          * task stacks at THREAD_SIZE - 32
502          */
503         low = stack_page;
504         if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) {
505                 high = stack_page + IRQ_STACK_START;
506                 irq_stack_high = high;
507         } else {
508                 high = stack_page + THREAD_SIZE - 32;
509                 irq_stack_high = 0;
510         }
511
512         /*
513          * If we reached the top of the interrupt stack, start unwinding
514          * the interrupted task stack.
515          */
516         if (unlikely(*sp == irq_stack_high)) {
517                 unsigned long task_sp = *(unsigned long *)*sp;
518
519                 /*
520                  * Check that the pointer saved in the IRQ stack head points to
521                  * something within the stack of the current task
522                  */
523                 if (!object_is_on_stack((void *)task_sp))
524                         return 0;
525
526                 /*
527                  * Follow pointer to tasks kernel stack frame where interrupted
528                  * state was saved.
529                  */
530                 regs = (struct pt_regs *)task_sp;
531                 pc = regs->cp0_epc;
532                 if (!user_mode(regs) && __kernel_text_address(pc)) {
533                         *sp = regs->regs[29];
534                         *ra = regs->regs[31];
535                         return pc;
536                 }
537                 return 0;
538         }
539         if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
540                 return 0;
541         /*
542          * Return ra if an exception occurred at the first instruction
543          */
544         if (unlikely(ofs == 0)) {
545                 pc = *ra;
546                 *ra = 0;
547                 return pc;
548         }
549
550         info.func = (void *)(pc - ofs);
551         info.func_size = ofs;   /* analyze from start to ofs */
552         leaf = get_frame_info(&info);
553         if (leaf < 0)
554                 return 0;
555
556         if (*sp < low || *sp + info.frame_size > high)
557                 return 0;
558
559         if (leaf)
560                 /*
561                  * For some extreme cases, get_frame_info() can
562                  * consider wrongly a nested function as a leaf
563                  * one. In that cases avoid to return always the
564                  * same value.
565                  */
566                 pc = pc != *ra ? *ra : 0;
567         else
568                 pc = ((unsigned long *)(*sp))[info.pc_offset];
569
570         *sp += info.frame_size;
571         *ra = 0;
572         return __kernel_text_address(pc) ? pc : 0;
573 }
574 EXPORT_SYMBOL(unwind_stack_by_address);
575
576 /* used by show_backtrace() */
577 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
578                            unsigned long pc, unsigned long *ra)
579 {
580         unsigned long stack_page = 0;
581         int cpu;
582
583         for_each_possible_cpu(cpu) {
584                 if (on_irq_stack(cpu, *sp)) {
585                         stack_page = (unsigned long)irq_stack[cpu];
586                         break;
587                 }
588         }
589
590         if (!stack_page)
591                 stack_page = (unsigned long)task_stack_page(task);
592
593         return unwind_stack_by_address(stack_page, sp, pc, ra);
594 }
595 #endif
596
597 /*
598  * get_wchan - a maintenance nightmare^W^Wpain in the ass ...
599  */
600 unsigned long get_wchan(struct task_struct *task)
601 {
602         unsigned long pc = 0;
603 #ifdef CONFIG_KALLSYMS
604         unsigned long sp;
605         unsigned long ra = 0;
606 #endif
607
608         if (!task || task == current || task->state == TASK_RUNNING)
609                 goto out;
610         if (!task_stack_page(task))
611                 goto out;
612
613         pc = thread_saved_pc(task);
614
615 #ifdef CONFIG_KALLSYMS
616         sp = task->thread.reg29 + schedule_mfi.frame_size;
617
618         while (in_sched_functions(pc))
619                 pc = unwind_stack(task, &sp, pc, &ra);
620 #endif
621
622 out:
623         return pc;
624 }
625
626 /*
627  * Don't forget that the stack pointer must be aligned on a 8 bytes
628  * boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
629  */
630 unsigned long arch_align_stack(unsigned long sp)
631 {
632         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
633                 sp -= get_random_int() & ~PAGE_MASK;
634
635         return sp & ALMASK;
636 }
637
638 static DEFINE_PER_CPU(struct call_single_data, backtrace_csd);
639 static struct cpumask backtrace_csd_busy;
640
641 static void handle_backtrace(void *info)
642 {
643         nmi_cpu_backtrace(get_irq_regs());
644         cpumask_clear_cpu(smp_processor_id(), &backtrace_csd_busy);
645 }
646
647 static void raise_backtrace(cpumask_t *mask)
648 {
649         struct call_single_data *csd;
650         int cpu;
651
652         for_each_cpu(cpu, mask) {
653                 /*
654                  * If we previously sent an IPI to the target CPU & it hasn't
655                  * cleared its bit in the busy cpumask then it didn't handle
656                  * our previous IPI & it's not safe for us to reuse the
657                  * call_single_data_t.
658                  */
659                 if (cpumask_test_and_set_cpu(cpu, &backtrace_csd_busy)) {
660                         pr_warn("Unable to send backtrace IPI to CPU%u - perhaps it hung?\n",
661                                 cpu);
662                         continue;
663                 }
664
665                 csd = &per_cpu(backtrace_csd, cpu);
666                 csd->func = handle_backtrace;
667                 smp_call_function_single_async(cpu, csd);
668         }
669 }
670
671 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
672 {
673         nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_backtrace);
674 }
675
676 int mips_get_process_fp_mode(struct task_struct *task)
677 {
678         int value = 0;
679
680         if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
681                 value |= PR_FP_MODE_FR;
682         if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
683                 value |= PR_FP_MODE_FRE;
684
685         return value;
686 }
687
688 static void prepare_for_fp_mode_switch(void *info)
689 {
690         struct mm_struct *mm = info;
691
692         if (current->mm == mm)
693                 lose_fpu(1);
694 }
695
696 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
697 {
698         const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
699         struct task_struct *t;
700         int max_users;
701
702         /* If nothing to change, return right away, successfully.  */
703         if (value == mips_get_process_fp_mode(task))
704                 return 0;
705
706         /* Only accept a mode change if 64-bit FP enabled for o32.  */
707         if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT))
708                 return -EOPNOTSUPP;
709
710         /* And only for o32 tasks.  */
711         if (IS_ENABLED(CONFIG_64BIT) && !test_thread_flag(TIF_32BIT_REGS))
712                 return -EOPNOTSUPP;
713
714         /* Check the value is valid */
715         if (value & ~known_bits)
716                 return -EOPNOTSUPP;
717
718         /* Setting FRE without FR is not supported.  */
719         if ((value & (PR_FP_MODE_FR | PR_FP_MODE_FRE)) == PR_FP_MODE_FRE)
720                 return -EOPNOTSUPP;
721
722         /* Avoid inadvertently triggering emulation */
723         if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
724             !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
725                 return -EOPNOTSUPP;
726         if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
727                 return -EOPNOTSUPP;
728
729         /* FR = 0 not supported in MIPS R6 */
730         if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
731                 return -EOPNOTSUPP;
732
733         /* Proceed with the mode switch */
734         preempt_disable();
735
736         /* Save FP & vector context, then disable FPU & MSA */
737         if (task->signal == current->signal)
738                 lose_fpu(1);
739
740         /* Prevent any threads from obtaining live FP context */
741         atomic_set(&task->mm->context.fp_mode_switching, 1);
742         smp_mb__after_atomic();
743
744         /*
745          * If there are multiple online CPUs then force any which are running
746          * threads in this process to lose their FPU context, which they can't
747          * regain until fp_mode_switching is cleared later.
748          */
749         if (num_online_cpus() > 1) {
750                 /* No need to send an IPI for the local CPU */
751                 max_users = (task->mm == current->mm) ? 1 : 0;
752
753                 if (atomic_read(&current->mm->mm_users) > max_users)
754                         smp_call_function(prepare_for_fp_mode_switch,
755                                           (void *)current->mm, 1);
756         }
757
758         /*
759          * There are now no threads of the process with live FP context, so it
760          * is safe to proceed with the FP mode switch.
761          */
762         for_each_thread(task, t) {
763                 /* Update desired FP register width */
764                 if (value & PR_FP_MODE_FR) {
765                         clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
766                 } else {
767                         set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
768                         clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
769                 }
770
771                 /* Update desired FP single layout */
772                 if (value & PR_FP_MODE_FRE)
773                         set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
774                 else
775                         clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
776         }
777
778         /* Allow threads to use FP again */
779         atomic_set(&task->mm->context.fp_mode_switching, 0);
780         preempt_enable();
781
782         return 0;
783 }