2 * Copyright (C) 2016 Imagination Technologies
3 * Author: Marcin Nowakowski <marcin.nowakowski@mips.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
11 #ifndef __PROBES_COMMON_H
12 #define __PROBES_COMMON_H
16 int __insn_is_compact_branch(union mips_instruction insn);
18 static inline int __insn_has_delay_slot(const union mips_instruction insn)
20 switch (insn.i_format.opcode) {
22 * jr and jalr are in r_format format.
25 switch (insn.r_format.func) {
33 * This group contains:
34 * bltz_op, bgez_op, bltzl_op, bgezl_op,
35 * bltzal_op, bgezal_op, bltzall_op, bgezall_op.
38 switch (insn.i_format.rt) {
53 * These are unconditional and in j_format.
61 case blez_op: /* not really i_format */
68 * And now the FPA/cp1 branch instructions.
71 #ifdef CONFIG_CPU_CAVIUM_OCTEON
72 case lwc2_op: /* This is bbit0 on Octeon */
73 case ldc2_op: /* This is bbit032 on Octeon */
74 case swc2_op: /* This is bbit1 on Octeon */
75 case sdc2_op: /* This is bbit132 on Octeon */
83 #endif /* __PROBES_COMMON_H */