2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc.
12 #include <asm/asmmacro.h>
13 #include <asm/compiler.h>
14 #include <asm/irqflags.h>
15 #include <asm/regdef.h>
16 #include <asm/mipsregs.h>
17 #include <asm/stackframe.h>
18 #include <asm/isadep.h>
19 #include <asm/thread_info.h>
22 #ifndef CONFIG_PREEMPT
23 #define resume_kernel restore_all
25 #define __ret_from_irq ret_from_exception
30 #ifndef CONFIG_PREEMPT
31 FEXPORT(ret_from_exception)
32 local_irq_disable # preempt stop
36 LONG_S s0, TI_REGS($28)
37 FEXPORT(__ret_from_irq)
39 * We can be coming here from a syscall done in the kernel space,
40 * e.g. a failed kernel_execve().
42 resume_userspace_check:
43 LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
45 beqz t0, resume_kernel
48 local_irq_disable # make sure we dont miss an
49 # interrupt setting need_resched
50 # between sampling and return
51 #ifdef CONFIG_MIPSR2_TO_R6_EMULATOR
52 lw k0, TI_R2_EMUL_RET($28)
53 bnez k0, restore_all_from_r2_emul
56 LONG_L a2, TI_FLAGS($28) # current->work
57 andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
64 lw t0, TI_PRE_COUNT($28)
67 LONG_L t0, TI_FLAGS($28)
68 andi t1, t0, _TIF_NEED_RESCHED
70 LONG_L t0, PT_STATUS(sp) # Interrupts off?
73 jal preempt_schedule_irq
77 FEXPORT(ret_from_kernel_thread)
78 jal schedule_tail # a0 = struct task_struct *prev
83 FEXPORT(ret_from_fork)
84 jal schedule_tail # a0 = struct task_struct *prev
87 local_irq_disable # make sure need_resched and
88 # signals dont change between
90 LONG_L a2, TI_FLAGS($28) # current->work
91 li t0, _TIF_ALLWORK_MASK
93 bnez t0, syscall_exit_work
95 restore_all: # restore full frame
100 restore_partial: # restore partial frame
101 #ifdef CONFIG_TRACE_IRQFLAGS
105 LONG_L v0, PT_STATUS(sp)
106 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
112 jal trace_hardirqs_on
114 1: jal trace_hardirqs_off
124 #ifdef CONFIG_MIPSR2_TO_R6_EMULATOR
125 restore_all_from_r2_emul: # restore full frame
127 sw zero, TI_R2_EMUL_RET($28) # reset it
132 LONG_L sp, PT_R29(sp)
138 andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
139 beqz t0, work_notifysig
144 local_irq_disable # make sure need_resched and
145 # signals dont change between
146 # sampling and return
147 LONG_L a2, TI_FLAGS($28)
148 andi t0, a2, _TIF_WORK_MASK # is there any work to be done
149 # other than syscall tracing?
151 andi t0, a2, _TIF_NEED_RESCHED
152 bnez t0, work_resched
154 work_notifysig: # deal with pending signals and
155 # notify-resume requests
158 jal do_notify_resume # a2 already loaded
159 j resume_userspace_check
161 FEXPORT(syscall_exit_partial)
162 local_irq_disable # make sure need_resched doesn't
163 # change between and return
164 LONG_L a2, TI_FLAGS($28) # current->work
165 li t0, _TIF_ALLWORK_MASK
167 beqz t0, restore_partial
170 LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
172 beqz t0, resume_kernel
173 li t0, _TIF_WORK_SYSCALL_EXIT
174 and t0, a2 # a2 is preloaded with TI_FLAGS
175 beqz t0, work_pending # trace bit set?
176 local_irq_enable # could let syscall_trace_leave()
177 # call schedule() instead
180 jal syscall_trace_leave
183 #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) || \
184 defined(CONFIG_MIPS_MT)
187 * MIPS32R2 Instruction Hazard Barrier - must be called
189 * For C code use the inline version named instruction_hazard().
192 .set MIPS_ISA_LEVEL_RAW
197 #endif /* CONFIG_CPU_MIPSR2 or CONFIG_CPU_MIPSR6 or CONFIG_MIPS_MT */