1 // SPDX-License-Identifier: GPL-2.0
3 * Mips Jazz DMA controller support
4 * Copyright (C) 1995, 1996 by Andreas Busse
6 * NOTE: Some of the argument checking could be removed when
7 * things have settled down. Also, instead of returning 0xffffffff
8 * on failure of vdma_alloc() one could leave page #0 unused
9 * and return the more usual NULL pointer as logical address.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/export.h>
14 #include <linux/errno.h>
16 #include <linux/bootmem.h>
17 #include <linux/spinlock.h>
18 #include <linux/gfp.h>
19 #include <asm/mipsregs.h>
22 #include <linux/uaccess.h>
24 #include <asm/jazzdma.h>
25 #include <asm/pgtable.h>
28 * Set this to one to enable additional vdma debug code.
30 #define CONF_DEBUG_VDMA 0
32 static VDMA_PGTBL_ENTRY *pgtbl;
34 static DEFINE_SPINLOCK(vdma_lock);
39 #define vdma_debug ((CONF_DEBUG_VDMA) ? debuglvl : 0)
41 static int debuglvl = 3;
44 * Initialize the pagetable with a one-to-one mapping of
45 * the first 16 Mbytes of main memory and declare all
46 * entries to be unused. Using this method will at least
47 * allow some early device driver operations to work.
49 static inline void vdma_pgtbl_init(void)
51 unsigned long paddr = 0;
54 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
55 pgtbl[i].frame = paddr;
56 pgtbl[i].owner = VDMA_PAGE_EMPTY;
57 paddr += VDMA_PAGESIZE;
62 * Initialize the Jazz R4030 dma controller
64 static int __init vdma_init(void)
67 * Allocate 32k of memory for DMA page tables. This needs to be page
68 * aligned and should be uncached to avoid cache flushing after every
71 pgtbl = (VDMA_PGTBL_ENTRY *)__get_free_pages(GFP_KERNEL | GFP_DMA,
72 get_order(VDMA_PGTBL_SIZE));
74 dma_cache_wback_inv((unsigned long)pgtbl, VDMA_PGTBL_SIZE);
75 pgtbl = (VDMA_PGTBL_ENTRY *)CKSEG1ADDR((unsigned long)pgtbl);
78 * Clear the R4030 translation table
82 r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
83 CPHYSADDR((unsigned long)pgtbl));
84 r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
85 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
87 printk(KERN_INFO "VDMA: R4030 DMA pagetables initialized.\n");
92 * Allocate DMA pagetables using a simple first-fit algorithm
94 unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
96 int first, last, pages, frame, i;
97 unsigned long laddr, flags;
101 if (paddr > 0x1fffffff) {
103 printk("vdma_alloc: Invalid physical address: %08lx\n",
105 return VDMA_ERROR; /* invalid physical address */
107 if (size > 0x400000 || size == 0) {
109 printk("vdma_alloc: Invalid size: %08lx\n", size);
110 return VDMA_ERROR; /* invalid physical address */
113 spin_lock_irqsave(&vdma_lock, flags);
117 pages = VDMA_PAGE(paddr + size) - VDMA_PAGE(paddr) + 1;
120 while (pgtbl[first].owner != VDMA_PAGE_EMPTY &&
121 first < VDMA_PGTBL_ENTRIES) first++;
122 if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */
123 spin_unlock_irqrestore(&vdma_lock, flags);
128 while (pgtbl[last].owner == VDMA_PAGE_EMPTY
129 && last - first < pages)
132 if (last - first == pages)
138 * Mark pages as allocated
140 laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
141 frame = paddr & ~(VDMA_PAGESIZE - 1);
143 for (i = first; i < last; i++) {
144 pgtbl[i].frame = frame;
145 pgtbl[i].owner = laddr;
146 frame += VDMA_PAGESIZE;
150 * Update translation table and return logical start address
152 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
155 printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
158 if (vdma_debug > 2) {
160 for (i = first; i < last; i++)
161 printk("%08x ", i << 12);
163 for (i = first; i < last; i++)
164 printk("%08x ", pgtbl[i].frame);
166 for (i = first; i < last; i++)
167 printk("%08x ", pgtbl[i].owner);
171 spin_unlock_irqrestore(&vdma_lock, flags);
176 EXPORT_SYMBOL(vdma_alloc);
179 * Free previously allocated dma translation pages
180 * Note that this does NOT change the translation table,
181 * it just marks the free'd pages as unused!
183 int vdma_free(unsigned long laddr)
189 if (pgtbl[i].owner != laddr) {
191 ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
196 while (i < VDMA_PGTBL_ENTRIES && pgtbl[i].owner == laddr) {
197 pgtbl[i].owner = VDMA_PAGE_EMPTY;
202 printk("vdma_free: freed %ld pages starting from %08lx\n",
203 i - (laddr >> 12), laddr);
208 EXPORT_SYMBOL(vdma_free);
211 * Map certain page(s) to another physical address.
212 * Caller must have allocated the page(s) before.
214 int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
218 if (laddr > 0xffffff) {
221 ("vdma_map: Invalid logical address: %08lx\n",
223 return -EINVAL; /* invalid logical address */
225 if (paddr > 0x1fffffff) {
228 ("vdma_map: Invalid physical address: %08lx\n",
230 return -EINVAL; /* invalid physical address */
233 pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
236 printk("vdma_remap: first=%x, pages=%x\n", first, pages);
237 if (first + pages > VDMA_PGTBL_ENTRIES) {
239 printk("vdma_alloc: Invalid size: %08lx\n", size);
243 paddr &= ~(VDMA_PAGESIZE - 1);
244 while (pages > 0 && first < VDMA_PGTBL_ENTRIES) {
245 if (pgtbl[first].owner != laddr) {
247 printk("Trying to remap other's pages.\n");
248 return -EPERM; /* not owner */
250 pgtbl[first].frame = paddr;
251 paddr += VDMA_PAGESIZE;
257 * Update translation table
259 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
261 if (vdma_debug > 2) {
263 pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
266 for (i = first; i < first + pages; i++)
267 printk("%08x ", i << 12);
269 for (i = first; i < first + pages; i++)
270 printk("%08x ", pgtbl[i].frame);
272 for (i = first; i < first + pages; i++)
273 printk("%08x ", pgtbl[i].owner);
281 * Translate a physical address to a logical address.
282 * This will return the logical address of the first
285 unsigned long vdma_phys2log(unsigned long paddr)
290 frame = paddr & ~(VDMA_PAGESIZE - 1);
292 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
293 if (pgtbl[i].frame == frame)
297 if (i == VDMA_PGTBL_ENTRIES)
300 return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
303 EXPORT_SYMBOL(vdma_phys2log);
306 * Translate a logical DMA address to a physical address
308 unsigned long vdma_log2phys(unsigned long laddr)
310 return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
313 EXPORT_SYMBOL(vdma_log2phys);
316 * Print DMA statistics
318 void vdma_stats(void)
322 printk("vdma_stats: CONFIG: %08x\n",
323 r4030_read_reg32(JAZZ_R4030_CONFIG));
324 printk("R4030 translation table base: %08x\n",
325 r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
326 printk("R4030 translation table limit: %08x\n",
327 r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
328 printk("vdma_stats: INV_ADDR: %08x\n",
329 r4030_read_reg32(JAZZ_R4030_INV_ADDR));
330 printk("vdma_stats: R_FAIL_ADDR: %08x\n",
331 r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
332 printk("vdma_stats: M_FAIL_ADDR: %08x\n",
333 r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
334 printk("vdma_stats: IRQ_SOURCE: %08x\n",
335 r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
336 printk("vdma_stats: I386_ERROR: %08x\n",
337 r4030_read_reg32(JAZZ_R4030_I386_ERROR));
338 printk("vdma_chnl_modes: ");
339 for (i = 0; i < 8; i++)
341 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
344 printk("vdma_chnl_enables: ");
345 for (i = 0; i < 8; i++)
347 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
353 * DMA transfer functions
357 * Enable a DMA channel. Also clear any error conditions.
359 void vdma_enable(int channel)
364 printk("vdma_enable: channel %d\n", channel);
367 * Check error conditions first
369 status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
371 printk("VDMA: Channel %d: Address error!\n", channel);
373 printk("VDMA: Channel %d: Memory error!\n", channel);
376 * Clear all interrupt flags
378 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
379 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
380 (channel << 5)) | R4030_TC_INTR
381 | R4030_MEM_INTR | R4030_ADDR_INTR);
384 * Enable the desired channel
386 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
387 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
392 EXPORT_SYMBOL(vdma_enable);
395 * Disable a DMA channel
397 void vdma_disable(int channel)
401 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
404 printk("vdma_disable: channel %d\n", channel);
405 printk("VDMA: channel %d status: %04x (%s) mode: "
406 "%02x addr: %06x count: %06x\n",
408 ((status & 0x600) ? "ERROR" : "OK"),
409 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
411 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
413 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
417 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
418 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
423 * After disabling a DMA channel a remote bus register should be
424 * read to ensure that the current DMA acknowledge cycle is completed.
426 *((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
429 EXPORT_SYMBOL(vdma_disable);
432 * Set DMA mode. This function accepts the mode values used
433 * to set a PC-style DMA controller. For the SCSI and FDC
434 * channels, we also set the default modes each time we're
436 * NOTE: The FAST and BURST dma modes are supported by the
437 * R4030 Rev. 2 and PICA chipsets only. I leave them disabled
440 void vdma_set_mode(int channel, int mode)
443 printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
447 case JAZZ_SCSI_DMA: /* scsi */
448 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
449 /* R4030_MODE_FAST | */
450 /* R4030_MODE_BURST | */
452 R4030_MODE_WIDTH_16 |
453 R4030_MODE_ATIME_80);
456 case JAZZ_FLOPPY_DMA: /* floppy */
457 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
458 /* R4030_MODE_FAST | */
459 /* R4030_MODE_BURST | */
462 R4030_MODE_ATIME_120);
465 case JAZZ_AUDIOL_DMA:
466 case JAZZ_AUDIOR_DMA:
467 printk("VDMA: Audio DMA not supported yet.\n");
472 ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
478 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
479 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
485 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
486 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
493 ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
498 EXPORT_SYMBOL(vdma_set_mode);
501 * Set Transfer Address
503 void vdma_set_addr(int channel, long addr)
506 printk("vdma_set_addr: channel %d, addr %lx\n", channel,
509 r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
512 EXPORT_SYMBOL(vdma_set_addr);
517 void vdma_set_count(int channel, int count)
520 printk("vdma_set_count: channel %d, count %08x\n", channel,
523 r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
526 EXPORT_SYMBOL(vdma_set_count);
531 int vdma_get_residue(int channel)
535 residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
538 printk("vdma_get_residual: channel %d: residual=%d\n",
545 * Get DMA channel enable register
547 int vdma_get_enable(int channel)
551 enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
554 printk("vdma_get_enable: channel %d: enable=%d\n", channel,
560 arch_initcall(vdma_init);