1 /* thread_info.h: MIPS low-level thread information
3 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
4 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
7 #ifndef _ASM_THREAD_INFO_H
8 #define _ASM_THREAD_INFO_H
15 #include <asm/processor.h>
18 * low level task data that entry.S needs immediate access to
19 * - this struct should fit entirely inside of one cache line
20 * - this struct shares the supervisor stack pages
21 * - if the contents of this structure are changed, the assembly constants
22 * must also be changed
25 struct task_struct *task; /* main task structure */
26 unsigned long flags; /* low level flags */
27 unsigned long tp_value; /* thread pointer */
28 __u32 cpu; /* current CPU */
29 int preempt_count; /* 0 => preemptable, <0 => BUG */
30 int r2_emul_return; /* 1 => Returning from R2 emulator */
31 mm_segment_t addr_limit; /*
32 * thread address space limit:
33 * 0x7fffffff for user-thead
34 * 0xffffffff for kernel-thread
37 long syscall; /* syscall number */
41 * macros/functions for gaining access to the thread information structure
43 #define INIT_THREAD_INFO(tsk) \
46 .flags = _TIF_FIXADE, \
48 .preempt_count = INIT_PREEMPT_COUNT, \
49 .addr_limit = KERNEL_DS, \
52 #define init_thread_info (init_thread_union.thread_info)
53 #define init_stack (init_thread_union.stack)
56 * A pointer to the struct thread_info for the currently executing thread is
57 * held in register $28/$gp.
59 * We declare __current_thread_info as a global register variable rather than a
60 * local register variable within current_thread_info() because clang doesn't
61 * support explicit local register variables.
63 * When building the VDSO we take care not to declare the global register
64 * variable because this causes GCC to not preserve the value of $28/$gp in
65 * functions that change its value (which is common in the PIC VDSO when
66 * accessing the GOT). Since the VDSO shouldn't be accessing
67 * __current_thread_info anyway we declare it extern in order to cause a link
68 * failure if it's referenced.
71 extern struct thread_info *__current_thread_info;
73 register struct thread_info *__current_thread_info __asm__("$28");
76 static inline struct thread_info *current_thread_info(void)
78 return __current_thread_info;
81 #endif /* !__ASSEMBLY__ */
83 /* thread information allocation */
84 #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT)
85 #define THREAD_SIZE_ORDER (1)
87 #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_64BIT)
88 #define THREAD_SIZE_ORDER (2)
90 #ifdef CONFIG_PAGE_SIZE_8KB
91 #define THREAD_SIZE_ORDER (1)
93 #ifdef CONFIG_PAGE_SIZE_16KB
94 #define THREAD_SIZE_ORDER (0)
96 #ifdef CONFIG_PAGE_SIZE_32KB
97 #define THREAD_SIZE_ORDER (0)
99 #ifdef CONFIG_PAGE_SIZE_64KB
100 #define THREAD_SIZE_ORDER (0)
103 #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
104 #define THREAD_MASK (THREAD_SIZE - 1UL)
106 #define STACK_WARN (THREAD_SIZE / 8)
109 * thread information flags
110 * - these are process state flags that various assembly files may need to
112 * - pending work-to-be-done flags are in LSW
113 * - other flags in MSW
115 #define TIF_SIGPENDING 1 /* signal pending */
116 #define TIF_NEED_RESCHED 2 /* rescheduling necessary */
117 #define TIF_SYSCALL_AUDIT 3 /* syscall auditing active */
118 #define TIF_SECCOMP 4 /* secure computing */
119 #define TIF_NOTIFY_RESUME 5 /* callback before returning to user */
120 #define TIF_UPROBE 6 /* breakpointed or singlestepping */
121 #define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */
122 #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
123 #define TIF_MEMDIE 18 /* is terminating due to OOM killer */
124 #define TIF_NOHZ 19 /* in adaptive nohz mode */
125 #define TIF_FIXADE 20 /* Fix address errors in software */
126 #define TIF_LOGADE 21 /* Log address errors to syslog */
127 #define TIF_32BIT_REGS 22 /* 32-bit general purpose registers */
128 #define TIF_32BIT_ADDR 23 /* 32-bit address space (o32/n32) */
129 #define TIF_FPUBOUND 24 /* thread bound to FPU-full CPU set */
130 #define TIF_LOAD_WATCH 25 /* If set, load watch registers */
131 #define TIF_SYSCALL_TRACEPOINT 26 /* syscall tracepoint instrumentation */
132 #define TIF_32BIT_FPREGS 27 /* 32-bit floating point registers */
133 #define TIF_HYBRID_FPREGS 28 /* 64b FP registers, odd singles in bits 63:32 of even doubles */
134 #define TIF_USEDMSA 29 /* MSA has been used this quantum */
135 #define TIF_MSA_CTX_LIVE 30 /* MSA context must be preserved */
136 #define TIF_SYSCALL_TRACE 31 /* syscall trace active */
138 #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
139 #define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
140 #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
141 #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
142 #define _TIF_SECCOMP (1<<TIF_SECCOMP)
143 #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
144 #define _TIF_UPROBE (1<<TIF_UPROBE)
145 #define _TIF_USEDFPU (1<<TIF_USEDFPU)
146 #define _TIF_NOHZ (1<<TIF_NOHZ)
147 #define _TIF_FIXADE (1<<TIF_FIXADE)
148 #define _TIF_LOGADE (1<<TIF_LOGADE)
149 #define _TIF_32BIT_REGS (1<<TIF_32BIT_REGS)
150 #define _TIF_32BIT_ADDR (1<<TIF_32BIT_ADDR)
151 #define _TIF_FPUBOUND (1<<TIF_FPUBOUND)
152 #define _TIF_LOAD_WATCH (1<<TIF_LOAD_WATCH)
153 #define _TIF_32BIT_FPREGS (1<<TIF_32BIT_FPREGS)
154 #define _TIF_HYBRID_FPREGS (1<<TIF_HYBRID_FPREGS)
155 #define _TIF_USEDMSA (1<<TIF_USEDMSA)
156 #define _TIF_MSA_CTX_LIVE (1<<TIF_MSA_CTX_LIVE)
157 #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
159 #define _TIF_WORK_SYSCALL_ENTRY (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \
160 _TIF_SYSCALL_AUDIT | \
161 _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP)
163 /* work to do in syscall_trace_leave() */
164 #define _TIF_WORK_SYSCALL_EXIT (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \
165 _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT)
167 /* work to do on interrupt/exception return */
168 #define _TIF_WORK_MASK \
169 (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME | \
171 /* work to do on any return to u-space */
172 #define _TIF_ALLWORK_MASK (_TIF_NOHZ | _TIF_WORK_MASK | \
173 _TIF_WORK_SYSCALL_EXIT | \
174 _TIF_SYSCALL_TRACEPOINT)
177 * We stash processor id into a COP0 register to retrieve it fast
178 * at kernel exception entry.
180 #if defined(CONFIG_MIPS_PGD_C0_CONTEXT)
181 #define SMP_CPUID_REG 20, 0 /* XCONTEXT */
182 #define ASM_SMP_CPUID_REG $20
183 #define SMP_CPUID_PTRSHIFT 48
185 #define SMP_CPUID_REG 4, 0 /* CONTEXT */
186 #define ASM_SMP_CPUID_REG $4
187 #define SMP_CPUID_PTRSHIFT 23
191 #define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 3)
193 #define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 2)
196 #define ASM_CPUID_MFC0 MFC0
197 #define UASM_i_CPUID_MFC0 UASM_i_MFC0
199 #endif /* __KERNEL__ */
200 #endif /* _ASM_THREAD_INFO_H */