2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994, 95, 96, 99, 2001 Ralf Baechle
7 * Copyright (C) 1994, 1995, 1996 Paul M. Antoine.
8 * Copyright (C) 1999 Silicon Graphics, Inc.
9 * Copyright (C) 2007 Maciej W. Rozycki
11 #ifndef _ASM_STACKFRAME_H
12 #define _ASM_STACKFRAME_H
14 #include <linux/threads.h>
17 #include <asm/asmmacro.h>
18 #include <asm/mipsregs.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/thread_info.h>
22 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
36 #ifdef CONFIG_CPU_HAS_SMARTMIPS
43 #elif !defined(CONFIG_CPU_MIPSR6)
50 LONG_S $10, PT_R10(sp)
51 LONG_S $11, PT_R11(sp)
52 LONG_S $12, PT_R12(sp)
53 #if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6)
57 LONG_S $13, PT_R13(sp)
58 LONG_S $14, PT_R14(sp)
59 LONG_S $15, PT_R15(sp)
60 LONG_S $24, PT_R24(sp)
61 #if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6)
64 #ifdef CONFIG_CPU_CAVIUM_OCTEON
66 * The Octeon multiplier state is affected by general
67 * multiply instructions. It must be saved before and
68 * kernel code might corrupt it
75 LONG_S $16, PT_R16(sp)
76 LONG_S $17, PT_R17(sp)
77 LONG_S $18, PT_R18(sp)
78 LONG_S $19, PT_R19(sp)
79 LONG_S $20, PT_R20(sp)
80 LONG_S $21, PT_R21(sp)
81 LONG_S $22, PT_R22(sp)
82 LONG_S $23, PT_R23(sp)
83 LONG_S $30, PT_R30(sp)
87 .macro get_saved_sp /* SMP variation */
88 ASM_CPUID_MFC0 k0, ASM_SMP_CPUID_REG
89 #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
92 lui k1, %highest(kernelsp)
93 daddiu k1, %higher(kernelsp)
95 daddiu k1, %hi(kernelsp)
98 LONG_SRL k0, SMP_CPUID_PTRSHIFT
100 LONG_L k1, %lo(kernelsp)(k1)
103 .macro set_saved_sp stackp temp temp2
104 ASM_CPUID_MFC0 \temp, ASM_SMP_CPUID_REG
105 LONG_SRL \temp, SMP_CPUID_PTRSHIFT
106 LONG_S \stackp, kernelsp(\temp)
108 #else /* !CONFIG_SMP */
109 .macro get_saved_sp /* Uniprocessor variation */
110 #ifdef CONFIG_CPU_JUMP_WORKAROUNDS
112 * Clear BTB (branch target buffer), forbid RAS (return address
113 * stack) to workaround the Out-of-order Issue in Loongson2F
114 * via its diagnostic register.
128 #endif /* CONFIG_CPU_JUMP_WORKAROUNDS */
129 #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
130 lui k1, %hi(kernelsp)
132 lui k1, %highest(kernelsp)
133 daddiu k1, %higher(kernelsp)
135 daddiu k1, %hi(kernelsp)
138 LONG_L k1, %lo(kernelsp)(k1)
141 .macro set_saved_sp stackp temp temp2
142 LONG_S \stackp, kernelsp
151 sll k0, 3 /* extract cu0 bit */
157 * Flush interAptiv's Return Prediction Stack (RPS) by writing
158 * EntryHi. Toggling Config7.RPS is slower and less portable.
160 * The RPS isn't automatically flushed when exceptions are
161 * taken, which can result in kernel mode speculative accesses
162 * to user addresses if the RPS mispredicts. That's harmless
163 * when user and kernel share the same address space, but with
164 * EVA the same user segments may be unmapped to kernel mode,
165 * even containing sensitive MMIO regions or invalid memory.
167 * This can happen when the kernel sets the return address to
168 * ret_from_* and jr's to the exception handler, which looks
169 * more like a tail call than a function call. If nested calls
170 * don't evict the last user address in the RPS, it will
171 * mispredict the return and fetch from a user controlled
172 * address into the icache.
174 * More recent EVA-capable cores with MAAR to restrict
175 * speculative accesses aren't affected.
181 /* Called from user mode, new stack. */
183 #ifndef CONFIG_CPU_DADDI_WORKAROUNDS
185 PTR_SUBU sp, k1, PT_SIZE
188 8: PTR_SUBU k1, PT_SIZE
193 LONG_S k0, PT_R29(sp)
196 * You might think that you don't need to save $0,
197 * but the FPU emulator and gdb remote debug stub
198 * need it to operate correctly
203 LONG_S v1, PT_STATUS(sp)
207 LONG_S v1, PT_CAUSE(sp)
215 LONG_S v1, PT_EPC(sp)
216 LONG_S $25, PT_R25(sp)
217 LONG_S $28, PT_R28(sp)
218 LONG_S $31, PT_R31(sp)
220 /* Set thread_info if we're coming from user mode */
222 sll k0, 3 /* extract cu0 bit */
225 ori $28, sp, _THREAD_MASK
226 xori $28, _THREAD_MASK
227 #ifdef CONFIG_CPU_CAVIUM_OCTEON
229 pref 0, 0($28) /* Prefetch the current pointer */
250 #ifdef CONFIG_CPU_CAVIUM_OCTEON
251 /* Restore the Octeon multiplier state */
252 jal octeon_mult_restore
254 #ifdef CONFIG_CPU_HAS_SMARTMIPS
255 LONG_L $24, PT_ACX(sp)
257 LONG_L $24, PT_HI(sp)
259 LONG_L $24, PT_LO(sp)
261 #elif !defined(CONFIG_CPU_MIPSR6)
262 LONG_L $24, PT_LO(sp)
264 LONG_L $24, PT_HI(sp)
271 LONG_L $10, PT_R10(sp)
272 LONG_L $11, PT_R11(sp)
273 LONG_L $12, PT_R12(sp)
274 LONG_L $13, PT_R13(sp)
275 LONG_L $14, PT_R14(sp)
276 LONG_L $15, PT_R15(sp)
277 LONG_L $24, PT_R24(sp)
280 .macro RESTORE_STATIC
281 LONG_L $16, PT_R16(sp)
282 LONG_L $17, PT_R17(sp)
283 LONG_L $18, PT_R18(sp)
284 LONG_L $19, PT_R19(sp)
285 LONG_L $20, PT_R20(sp)
286 LONG_L $21, PT_R21(sp)
287 LONG_L $22, PT_R22(sp)
288 LONG_L $23, PT_R23(sp)
289 LONG_L $30, PT_R30(sp)
292 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
299 li v1, ST0_CU1 | ST0_IM
304 LONG_L v0, PT_STATUS(sp)
309 LONG_L $31, PT_R31(sp)
310 LONG_L $28, PT_R28(sp)
311 LONG_L $25, PT_R25(sp)
321 .macro RESTORE_SP_AND_RET
324 LONG_L k0, PT_EPC(sp)
325 LONG_L sp, PT_R29(sp)
340 li v1, ST0_CU1 | ST0_FR | ST0_IM
342 LONG_L v0, PT_STATUS(sp)
347 LONG_L v1, PT_EPC(sp)
349 LONG_L $31, PT_R31(sp)
350 LONG_L $28, PT_R28(sp)
351 LONG_L $25, PT_R25(sp)
365 .macro RESTORE_SP_AND_RET
366 LONG_L sp, PT_R29(sp)
375 LONG_L sp, PT_R29(sp)
386 .macro RESTORE_ALL_AND_RET
395 * Move to kernel mode and disable interrupts.
396 * Set cp0 enable bit as sign that we're running on the kernel stack
400 li t1, ST0_CU0 | STATMASK
408 * Move to kernel mode and enable interrupts.
409 * Set cp0 enable bit as sign that we're running on the kernel stack
413 li t1, ST0_CU0 | STATMASK
415 xori t0, STATMASK & ~1
421 * Just move to kernel mode and leave interrupts as they are. Note
422 * for the R3000 this means copying the previous enable from IEp.
423 * Set cp0 enable bit as sign that we're running on the kernel stack
427 li t1, ST0_CU0 | (STATMASK & ~1)
428 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
434 xori t0, STATMASK & ~1
439 #endif /* _ASM_STACKFRAME_H */