2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
14 * This file essentially defines the interface between board
15 * specific PCI code and MIPS common PCI code. Should potentially put
16 * into include/asm/pci.h file.
19 #include <linux/ioport.h>
20 #include <linux/list.h>
23 #ifdef CONFIG_PCI_DRIVERS_LEGACY
26 * Each pci channel is a top-level PCI bus seem by CPU. A machine with
27 * multiple PCI channels may have multiple PCI host controllers or a
28 * single controller supporting multiple channels.
30 struct pci_controller {
31 struct list_head list;
33 struct device_node *of_node;
35 struct pci_ops *pci_ops;
36 struct resource *mem_resource;
37 unsigned long mem_offset;
38 struct resource *io_resource;
39 unsigned long io_offset;
40 unsigned long io_map_base;
41 struct resource *busn_resource;
43 #ifndef CONFIG_PCI_DOMAINS_GENERIC
45 /* For compatibility with current (as of July 2003) pciutils
46 and XFree86. Eventually will be removed. */
47 unsigned int need_domain_info;
50 /* Optional access methods for reading/writing the bus number
51 of the PCI controller */
52 int (*get_busno)(void);
53 void (*set_busno)(int busno);
57 * Used by boards to register their PCI busses before the actual scanning.
59 extern void register_pci_controller(struct pci_controller *hose);
62 * board supplied pci irq fixup routine
64 extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
66 /* Do platform specific device initialization at pci_enable_device() time */
67 extern int pcibios_plat_dev_init(struct pci_dev *dev);
69 extern char * (*pcibios_plat_setup)(char *str);
72 /* this function parses memory ranges from a device node */
73 extern void pci_load_of_ranges(struct pci_controller *hose,
74 struct device_node *node);
76 static inline void pci_load_of_ranges(struct pci_controller *hose,
77 struct device_node *node) {}
80 #ifdef CONFIG_PCI_DOMAINS_GENERIC
81 static inline void set_pci_need_domain_info(struct pci_controller *hose,
86 #elif defined(CONFIG_PCI_DOMAINS)
87 static inline void set_pci_need_domain_info(struct pci_controller *hose,
90 hose->need_domain_info = need_domain_info;
92 #endif /* CONFIG_PCI_DOMAINS */
96 /* Can be used to override the logic in pci_scan_bus for skipping
97 already-configured bus numbers - to be used for buggy BIOSes
98 or architectures with incomplete PCI setup by the loader */
99 static inline unsigned int pcibios_assign_all_busses(void)
104 extern unsigned long PCIBIOS_MIN_IO;
105 extern unsigned long PCIBIOS_MIN_MEM;
107 #define PCIBIOS_MIN_CARDBUS_IO 0x4000
109 #define HAVE_PCI_MMAP
110 #define ARCH_GENERIC_PCI_MMAP_RESOURCE
113 * Dynamic DMA mapping stuff.
114 * MIPS has everything mapped statically.
117 #include <linux/types.h>
118 #include <linux/slab.h>
119 #include <linux/scatterlist.h>
120 #include <linux/string.h>
123 #ifdef CONFIG_PCI_DOMAINS_GENERIC
124 static inline int pci_proc_domain(struct pci_bus *bus)
126 return pci_domain_nr(bus);
128 #elif defined(CONFIG_PCI_DOMAINS)
129 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
131 static inline int pci_proc_domain(struct pci_bus *bus)
133 struct pci_controller *hose = bus->sysdata;
134 return hose->need_domain_info;
136 #endif /* CONFIG_PCI_DOMAINS */
138 #endif /* __KERNEL__ */
140 /* Do platform specific device initialization at pci_enable_device() time */
141 extern int pcibios_plat_dev_init(struct pci_dev *dev);
143 /* Chances are this interrupt is wired PC-style ... */
144 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
146 return channel ? 15 : 14;
149 #endif /* _ASM_PCI_H */