1 /***********************license start***************
2 * Author: Cavium Networks
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2012 Cavium Networks
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
28 #ifndef __CVMX_MIXX_DEFS_H__
29 #define __CVMX_MIXX_DEFS_H__
31 #define CVMX_MIXX_BIST(offset) (CVMX_ADD_IO_SEG(0x0001070000100078ull) + ((offset) & 1) * 2048)
32 #define CVMX_MIXX_CTL(offset) (CVMX_ADD_IO_SEG(0x0001070000100020ull) + ((offset) & 1) * 2048)
33 #define CVMX_MIXX_INTENA(offset) (CVMX_ADD_IO_SEG(0x0001070000100050ull) + ((offset) & 1) * 2048)
34 #define CVMX_MIXX_IRCNT(offset) (CVMX_ADD_IO_SEG(0x0001070000100030ull) + ((offset) & 1) * 2048)
35 #define CVMX_MIXX_IRHWM(offset) (CVMX_ADD_IO_SEG(0x0001070000100028ull) + ((offset) & 1) * 2048)
36 #define CVMX_MIXX_IRING1(offset) (CVMX_ADD_IO_SEG(0x0001070000100010ull) + ((offset) & 1) * 2048)
37 #define CVMX_MIXX_IRING2(offset) (CVMX_ADD_IO_SEG(0x0001070000100018ull) + ((offset) & 1) * 2048)
38 #define CVMX_MIXX_ISR(offset) (CVMX_ADD_IO_SEG(0x0001070000100048ull) + ((offset) & 1) * 2048)
39 #define CVMX_MIXX_ORCNT(offset) (CVMX_ADD_IO_SEG(0x0001070000100040ull) + ((offset) & 1) * 2048)
40 #define CVMX_MIXX_ORHWM(offset) (CVMX_ADD_IO_SEG(0x0001070000100038ull) + ((offset) & 1) * 2048)
41 #define CVMX_MIXX_ORING1(offset) (CVMX_ADD_IO_SEG(0x0001070000100000ull) + ((offset) & 1) * 2048)
42 #define CVMX_MIXX_ORING2(offset) (CVMX_ADD_IO_SEG(0x0001070000100008ull) + ((offset) & 1) * 2048)
43 #define CVMX_MIXX_REMCNT(offset) (CVMX_ADD_IO_SEG(0x0001070000100058ull) + ((offset) & 1) * 2048)
44 #define CVMX_MIXX_TSCTL(offset) (CVMX_ADD_IO_SEG(0x0001070000100068ull) + ((offset) & 1) * 2048)
45 #define CVMX_MIXX_TSTAMP(offset) (CVMX_ADD_IO_SEG(0x0001070000100060ull) + ((offset) & 1) * 2048)
47 union cvmx_mixx_bist {
49 struct cvmx_mixx_bist_s {
50 #ifdef __BIG_ENDIAN_BITFIELD
51 uint64_t reserved_6_63:58;
65 uint64_t reserved_6_63:58;
68 struct cvmx_mixx_bist_cn52xx {
69 #ifdef __BIG_ENDIAN_BITFIELD
70 uint64_t reserved_4_63:60;
80 uint64_t reserved_4_63:60;
83 struct cvmx_mixx_bist_cn52xx cn52xxp1;
84 struct cvmx_mixx_bist_cn52xx cn56xx;
85 struct cvmx_mixx_bist_cn52xx cn56xxp1;
86 struct cvmx_mixx_bist_s cn61xx;
87 struct cvmx_mixx_bist_s cn63xx;
88 struct cvmx_mixx_bist_s cn63xxp1;
89 struct cvmx_mixx_bist_s cn66xx;
90 struct cvmx_mixx_bist_s cn68xx;
91 struct cvmx_mixx_bist_s cn68xxp1;
96 struct cvmx_mixx_ctl_s {
97 #ifdef __BIG_ENDIAN_BITFIELD
98 uint64_t reserved_12_63:52;
100 uint64_t crc_strip:1;
114 uint64_t crc_strip:1;
115 uint64_t ts_thresh:4;
116 uint64_t reserved_12_63:52;
119 struct cvmx_mixx_ctl_cn52xx {
120 #ifdef __BIG_ENDIAN_BITFIELD
121 uint64_t reserved_8_63:56;
122 uint64_t crc_strip:1;
136 uint64_t crc_strip:1;
137 uint64_t reserved_8_63:56;
140 struct cvmx_mixx_ctl_cn52xx cn52xxp1;
141 struct cvmx_mixx_ctl_cn52xx cn56xx;
142 struct cvmx_mixx_ctl_cn52xx cn56xxp1;
143 struct cvmx_mixx_ctl_s cn61xx;
144 struct cvmx_mixx_ctl_s cn63xx;
145 struct cvmx_mixx_ctl_s cn63xxp1;
146 struct cvmx_mixx_ctl_s cn66xx;
147 struct cvmx_mixx_ctl_s cn68xx;
148 struct cvmx_mixx_ctl_s cn68xxp1;
151 union cvmx_mixx_intena {
153 struct cvmx_mixx_intena_s {
154 #ifdef __BIG_ENDIAN_BITFIELD
155 uint64_t reserved_8_63:56;
159 uint64_t data_drpena:1;
169 uint64_t data_drpena:1;
173 uint64_t reserved_8_63:56;
176 struct cvmx_mixx_intena_cn52xx {
177 #ifdef __BIG_ENDIAN_BITFIELD
178 uint64_t reserved_7_63:57;
181 uint64_t data_drpena:1;
191 uint64_t data_drpena:1;
194 uint64_t reserved_7_63:57;
197 struct cvmx_mixx_intena_cn52xx cn52xxp1;
198 struct cvmx_mixx_intena_cn52xx cn56xx;
199 struct cvmx_mixx_intena_cn52xx cn56xxp1;
200 struct cvmx_mixx_intena_s cn61xx;
201 struct cvmx_mixx_intena_s cn63xx;
202 struct cvmx_mixx_intena_s cn63xxp1;
203 struct cvmx_mixx_intena_s cn66xx;
204 struct cvmx_mixx_intena_s cn68xx;
205 struct cvmx_mixx_intena_s cn68xxp1;
208 union cvmx_mixx_ircnt {
210 struct cvmx_mixx_ircnt_s {
211 #ifdef __BIG_ENDIAN_BITFIELD
212 uint64_t reserved_20_63:44;
216 uint64_t reserved_20_63:44;
219 struct cvmx_mixx_ircnt_s cn52xx;
220 struct cvmx_mixx_ircnt_s cn52xxp1;
221 struct cvmx_mixx_ircnt_s cn56xx;
222 struct cvmx_mixx_ircnt_s cn56xxp1;
223 struct cvmx_mixx_ircnt_s cn61xx;
224 struct cvmx_mixx_ircnt_s cn63xx;
225 struct cvmx_mixx_ircnt_s cn63xxp1;
226 struct cvmx_mixx_ircnt_s cn66xx;
227 struct cvmx_mixx_ircnt_s cn68xx;
228 struct cvmx_mixx_ircnt_s cn68xxp1;
231 union cvmx_mixx_irhwm {
233 struct cvmx_mixx_irhwm_s {
234 #ifdef __BIG_ENDIAN_BITFIELD
235 uint64_t reserved_40_63:24;
241 uint64_t reserved_40_63:24;
244 struct cvmx_mixx_irhwm_s cn52xx;
245 struct cvmx_mixx_irhwm_s cn52xxp1;
246 struct cvmx_mixx_irhwm_s cn56xx;
247 struct cvmx_mixx_irhwm_s cn56xxp1;
248 struct cvmx_mixx_irhwm_s cn61xx;
249 struct cvmx_mixx_irhwm_s cn63xx;
250 struct cvmx_mixx_irhwm_s cn63xxp1;
251 struct cvmx_mixx_irhwm_s cn66xx;
252 struct cvmx_mixx_irhwm_s cn68xx;
253 struct cvmx_mixx_irhwm_s cn68xxp1;
256 union cvmx_mixx_iring1 {
258 struct cvmx_mixx_iring1_s {
259 #ifdef __BIG_ENDIAN_BITFIELD
260 uint64_t reserved_60_63:4;
263 uint64_t reserved_0_2:3;
265 uint64_t reserved_0_2:3;
268 uint64_t reserved_60_63:4;
271 struct cvmx_mixx_iring1_cn52xx {
272 #ifdef __BIG_ENDIAN_BITFIELD
273 uint64_t reserved_60_63:4;
275 uint64_t reserved_36_39:4;
277 uint64_t reserved_0_2:3;
279 uint64_t reserved_0_2:3;
281 uint64_t reserved_36_39:4;
283 uint64_t reserved_60_63:4;
286 struct cvmx_mixx_iring1_cn52xx cn52xxp1;
287 struct cvmx_mixx_iring1_cn52xx cn56xx;
288 struct cvmx_mixx_iring1_cn52xx cn56xxp1;
289 struct cvmx_mixx_iring1_s cn61xx;
290 struct cvmx_mixx_iring1_s cn63xx;
291 struct cvmx_mixx_iring1_s cn63xxp1;
292 struct cvmx_mixx_iring1_s cn66xx;
293 struct cvmx_mixx_iring1_s cn68xx;
294 struct cvmx_mixx_iring1_s cn68xxp1;
297 union cvmx_mixx_iring2 {
299 struct cvmx_mixx_iring2_s {
300 #ifdef __BIG_ENDIAN_BITFIELD
301 uint64_t reserved_52_63:12;
303 uint64_t reserved_20_31:12;
307 uint64_t reserved_20_31:12;
309 uint64_t reserved_52_63:12;
312 struct cvmx_mixx_iring2_s cn52xx;
313 struct cvmx_mixx_iring2_s cn52xxp1;
314 struct cvmx_mixx_iring2_s cn56xx;
315 struct cvmx_mixx_iring2_s cn56xxp1;
316 struct cvmx_mixx_iring2_s cn61xx;
317 struct cvmx_mixx_iring2_s cn63xx;
318 struct cvmx_mixx_iring2_s cn63xxp1;
319 struct cvmx_mixx_iring2_s cn66xx;
320 struct cvmx_mixx_iring2_s cn68xx;
321 struct cvmx_mixx_iring2_s cn68xxp1;
324 union cvmx_mixx_isr {
326 struct cvmx_mixx_isr_s {
327 #ifdef __BIG_ENDIAN_BITFIELD
328 uint64_t reserved_8_63:56;
346 uint64_t reserved_8_63:56;
349 struct cvmx_mixx_isr_cn52xx {
350 #ifdef __BIG_ENDIAN_BITFIELD
351 uint64_t reserved_7_63:57;
367 uint64_t reserved_7_63:57;
370 struct cvmx_mixx_isr_cn52xx cn52xxp1;
371 struct cvmx_mixx_isr_cn52xx cn56xx;
372 struct cvmx_mixx_isr_cn52xx cn56xxp1;
373 struct cvmx_mixx_isr_s cn61xx;
374 struct cvmx_mixx_isr_s cn63xx;
375 struct cvmx_mixx_isr_s cn63xxp1;
376 struct cvmx_mixx_isr_s cn66xx;
377 struct cvmx_mixx_isr_s cn68xx;
378 struct cvmx_mixx_isr_s cn68xxp1;
381 union cvmx_mixx_orcnt {
383 struct cvmx_mixx_orcnt_s {
384 #ifdef __BIG_ENDIAN_BITFIELD
385 uint64_t reserved_20_63:44;
389 uint64_t reserved_20_63:44;
392 struct cvmx_mixx_orcnt_s cn52xx;
393 struct cvmx_mixx_orcnt_s cn52xxp1;
394 struct cvmx_mixx_orcnt_s cn56xx;
395 struct cvmx_mixx_orcnt_s cn56xxp1;
396 struct cvmx_mixx_orcnt_s cn61xx;
397 struct cvmx_mixx_orcnt_s cn63xx;
398 struct cvmx_mixx_orcnt_s cn63xxp1;
399 struct cvmx_mixx_orcnt_s cn66xx;
400 struct cvmx_mixx_orcnt_s cn68xx;
401 struct cvmx_mixx_orcnt_s cn68xxp1;
404 union cvmx_mixx_orhwm {
406 struct cvmx_mixx_orhwm_s {
407 #ifdef __BIG_ENDIAN_BITFIELD
408 uint64_t reserved_20_63:44;
412 uint64_t reserved_20_63:44;
415 struct cvmx_mixx_orhwm_s cn52xx;
416 struct cvmx_mixx_orhwm_s cn52xxp1;
417 struct cvmx_mixx_orhwm_s cn56xx;
418 struct cvmx_mixx_orhwm_s cn56xxp1;
419 struct cvmx_mixx_orhwm_s cn61xx;
420 struct cvmx_mixx_orhwm_s cn63xx;
421 struct cvmx_mixx_orhwm_s cn63xxp1;
422 struct cvmx_mixx_orhwm_s cn66xx;
423 struct cvmx_mixx_orhwm_s cn68xx;
424 struct cvmx_mixx_orhwm_s cn68xxp1;
427 union cvmx_mixx_oring1 {
429 struct cvmx_mixx_oring1_s {
430 #ifdef __BIG_ENDIAN_BITFIELD
431 uint64_t reserved_60_63:4;
434 uint64_t reserved_0_2:3;
436 uint64_t reserved_0_2:3;
439 uint64_t reserved_60_63:4;
442 struct cvmx_mixx_oring1_cn52xx {
443 #ifdef __BIG_ENDIAN_BITFIELD
444 uint64_t reserved_60_63:4;
446 uint64_t reserved_36_39:4;
448 uint64_t reserved_0_2:3;
450 uint64_t reserved_0_2:3;
452 uint64_t reserved_36_39:4;
454 uint64_t reserved_60_63:4;
457 struct cvmx_mixx_oring1_cn52xx cn52xxp1;
458 struct cvmx_mixx_oring1_cn52xx cn56xx;
459 struct cvmx_mixx_oring1_cn52xx cn56xxp1;
460 struct cvmx_mixx_oring1_s cn61xx;
461 struct cvmx_mixx_oring1_s cn63xx;
462 struct cvmx_mixx_oring1_s cn63xxp1;
463 struct cvmx_mixx_oring1_s cn66xx;
464 struct cvmx_mixx_oring1_s cn68xx;
465 struct cvmx_mixx_oring1_s cn68xxp1;
468 union cvmx_mixx_oring2 {
470 struct cvmx_mixx_oring2_s {
471 #ifdef __BIG_ENDIAN_BITFIELD
472 uint64_t reserved_52_63:12;
474 uint64_t reserved_20_31:12;
478 uint64_t reserved_20_31:12;
480 uint64_t reserved_52_63:12;
483 struct cvmx_mixx_oring2_s cn52xx;
484 struct cvmx_mixx_oring2_s cn52xxp1;
485 struct cvmx_mixx_oring2_s cn56xx;
486 struct cvmx_mixx_oring2_s cn56xxp1;
487 struct cvmx_mixx_oring2_s cn61xx;
488 struct cvmx_mixx_oring2_s cn63xx;
489 struct cvmx_mixx_oring2_s cn63xxp1;
490 struct cvmx_mixx_oring2_s cn66xx;
491 struct cvmx_mixx_oring2_s cn68xx;
492 struct cvmx_mixx_oring2_s cn68xxp1;
495 union cvmx_mixx_remcnt {
497 struct cvmx_mixx_remcnt_s {
498 #ifdef __BIG_ENDIAN_BITFIELD
499 uint64_t reserved_52_63:12;
501 uint64_t reserved_20_31:12;
505 uint64_t reserved_20_31:12;
507 uint64_t reserved_52_63:12;
510 struct cvmx_mixx_remcnt_s cn52xx;
511 struct cvmx_mixx_remcnt_s cn52xxp1;
512 struct cvmx_mixx_remcnt_s cn56xx;
513 struct cvmx_mixx_remcnt_s cn56xxp1;
514 struct cvmx_mixx_remcnt_s cn61xx;
515 struct cvmx_mixx_remcnt_s cn63xx;
516 struct cvmx_mixx_remcnt_s cn63xxp1;
517 struct cvmx_mixx_remcnt_s cn66xx;
518 struct cvmx_mixx_remcnt_s cn68xx;
519 struct cvmx_mixx_remcnt_s cn68xxp1;
522 union cvmx_mixx_tsctl {
524 struct cvmx_mixx_tsctl_s {
525 #ifdef __BIG_ENDIAN_BITFIELD
526 uint64_t reserved_21_63:43;
528 uint64_t reserved_13_15:3;
530 uint64_t reserved_5_7:3;
534 uint64_t reserved_5_7:3;
536 uint64_t reserved_13_15:3;
538 uint64_t reserved_21_63:43;
541 struct cvmx_mixx_tsctl_s cn61xx;
542 struct cvmx_mixx_tsctl_s cn63xx;
543 struct cvmx_mixx_tsctl_s cn63xxp1;
544 struct cvmx_mixx_tsctl_s cn66xx;
545 struct cvmx_mixx_tsctl_s cn68xx;
546 struct cvmx_mixx_tsctl_s cn68xxp1;
549 union cvmx_mixx_tstamp {
551 struct cvmx_mixx_tstamp_s {
552 #ifdef __BIG_ENDIAN_BITFIELD
558 struct cvmx_mixx_tstamp_s cn61xx;
559 struct cvmx_mixx_tstamp_s cn63xx;
560 struct cvmx_mixx_tstamp_s cn63xxp1;
561 struct cvmx_mixx_tstamp_s cn66xx;
562 struct cvmx_mixx_tstamp_s cn68xx;
563 struct cvmx_mixx_tstamp_s cn68xxp1;