2 * Ralink SoC register definitions
4 * Copyright (C) 2013 John Crispin <john@phrozen.org>
5 * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
13 #ifndef _RALINK_REGS_H_
14 #define _RALINK_REGS_H_
18 enum ralink_soc_type {
33 extern enum ralink_soc_type ralink_soc;
35 extern __iomem void *rt_sysc_membase;
36 extern __iomem void *rt_memc_membase;
38 static inline void rt_sysc_w32(u32 val, unsigned reg)
40 __raw_writel(val, rt_sysc_membase + reg);
43 static inline u32 rt_sysc_r32(unsigned reg)
45 return __raw_readl(rt_sysc_membase + reg);
48 static inline void rt_sysc_m32(u32 clr, u32 set, unsigned reg)
50 u32 val = rt_sysc_r32(reg) & ~clr;
52 __raw_writel(val | set, rt_sysc_membase + reg);
55 static inline void rt_memc_w32(u32 val, unsigned reg)
57 __raw_writel(val, rt_memc_membase + reg);
60 static inline u32 rt_memc_r32(unsigned reg)
62 return __raw_readl(rt_memc_membase + reg);
65 #endif /* _RALINK_REGS_H_ */