2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
7 * Copyright (C) 1999 by Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc.
9 * Copyright (C) 2002 Maciej W. Rozycki
11 * Some useful macros for MIPS assembler code
13 * Some of the routines below contain useless nops that will be optimized
14 * away by gas in -O mode. These nops are however required to fill delay
15 * slots in noreorder mode.
20 #include <asm/sgidefs.h>
21 #include <asm/asm-eva.h>
25 * Emit CFI data in .debug_frame sections, not .eh_frame sections.
26 * We don't do DWARF unwinding at runtime, so only the offline DWARF
27 * information is useful to anyone. Note we should change this if we
28 * ever decide to enable DWARF unwinding at runtime.
30 #define CFI_SECTIONS .cfi_sections .debug_frame
33 * For the vDSO, emit both runtime unwind information and debug
34 * symbols for the .dbg file.
40 * LEAF - declare leaf routine
42 #define LEAF(symbol) \
46 .type symbol, @function; \
48 symbol: .frame sp, 0, ra; \
53 * NESTED - declare nested routine entry point
55 #define NESTED(symbol, framesize, rpc) \
59 .type symbol, @function; \
61 symbol: .frame sp, framesize, rpc; \
66 * END - mark end of function
68 #define END(function) \
71 .size function, .-function
74 * EXPORT - export definition of symbol
76 #define EXPORT(symbol) \
81 * FEXPORT - export definition of a function symbol
83 #define FEXPORT(symbol) \
85 .type symbol, @function; \
89 * ABS - export absolute symbol
91 #define ABS(symbol,value) \
105 * Print formatted string
108 #define PRINT(string) \
116 #define PRINT(string)
120 .pushsection .data; \
127 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
131 #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
137 * Macros to handle different pointer/register sizes for 32/64-bit code
150 * Use the following macros in assemblercode to load/store registers,
153 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
156 #define REG_SUBU subu
157 #define REG_ADDU addu
159 #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
162 #define REG_SUBU dsubu
163 #define REG_ADDU daddu
167 * How to add/sub/load/store/shift C int variables.
169 #if (_MIPS_SZINT == 32)
171 #define INT_ADDU addu
172 #define INT_ADDI addi
173 #define INT_ADDIU addiu
175 #define INT_SUBU subu
179 #define INT_SLLV sllv
181 #define INT_SRLV srlv
183 #define INT_SRAV srav
186 #if (_MIPS_SZINT == 64)
188 #define INT_ADDU daddu
189 #define INT_ADDI daddi
190 #define INT_ADDIU daddiu
192 #define INT_SUBU dsubu
196 #define INT_SLLV dsllv
198 #define INT_SRLV dsrlv
200 #define INT_SRAV dsrav
204 * How to add/sub/load/store/shift C long variables.
206 #if (_MIPS_SZLONG == 32)
208 #define LONG_ADDU addu
209 #define LONG_ADDI addi
210 #define LONG_ADDIU addiu
212 #define LONG_SUBU subu
217 #define LONG_SLLV sllv
219 #define LONG_SRLV srlv
221 #define LONG_SRAV srav
229 #if (_MIPS_SZLONG == 64)
230 #define LONG_ADD dadd
231 #define LONG_ADDU daddu
232 #define LONG_ADDI daddi
233 #define LONG_ADDIU daddiu
234 #define LONG_SUB dsub
235 #define LONG_SUBU dsubu
239 #define LONG_SLL dsll
240 #define LONG_SLLV dsllv
241 #define LONG_SRL dsrl
242 #define LONG_SRLV dsrlv
243 #define LONG_SRA dsra
244 #define LONG_SRAV dsrav
253 * How to add/sub/load/store/shift pointers.
255 #if (_MIPS_SZPTR == 32)
257 #define PTR_ADDU addu
258 #define PTR_ADDI addi
259 #define PTR_ADDIU addiu
261 #define PTR_SUBU subu
267 #define PTR_SLLV sllv
269 #define PTR_SRLV srlv
271 #define PTR_SRAV srav
273 #define PTR_SCALESHIFT 2
280 #if (_MIPS_SZPTR == 64)
282 #define PTR_ADDU daddu
283 #define PTR_ADDI daddi
284 #define PTR_ADDIU daddiu
286 #define PTR_SUBU dsubu
292 #define PTR_SLLV dsllv
294 #define PTR_SRLV dsrlv
296 #define PTR_SRAV dsrav
298 #define PTR_SCALESHIFT 3
306 * Some cp0 registers were extended to 64bit for MIPS III.
308 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
312 #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
317 #define SSNOP sll zero, zero, 1
319 #ifdef CONFIG_SGI_IP28
320 /* Inhibit speculative stores to volatile (e.g.DMA) or invalid addresses. */
321 #include <asm/cacheops.h>
322 #define R10KCBARRIER(addr) cache Cache_Barrier, addr;
324 #define R10KCBARRIER(addr)
327 #endif /* __ASM_ASM_H */