arch/mips/boot/dts/qca/ar9331.dtsi

   1 #include <dt-bindings/clock/ath79-clk.h>
   2
   3 / {
   4         compatible = "qca,ar9331";
   5
   6         #address-cells = <1>;
   7         #size-cells = <1>;
   8
   9         cpus {
  10                 #address-cells = <1>;
  11                 #size-cells = <0>;
  12
  13                 cpu@0 {
  14                         device_type = "cpu";
  15                         compatible = "mips,mips24Kc";
  16                         clocks = <&pll ATH79_CLK_CPU>;
  17                         reg = <0>;
  18                 };
  19         };
  20
  21         cpuintc: interrupt-controller {
  22                 compatible = "qca,ar7100-cpu-intc";
  23
  24                 interrupt-controller;
  25                 #interrupt-cells = <1>;
  26
  27                 qca,ddr-wb-channel-interrupts = <2>, <3>;
  28                 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
  29         };
  30
  31         ref: ref {
  32                 compatible = "fixed-clock";
  33                 #clock-cells = <0>;
  34         };
  35
  36         ahb {
  37                 compatible = "simple-bus";
  38                 ranges;
  39
  40                 #address-cells = <1>;
  41                 #size-cells = <1>;
  42
  43                 interrupt-parent = <&cpuintc>;
  44
  45                 apb {
  46                         compatible = "simple-bus";
  47                         ranges;
  48
  49                         #address-cells = <1>;
  50                         #size-cells = <1>;
  51
  52                         interrupt-parent = <&miscintc>;
  53
  54                         ddr_ctrl: memory-controller@18000000 {
  55                                 compatible = "qca,ar7240-ddr-controller";
  56                                 reg = <0x18000000 0x100>;
  57
  58                                 #qca,ddr-wb-channel-cells = <1>;
  59                         };
  60
  61                         uart: uart@18020000 {
  62                                 compatible = "qca,ar9330-uart";
  63                                 reg = <0x18020000 0x14>;
  64
  65                                 interrupts = <3>;
  66
  67                                 clocks = <&ref>;
  68                                 clock-names = "uart";
  69
  70                                 status = "disabled";
  71                         };
  72
  73                         gpio: gpio@18040000 {
  74                                 compatible = "qca,ar7100-gpio";
  75                                 reg = <0x18040000 0x34>;
  76                                 interrupts = <2>;
  77
  78                                 ngpios = <30>;
  79
  80                                 gpio-controller;
  81                                 #gpio-cells = <2>;
  82
  83                                 interrupt-controller;
  84                                 #interrupt-cells = <2>;
  85
  86                                 status = "disabled";
  87                         };
  88
  89                         pll: pll-controller@18050000 {
  90                                 compatible = "qca,ar9330-pll";
  91                                 reg = <0x18050000 0x100>;
  92
  93                                 clocks = <&ref>;
  94                                 clock-names = "ref";
  95
  96                                 #clock-cells = <1>;
  97                         };
  98
  99                         miscintc: interrupt-controller@18060010 {
 100                                 compatible = "qca,ar7240-misc-intc";
 101                                 reg = <0x18060010 0x8>;
 102
 103                                 interrupt-parent = <&cpuintc>;
 104                                 interrupts = <6>;
 105
 106                                 interrupt-controller;
 107                                 #interrupt-cells = <1>;
 108                         };
 109
 110                         rst: reset-controller@1806001c {
 111                                 compatible = "qca,ar7100-reset";
 112                                 reg = <0x1806001c 0x4>;
 113
 114                                 #reset-cells = <1>;
 115                         };
 116                 };
 117
 118                 usb: usb@1b000100 {
 119                         compatible = "chipidea,usb2";
 120                         reg = <0x1b000000 0x200>;
 121
 122                         interrupts = <3>;
 123                         resets = <&rst 5>;
 124
 125                         phy-names = "usb-phy";
 126                         phys = <&usb_phy>;
 127
 128                         status = "disabled";
 129                 };
 130
 131                 spi: spi@1f000000 {
 132                         compatible = "qca,ar7100-spi";
 133                         reg = <0x1f000000 0x10>;
 134
 135                         clocks = <&pll ATH79_CLK_AHB>;
 136                         clock-names = "ahb";
 137
 138                         #address-cells = <1>;
 139                         #size-cells = <0>;
 140
 141                         status = "disabled";
 142                 };
 143         };
 144
 145         usb_phy: usb-phy {
 146                 compatible = "qca,ar7100-usb-phy";
 147
 148                 reset-names = "usb-phy", "usb-suspend-override";
 149                 resets = <&rst 4>, <&rst 3>;
 150
 151                 #phy-cells = <0>;
 152
 153                 status = "disabled";
 154         };
 155 };